CN111508858B - EMCCD multiplication region electrode short circuit detection method - Google Patents

EMCCD multiplication region electrode short circuit detection method Download PDF

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CN111508858B
CN111508858B CN202010373780.XA CN202010373780A CN111508858B CN 111508858 B CN111508858 B CN 111508858B CN 202010373780 A CN202010373780 A CN 202010373780A CN 111508858 B CN111508858 B CN 111508858B
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CN111508858A (en
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张故万
袁安波
杨修伟
白雪平
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CETC 44 Research Institute
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Abstract

The invention discloses a method for detecting short circuit of an EMCCD multiplication region electrode, which defines an arc-shaped region at the junction of an EMCCD multiplication region and a horizontal region as a fourth suspicious region, sequentially defines a first suspicious region, a second suspicious region and a third suspicious region along a fourth aluminum wiring, and sequentially judges whether each suspicious region has a short circuit point or not; and dividing unqualified EMCCD devices in the same batch into a plurality of groups, respectively taking one group of devices for each judgment, cutting off the fourth aluminum wiring of the suspicious region to be judged of the group of devices by adopting a local photoetching method, and gradually judging the position of the compressed short-circuit point. According to the method, suspicious areas are divided according to the manufacturing process flow of the EMCCD multiplication area, and the fourth aluminum wiring of the suspicious areas is cut off by adopting a local photoetching method for judgment, so that each suspicious area is detected and judged, the area where a short-circuit point is located is found out, the range where the short-circuit point is located can be further compressed according to needs, and the reason of short circuit is judged, so that improvement is facilitated.

Description

EMCCD multiplication region electrode short circuit detection method
Technical Field
The invention relates to the field of CCD detection, in particular to a method for detecting EMCCD multiplication region electrode short circuit.
Background
A conventional multiplication region of an EMCCD (Electron-Multiplying CCD) includes a primary polysilicon 1, a secondary polysilicon 2 and a tertiary polysilicon 4, where the secondary polysilicon includes a first secondary polysilicon 2 and a second secondary polysilicon 3, and a local polysilicon distribution structure is shown in fig. 1. As shown in fig. 2, the primary polysilicon 1 is connected through a first aluminum wire 5, the first secondary polysilicon 2 is connected through a second aluminum wire 6, the second secondary polysilicon 3 is connected through a third aluminum wire 7, the third polysilicon 4 is connected through a fourth aluminum wire 8, and all the four aluminum wires are made of primary metal aluminum. As shown in fig. 3, the second aluminum wiring 6 is externally connected with a second aluminum wiring external connection wire 10, and the fourth aluminum wiring 8 is externally connected with a fourth aluminum wiring external connection wire 12; as shown in fig. 4, a primary metallic aluminum light-blocking region 25 is disposed in the middle of the EMCCD multiplication region, the primary metallic aluminum light-blocking region 25 is provided with a primary metallic aluminum light-blocking layer 13 made of primary metallic aluminum, the first aluminum wiring 5 is externally connected to a first aluminum wiring external connection 9, and the third aluminum wiring 7 is externally connected to a third aluminum wiring external connection 11; a first secondary metallic aluminum light blocking area 26 and a second secondary metallic aluminum light blocking area 27 are respectively arranged on two sides of the primary metallic aluminum light blocking area 25, and the first secondary metallic aluminum light blocking area 26 and the second secondary metallic aluminum light blocking area 27 are respectively provided with a secondary metallic aluminum light blocking layer 14 made of secondary metallic aluminum; the first, second and third times are used for representing the manufacturing sequence of the polycrystalline silicon and the metal aluminum in the manufacturing process of the EMCCD multiplication region, namely, the first polycrystalline silicon 1 represents the polycrystalline silicon manufactured on the EMCCD multiplication region firstly, the second polycrystalline silicon represents the polycrystalline silicon manufactured on the EMCCD multiplication region for the second time, and the third polycrystalline silicon 4 represents the polycrystalline silicon manufactured on the EMCCD multiplication region for the third time; primary metallic aluminum refers to metallic aluminum first fabricated on the EMCCD multiplication region, and secondary metallic aluminum refers to metallic aluminum fabricated a second time on the EMCCD multiplication region.
When the EMCCD multiplication region is manufactured by the prior art, the phenomenon of short circuit of electrodes generally exists, the qualification rate of finished products is only 8.1%, the problem of the plate making process is judged, and the condition of short circuit between the electrodes of the chip test multiplication region is shown in table 1.
TABLE 1
Figure BDA0002479363420000021
As can be seen from table 1, the electrode of the second secondary polysilicon 3 and the electrode of the third polysilicon 4 are short-circuited, the short-circuit test curve is shown in fig. 5, the short-circuit resistance is about 26 ohms, and the size of the resistance value can be determined as the metal residue or the connection cause, according to the judgment, the design structure and the process manufacturing of the second secondary polysilicon 3 and the third polysilicon 4 are analyzed, and the layer structure at the second secondary polysilicon 3 is shown in fig. 6; the layer structure at the third polysilicon 4 is shown in fig. 7; the electrodes of the first secondary polysilicon 2 and the third polysilicon 4 which are relatively close to each other are normal (not short-circuited), the primary polysilicon 1 and the second secondary polysilicon 3 which are relatively close to each other are not short-circuited, and the third polysilicon 4 and the second secondary polysilicon 3 which are relatively far from each other are short-circuited; because the primary metallic aluminum light blocking area 25 has more connecting pressure points, the primary metallic aluminum light blocking area 25 is detected by a Scanning Electron Microscope (SEM), no metal residue or connection is found, the primary metallic aluminum light blocking area 25 can be basically judged to be normal, but the short circuit position cannot be further effectively analyzed, the short circuit factor cannot be judged, and the cause of the problem cannot be found, so that the defect of the plate making process cannot be solved.
Disclosure of Invention
The invention aims to provide a method for detecting EMCCD multiplication region electrode short circuit, which can determine the EMCCD electrode short circuit position.
The technical scheme of the invention is as follows:
a method for detecting EMCCD multiplication region electrode short circuit comprises the following steps:
s1, defining an arc-shaped area at the junction of an EMCCD multiplication area and a horizontal area as a fourth suspicious area, defining one side of the multiplication area facing the horizontal area as a front stage and one side facing an output amplifier as a rear stage, and sequentially defining a first suspicious area, a second suspicious area and a third suspicious area along a fourth aluminum wiring from the rear stage to the front stage between the output amplifier and the fourth suspicious area; the first suspicious region is positioned between the primary metal aluminum light blocking region and the output amplifier and is close to the primary metal aluminum light blocking region; the second suspicious region and the third suspicious region are both positioned between the primary metal aluminum light-blocking region and the fourth suspicious region, the second suspicious region is close to the primary metal aluminum light-blocking region, and the third suspicious region is close to the fourth suspicious region;
s2, dividing unqualified EMCCD devices in the same batch into a plurality of groups, and cutting off a fourth aluminum wiring of a first suspicious region of one group of unqualified EMCCD devices by adopting a local photoetching method;
s3, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between the first suspicious region and the horizontal region, and executing the step S5; otherwise, judging that the short-circuit point is between the first suspicious region and the output amplifier, and executing the step S4;
s4, compressing the area where the short circuit point is located between the first suspicious area and the output amplifier;
s5, another group of new unqualified EMCCD devices is taken, and a fourth aluminum wiring of a second suspicious region of the group of devices is cut off by adopting a local photoetching method;
s6, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between a second suspicious region and a first suspicious region, and executing the step S7; otherwise, judging that the short-circuit point is between the second suspicious region and the horizontal region, and executing a step S8;
s7, judging that the fault position is in a primary metal aluminum light blocking area;
s8, another group of new unqualified EMCCD devices is taken, and a fourth aluminum wiring of a third suspicious area of the group of devices is cut off by adopting a local photoetching method;
s9, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between a third suspicious region and a second suspicious region, and executing the step S10; otherwise, judging that the short-circuit point is in the fourth suspicious region, and executing the step S11;
s10, compressing the area where the short circuit point is located between the second suspicious region and the third suspicious region;
and S11, judging the short circuit reason of the fourth suspicious region.
Further, in step S4, compressing the area where the short-circuit point is located between the first suspicious region and the output amplifier includes the following steps:
step S301, defining a new suspicious region between the first suspicious region and the output amplifier;
step S302, another group of new unqualified EMCCD devices are taken, and a fourth aluminum wiring at a newly defined suspicious area of the group of devices is cut off by adopting a local photoetching method;
step S303, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon are short-circuited or not, if the short-circuited, judging that a short-circuit point is between the suspicious region and the previous-stage suspicious region, and executing step S306; otherwise, determining that the short-circuit point is between the suspicious region and the output amplifier, and executing step S304;
step S304, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S305; otherwise, go to step S312;
step S305, a suspicious area is defined between the suspicious area and the output amplifier, and the step S302 is executed again;
step S306, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S307; otherwise, go to step S312;
step S307, defining a new suspicious area between the suspicious area and the previous suspicious area;
step S308, another group of new unqualified EMCCD devices is taken, and a fourth aluminum wiring at a newly defined suspicious area of the group of devices is cut off by adopting a local photoetching method;
step S309, measuring whether the electrode of the third-time polysilicon and the electrode of the second-time polysilicon are short-circuited, if so, judging that a short-circuit point is between the suspicious region and the previous-stage suspicious region, and returning to execute the step S306; otherwise, determining that the short-circuit point is between the suspicious region and the next-stage suspicious region, and executing step S310;
step S310, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S311; otherwise, go to step S312;
step S311, defining a new suspicious region between the suspicious region and the next-level suspicious region; returning to execute the step S308;
and step S312, judging the area where the short-circuit point is located.
Further, in the step S10, compressing the area where the short-circuit point is located between the second suspicious region and the third suspicious region includes the following steps:
defining a new suspect region between the second suspect region and the third suspect region; and performs step S308.
Further, in the step S11, the determining the cause of the short circuit of the fourth suspicious region includes the following steps:
another group of new unqualified EMCCD devices are taken, the fourth suspicious area of the group of devices is coated with photoresist, exposure and development are carried out, an exposure area is checked by using an electron microscope, and the next step is carried out after the exposure area is confirmed to be free of photoresist;
etching to remove the low-temperature silicon dioxide passivation layer of the suspicious region;
etching to remove the secondary metallic aluminum light-blocking layer of the suspicious region;
and detecting whether the short-circuit point of the suspicious region disappears, and if so, judging that the short-circuit reason is that the secondary metallic aluminum light blocking layer of the suspicious region is connected with the third aluminum wiring and the fourth aluminum wiring through the low-temperature silicon dioxide medium below to cause short circuit.
Further, the step of cutting off the fourth aluminum wiring of the suspicious region by adopting a local photoetching method comprises the following steps:
step S201, coating photoresist on the suspicious region, exposing, developing, checking an exposure region by using an electron microscope, and executing step S202 after confirming that the exposure region has no photoresist;
step S202, etching the low-temperature silicon dioxide passivation layer at the position of the suspicious region;
step S203, etching the secondary metallic aluminum light blocking layer at the position of the suspicious region;
step S204, etching the low-temperature silicon dioxide dielectric layer at the suspicious region position;
step S205, etching the fourth aluminum wiring at the position of the suspicious region;
and S206, removing the photoresist on the periphery of the suspicious region by adopting dry etching and wet etching in sequence, and cleaning by adopting an organic solution.
Further, in step S202 and step S204, the low-temperature silicon dioxide passivation layer and the low-temperature silicon dioxide dielectric layer are etched by using carbon tetrafluoride or trifluoromethane.
Further, in step S203 and step S205, the secondary aluminum light-blocking layer and the fourth aluminum wiring are etched by using chlorine or boron trichloride.
Has the beneficial effects that: in the invention, four suspicious regions are divided according to the manufacturing process flow of the EMCCD multiplication region, and whether each suspicious region has a short-circuit point is judged in sequence; the method comprises the steps of dividing unqualified EMCCD devices in the same batch into a plurality of groups, respectively taking one group of devices for each judgment, and connecting aluminum wiring of the polycrystalline silicon in a suspicious region to be judged for three times to cut off by adopting a local photoetching method, so that each suspicious region is detected and judged, the region where a short circuit point is located is found out, the range where the short circuit point is located can be further compressed as required, and the reason for causing short circuit is judged, so that improvement is facilitated.
Drawings
FIG. 1 is a schematic diagram of a local polysilicon structure of an EMCCD multiplication region;
FIG. 2 is a schematic diagram of an aluminum wiring structure of an EMCCD multiplication region;
FIG. 3 is a schematic diagram of an external connection line structure of an EMCCD multiplication region aluminum wiring;
FIG. 4 is a schematic diagram of a hierarchical interconnect structure of an EMCCD multiplication region;
FIG. 5 is a schematic view of a layer structure at the secondary polysilicon;
FIG. 6 is a schematic view of a layer structure at the triple polysilicon;
FIG. 7 is a graph of short circuit test curves for the second and third polysilicon in the EMCCD multiplication region;
FIG. 8 is a flow chart of the operation of the present invention;
FIG. 9 is a schematic diagram of the locations of a first suspect region, a second suspect region, a third suspect region, and a fourth suspect region;
fig. 10 is a flow chart of compressing the area of the short circuit point between the first suspect region and the output amplifier.
In the figure: 1. primary polysilicon, 2, first secondary polysilicon, 3, second secondary polysilicon, 4, third polysilicon, 5, first aluminum wiring, 6, second aluminum wiring, 7, third aluminum wiring, 8, fourth aluminum wiring, 9, first aluminum wiring external connection, 10, second aluminum wiring external connection, 11, third aluminum wiring external connection, 12, fourth aluminum wiring external connection, 13, primary metal aluminum light-blocking layer, 14, secondary metal aluminum light-blocking layer, 20, horizontal region, 21, first suspect region, 22, second suspect region, 23, third suspect region, 24, fourth suspect region, 25, primary metal aluminum light-blocking region, 26, first secondary metal aluminum light-blocking region, 27, second secondary metal aluminum light-blocking region.
Detailed Description
In order to make the technical solutions in the embodiments of the present invention better understood and make the above objects, features and advantages of the embodiments of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention are further described in detail below with reference to the accompanying drawings.
In the description of the present invention, unless otherwise specified and limited, it is to be noted that the term "connected" is to be interpreted broadly, and may be, for example, a mechanical connection or an electrical connection, or a communication between two elements, or may be a direct connection or an indirect connection through an intermediate medium, and a specific meaning of the term may be understood by those skilled in the art according to specific situations.
As shown in fig. 8, one embodiment of the method for detecting short-circuiting of the EMCCD dynode according to the present invention comprises the steps of:
step S1, as shown in fig. 9, an arc-shaped region at the boundary between the EMCCD multiplication region and the horizontal region 20 is defined as a fourth suspicious region 24, a part of the multiplication region facing the horizontal region 20 is defined as a front stage, a part facing the output amplifier is defined as a rear stage, and a first suspicious region 21, a second suspicious region 22, and a third suspicious region 23 are sequentially defined along a fourth aluminum wiring 8 from front to rear between the output amplifier and the fourth suspicious region 24, and step S2 is performed.
Because no metal residue or connection is found when the primary metallic aluminum light-blocking area 25 is detected by using a scanning electron microscope, the primary metallic aluminum light-blocking area 25 can be basically judged to be normal, and therefore, the first suspicious area 21 is selected at the position of the first secondary metallic aluminum light-blocking area 26, which is close to the primary metallic aluminum light-blocking area 25; selecting a second suspect region 22 at a location where the second secondary aluminum metal light-blocking region 27 is adjacent to the primary aluminum metal light-blocking region 25; a third suspect region 23 is defined at a location where the second secondary aluminum metal light-blocking region 27 is adjacent to the fourth suspect region 24; since the lengths of the first secondary aluminum metal light-blocking area 26 and the second secondary aluminum metal light-blocking area 27 are long, in order to conveniently mark the positions of the first suspicious area 21, the second suspicious area 22 and the third suspicious area 23, only the portions at the two ends of the first secondary aluminum metal light-blocking area 26 and the second secondary aluminum metal light-blocking area 27 are shown in fig. 9, and the structures of the omitted middle portions are the same as those at the two ends.
And S2, dividing unqualified EMCCD devices in the same batch into a plurality of groups, cutting off the fourth aluminum wiring 8 of the first suspicious area 21 of the unqualified EMCCD devices in one group by adopting a local photoetching method, and executing the step S3.
Because the same process is adopted by the same batch of products, the fault points of the products can be considered to be at the same position under the conditions that the fault rate of the finished products is high and the fault phenomena are the same; of course, in order to avoid different failure points of individual devices, the number of a group of devices may be reasonably selected, and when the measurement results of the individual devices are inconsistent, the measurement results of most devices are used as the reference, for example, 10 devices are used as a group, when the measurement results of 9 devices are all consistent and only 1 is different, the measurement results of 9 devices are used as the reference, and if the devices with consistent measurement results are less in percentage, for example, less than 80%, it is determined that there are multiple failure points, and the method of the present invention is not applicable.
S3, measuring whether the electrode of the third-time polycrystalline silicon 4 and the electrode of the second-time polycrystalline silicon 3 of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between the first suspicious region 21 and the horizontal region 20, and executing the step S5; otherwise, determining that the short-circuit point is between the first suspicious region 21 and the output amplifier, and executing step S4;
s4, compressing the area where the short circuit point is located between the first suspicious region 21 and the output amplifier; since the area between the first suspect region 21 and the output amplifier is long and it is not convenient to determine the cause of the short circuit, it is necessary to further compress the area where the short circuit point is located.
S5, another group of new unqualified EMCCD devices is taken, the fourth aluminum wiring 8 of the second suspicious area 22 of the group of devices is cut off by adopting a local photoetching method, and the step S6 is executed;
s6, measuring whether the electrode of the third-time polycrystalline silicon 4 and the electrode of the second-time polycrystalline silicon 3 of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between the second suspicious region 22 and the first suspicious region 21, and executing the step S7; otherwise, determining that the short-circuit point is between the second suspicious region 22 and the horizontal region 20, and executing step S8;
step S7, because the second suspicious region 22 and the first suspicious region 21 are respectively positioned at the positions, adjacent to the primary metallic aluminum light-blocking region 25, of the two sides of the primary metallic aluminum light-blocking region 25, the fault position is judged to be in the primary metallic aluminum light-blocking region 25;
s8, another group of new unqualified EMCCD devices is taken, the fourth aluminum wiring 8 of the third suspicious region 23 of the group of devices is cut off by adopting a local photoetching method, and the step S9 is executed;
s9, measuring whether the electrode of the third-time polycrystalline silicon 4 and the electrode of the second-time polycrystalline silicon 3 of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between a third suspicious region 23 and a second suspicious region 22, and executing the step S10; otherwise, determining that the short-circuit point is in the fourth suspicious region 24, and executing the step S11;
s10, compressing the area where the short circuit point is located between the second suspicious region 22 and the third suspicious region 23;
and step S11, judging the short circuit reason of the fourth suspicious region 24.
As shown in fig. 10, in the step S4, compressing the area where the short circuit point is located between the first suspicious region 21 and the output amplifier includes the following steps:
step S301, defining a new suspicious region between the first suspicious region 21 and the output amplifier, and performing step S302; defining a new suspicious region should meet at least one of the following two requirements:
(1) The structure of the suspicious region is easy to cause the short circuit of the third polysilicon 4 and the second polysilicon 3;
(2) The suspicious region helps to compress the area where the short-circuit point is located, for example, the middle of the area between the first suspicious region 21 and the output amplifier can be defined as the suspicious region, so that the area where the short-circuit point is located can be reduced by half.
Step S302, another group of new unqualified EMCCD devices is taken, the fourth aluminum wiring 8 at the newly defined suspicious region of the group of devices is cut off by adopting a local photoetching method, and the step S303 is executed;
step S303, measuring whether the electrode of the third-time polycrystalline silicon 4 and the electrode of the second-time polycrystalline silicon 3 are short-circuited or not, if so, judging that a short-circuit point is between the suspicious region and the previous-stage suspicious region, and executing step S306; otherwise, determining that the short-circuit point is between the suspicious region and the output amplifier, and executing step S304;
step S304, judging whether the area of the short circuit point needs to be further compressed, if so, executing step S305; otherwise, go to step S312;
the basis for judging whether the area of the short circuit point needs to be further compressed is as follows: and if the area of the short circuit point is large, the area of the short circuit point is inconvenient to find out, and the area of the short circuit point is further compressed.
Step S305, defining a new suspicious area between the suspicious area and the output amplifier, and returning to execute the step S302;
step S306, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S307; otherwise, go to step S312;
step S307, defining a new suspicious region between the suspicious region and the previous suspicious region, and executing step S308;
step S308, another group of new unqualified EMCCD devices is taken, the fourth aluminum wiring 8 at the newly defined suspicious region of the group of devices is cut off by adopting a local photoetching method, and the step S309 is executed;
step S309, measuring whether the electrode of the third-time polysilicon 4 and the electrode of the second-time polysilicon 3 are short-circuited or not, if so, judging that a short-circuit point is between the suspicious region and the previous-stage suspicious region, and returning to execute the step S306; otherwise, determining that the short-circuit point is between the suspicious region and the next-stage suspicious region, and executing step S310;
step S310, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S311; otherwise, go to step S312;
step S311, defining a new suspicious region between the suspicious region and the next-level suspicious region; returning to execute the step S308;
step S312, determining the area where the short circuit point is located.
In step S10, compressing the area where the short-circuit point is located between the second suspicious region 22 and the third suspicious region 23 includes the following steps:
defining a new suspect region between the second suspect region 22 and the third suspect region 23; and performs step S308.
In step S11, the step of determining the cause of the short circuit of the fourth suspicious region 24 includes the following steps:
another group of new unqualified EMCCD devices are taken, the fourth suspicious region 24 of the group of devices is coated with photoresist, exposure and development are carried out, an exposure region is checked by using an electron microscope, and the next step is carried out after the exposure region is confirmed to be free of photoresist;
removing the low-temperature silicon dioxide passivation layer above the secondary metallic aluminum light blocking layer 14 of the suspicious region by adopting carbon tetrafluoride or trifluoromethane etching;
removing the secondary metallic aluminum light-blocking layer 14 of the suspicious region by adopting chlorine or boron trichloride for etching, inspecting an etched region by using an electron microscope, and executing the next step after confirming that no secondary metallic aluminum remains in the suspicious region;
and detecting whether the short-circuit point of the suspicious region disappears, and if the short-circuit point disappears, judging that the short-circuit reason is that the secondary metal aluminum light blocking layer 14 in the suspicious region is respectively connected with the third aluminum wiring 7 and the fourth aluminum wiring 8 through the low-temperature silicon dioxide medium below to cause short circuit. Structurally, the second secondary polysilicon 3 is superposed on the polysilicon 1, so that the step height is higher, and the fourth suspicious region 24 has an arc structure, so that the step height of the third secondary polysilicon 4 is higher; the problem of poor adhesive coverage exists at the edge of the high step, and when the low-temperature silicon dioxide medium hole is etched in the manufacturing process of the EMCCD multiplication region, the low-temperature silicon dioxide medium at the edge of the high step is etched, so that short circuit is caused.
The fourth aluminum wiring 8 of the suspicious region is cut off by adopting a local photoetching method, and the method comprises the following steps:
step S201, coating photoresist on the suspicious region position, exposing, developing, checking an exposure region by using an electron microscope, and executing step S202 after confirming that the exposure region has no photoresist;
step S202, etching the low-temperature silicon dioxide passivation layer at the position of the suspicious region by adopting carbon tetrafluoride or trifluoromethane, and then executing step S203; the etching time is determined according to the thickness and the etching rate of the low-temperature silicon dioxide passivation layer;
step S203, etching the secondary metallic aluminum light-blocking layer 14 at the position of the suspicious region by adopting chlorine or boron trichloride, then checking the etched region by using an electron microscope, and executing step S204 after confirming that no secondary metallic aluminum remains at the position of the suspicious region;
step S204, etching the low-temperature silicon dioxide dielectric layer above the fourth aluminum wiring 8 at the position of the suspicious region by adopting carbon tetrafluoride or trifluoromethane, and then executing step S205; the etching time is determined according to the thickness and the etching rate of the low-temperature silicon dioxide dielectric layer;
step S205, etching the fourth aluminum wiring 8 at the position of the suspicious region by adopting chlorine or boron trichloride, then checking the etching region by using an electron microscope, and executing step S206 after confirming that no metallic aluminum remains at the position of the suspicious region;
and S206, removing the photoresist on the periphery of the suspicious region by adopting dry etching and wet etching in sequence, and then cleaning by adopting an organic solution until no photoresist remains after electron microscope examination.
The undescribed parts of the present invention are consistent with the prior art, and are not described herein.
The above description is only an embodiment of the present invention, and is not intended to limit the scope of the present invention, and all equivalent structures made by using the contents of the present specification and the drawings can be directly or indirectly applied to other related technical fields, and are also within the scope of the present invention.

Claims (7)

1. A method for detecting EMCCD multiplication region electrode short circuit is characterized by comprising the following steps:
s1, defining an arc-shaped area at the junction of an EMCCD multiplication area and a horizontal area as a fourth suspicious area, defining one part of the multiplication area facing the horizontal area as a front stage and one part facing an output amplifier as a rear stage, and sequentially defining a first suspicious area, a second suspicious area and a third suspicious area along a fourth aluminum wiring from the rear stage to the front stage between the output amplifier and the fourth suspicious area; the first suspicious region is positioned between the primary metal aluminum light blocking region and the output amplifier and is close to the primary metal aluminum light blocking region; the second suspicious region and the third suspicious region are both positioned between the primary metal aluminum light-blocking region and the fourth suspicious region, the second suspicious region is close to the primary metal aluminum light-blocking region, and the third suspicious region is close to the fourth suspicious region;
s2, dividing unqualified EMCCD devices in the same batch into a plurality of groups, and cutting off a fourth aluminum wiring of a first suspicious region of one group of unqualified EMCCD devices by adopting a local photoetching method;
s3, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between the first suspicious region and the horizontal region, and executing the step S5; otherwise, judging that the short-circuit point is between the first suspicious region and the output amplifier, and executing the step S4;
s4, compressing the area where the short-circuit point is located between the first suspicious area and the output amplifier;
s5, another group of new unqualified EMCCD devices is taken, and a fourth aluminum wiring of a second suspicious region of the group of devices is cut off by adopting a local photoetching method;
s6, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon of the group of devices are short-circuited or not, if the short-circuited is detected, judging that a short-circuit point is between a second suspicious region and a first suspicious region, and executing the step S7; otherwise, judging that the short-circuit point is between the second suspicious region and the horizontal region, and executing a step S8;
s7, judging that the fault position is in a primary metal aluminum light blocking area;
s8, another group of new unqualified EMCCD devices is taken, and a fourth aluminum wiring of a third suspicious area of the group of devices is cut off by adopting a local photoetching method;
s9, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon of the group of devices are short-circuited or not, if so, judging that a short-circuit point is between a third suspicious region and a second suspicious region, and executing the step S10; otherwise, judging that the short-circuit point is in the fourth suspicious area, and executing the step S11;
s10, compressing the area where the short-circuit point is located between the second suspicious area and the third suspicious area;
and S11, judging the short circuit reason of the fourth suspicious region.
2. The method for detecting short circuit of EMCCD dynode according to claim 1, wherein in step S4, compressing the area where the short circuit point is located between the first suspect region and the output amplifier comprises the following steps:
step S301, defining a new suspicious region between the first suspicious region and the output amplifier;
step S302, another group of new unqualified EMCCD devices are taken, and a fourth aluminum wiring at a newly defined suspicious area of the group of devices is cut off by adopting a local photoetching method;
step S303, measuring whether the electrode of the third-time polycrystalline silicon and the electrode of the second-time polycrystalline silicon are short-circuited or not, if the short-circuited, judging that a short-circuit point is between the suspicious region and the previous-stage suspicious region, and executing step S306; otherwise, determining that the short-circuit point is between the suspicious region and the output amplifier, and executing step S304;
step S304, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S305; otherwise, go to step S312;
step S305, a suspicious region is defined between the suspicious region and the output amplifier, and the step S302 is executed again;
step S306, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S307; otherwise, go to step S312;
step S307, a new suspicious region is defined between the suspicious region and the previous suspicious region;
s308, another group of new unqualified EMCCD devices is taken, and a fourth aluminum wiring at a suspicious region newly defined by the group of devices is cut off by adopting a local photoetching method;
step S309, measuring whether the electrode of the third-time polysilicon and the electrode of the second-time polysilicon are short-circuited, if so, judging that a short-circuit point is between the suspicious region and the previous-stage suspicious region, and returning to execute the step S306; otherwise, determining that the short-circuit point is between the suspicious region and the next-stage suspicious region, and executing step S310;
step S310, judging whether the area where the short circuit point is located needs to be further compressed, if so, executing step S311; otherwise, go to step S312;
step S311, defining a new suspicious region between the suspicious region and the next-level suspicious region; returning to execute the step S308;
step S312, determining the area where the short circuit point is located.
3. The method for detecting short circuit of EMCCD dynode according to claim 2, wherein in the step S10, compressing the area where the short circuit point is located between the second suspicious region and the third suspicious region comprises the following steps:
defining a new suspect region between the second suspect region and the third suspect region; and performs step S308.
4. The method for detecting short circuit of EMCCD multiplication region electrode according to claim 1, wherein in the step S11, the step of judging the cause of short circuit of the fourth suspicious region comprises the following steps:
another group of new unqualified EMCCD devices is taken, the fourth suspicious area of the group of devices is coated with photoresist, exposure and development are carried out, an exposure area is checked by using an electron microscope, and the next step is executed after the exposure area is confirmed to be free of photoresist;
etching to remove the low-temperature silicon dioxide passivation layer of the suspicious region;
etching to remove the secondary metallic aluminum light-blocking layer of the suspicious region;
and detecting whether the short-circuit point of the suspicious region disappears, and if so, judging that the short-circuit reason is that the secondary metal aluminum light blocking layer in the region is connected with the third aluminum wiring and the fourth aluminum wiring through the low-temperature silicon dioxide medium below to cause short circuit.
5. The EMCCD multiplication region electrode short circuit detection method of any one of claims 1-4, wherein the step of cutting off the fourth aluminum wiring of the suspicious region by using a local photolithography etching method comprises the following steps:
step S201, coating photoresist on the suspicious region, exposing, developing, checking an exposure region by using an electron microscope, and executing step S202 after confirming that the exposure region has no photoresist;
step S202, etching the low-temperature silicon dioxide passivation layer at the suspicious region position;
step S203, etching the secondary metallic aluminum light blocking layer at the position of the suspicious region;
step S204, etching the low-temperature silicon dioxide dielectric layer at the suspicious region position;
step S205, etching a fourth aluminum wiring at the position of the suspicious region;
and step S206, removing the photoresist on the periphery of the suspicious region by adopting dry etching and wet etching in sequence, and cleaning by adopting an organic solution.
6. The method for detecting the EMCCD multiplication region electrode short circuit according to claim 5, wherein in the step S202 and the step S204, the low temperature silicon dioxide passivation layer and the low temperature silicon dioxide dielectric layer are etched by using carbon tetrafluoride or trifluoromethane.
7. The method for detecting EMCCD multiplication region electrode short circuit according to claim 5, wherein in step S203 and step S205, the secondary metal aluminum light-blocking layer and the fourth aluminum wiring are etched by chlorine gas or boron trichloride.
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Publication number Priority date Publication date Assignee Title
CN115567791A (en) * 2022-08-02 2023-01-03 中国电子科技集团公司第四十四研究所 Large-array high-speed reading frame transfer CCD image sensor

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002343843A (en) * 2001-05-16 2002-11-29 Hitachi Ltd Method for manufacturing semiconductor device and semiconductor inspecting apparatus
JP2004326019A (en) * 2003-04-28 2004-11-18 Optrex Corp Method of inspecting liquid crystal display panel
JP2005135941A (en) * 2003-10-28 2005-05-26 Canon Inc Method of repairing short circuit in photovoltaic element and short circuit repairing device
JP2006013225A (en) * 2004-06-28 2006-01-12 Seiko Epson Corp Teg for foreign matter detection, foreign matter detection device and foreign matter detection method
JP2006276368A (en) * 2005-03-29 2006-10-12 Sanyo Epson Imaging Devices Corp Array substrate and test method thereof
JP2007134499A (en) * 2005-11-10 2007-05-31 Fuji Electric Device Technology Co Ltd Short-circuit gate position detection method for mos semiconductor element
JP2008020661A (en) * 2006-07-13 2008-01-31 Ricoh Co Ltd Image forming apparatus
WO2010010750A1 (en) * 2008-07-23 2010-01-28 シャープ株式会社 Active matrix substrate, display device, method for inspecting the active matrix substrate, and method for inspecting the display device
CN102620816A (en) * 2012-03-21 2012-08-01 中国电子科技集团公司第十三研究所 Test fixture for high-power LED device provided with sexangular baseplate
WO2013057986A1 (en) * 2011-10-18 2013-04-25 シャープ株式会社 Wiring defect inspecting method, wiring defect inspecting apparatus, wiring defect inspecting program, and wiring defect inspecting program recording medium
WO2019149581A1 (en) * 2018-02-01 2019-08-08 Infineon Technologies Bipolar Gmbh & Co. Kg Short-circuit semiconductor component and method for operating same
CN110213512A (en) * 2019-04-30 2019-09-06 中国电子科技集团公司第四十四研究所 A kind of cambered design structure of multi-tap electron multiplying charge coupled apparatus multiplication region
CN110554273A (en) * 2019-09-02 2019-12-10 昆山纬亚智能科技有限公司 Detection method of PCBA short circuit point

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002164517A (en) * 2000-11-28 2002-06-07 Mitsubishi Electric Corp Semiconductor device having element for test and its manufacturing method
US6771077B2 (en) * 2002-04-19 2004-08-03 Hitachi, Ltd. Method of testing electronic devices indicating short-circuit

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002343843A (en) * 2001-05-16 2002-11-29 Hitachi Ltd Method for manufacturing semiconductor device and semiconductor inspecting apparatus
JP2004326019A (en) * 2003-04-28 2004-11-18 Optrex Corp Method of inspecting liquid crystal display panel
JP2005135941A (en) * 2003-10-28 2005-05-26 Canon Inc Method of repairing short circuit in photovoltaic element and short circuit repairing device
JP2006013225A (en) * 2004-06-28 2006-01-12 Seiko Epson Corp Teg for foreign matter detection, foreign matter detection device and foreign matter detection method
JP2006276368A (en) * 2005-03-29 2006-10-12 Sanyo Epson Imaging Devices Corp Array substrate and test method thereof
JP2007134499A (en) * 2005-11-10 2007-05-31 Fuji Electric Device Technology Co Ltd Short-circuit gate position detection method for mos semiconductor element
JP2008020661A (en) * 2006-07-13 2008-01-31 Ricoh Co Ltd Image forming apparatus
WO2010010750A1 (en) * 2008-07-23 2010-01-28 シャープ株式会社 Active matrix substrate, display device, method for inspecting the active matrix substrate, and method for inspecting the display device
WO2013057986A1 (en) * 2011-10-18 2013-04-25 シャープ株式会社 Wiring defect inspecting method, wiring defect inspecting apparatus, wiring defect inspecting program, and wiring defect inspecting program recording medium
CN102620816A (en) * 2012-03-21 2012-08-01 中国电子科技集团公司第十三研究所 Test fixture for high-power LED device provided with sexangular baseplate
WO2019149581A1 (en) * 2018-02-01 2019-08-08 Infineon Technologies Bipolar Gmbh & Co. Kg Short-circuit semiconductor component and method for operating same
CN110213512A (en) * 2019-04-30 2019-09-06 中国电子科技集团公司第四十四研究所 A kind of cambered design structure of multi-tap electron multiplying charge coupled apparatus multiplication region
CN110554273A (en) * 2019-09-02 2019-12-10 昆山纬亚智能科技有限公司 Detection method of PCBA short circuit point

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
《Temporal evolution characteristics and damage threshold of CCD detector irradiated by 1.06-μm continuous laser》;laserMin Han, Xi Wang, Jinsong Nie, Ke Sun, Mingxin Zhang;《Optik》;20180331;第157卷;第1282-1291页 *
《关于CCD 铝布线光刻工艺质量的优化研究》;高建威,韩沛东,向鹏飞,杨修伟,袁安波;《电子科技》;20170615;第30卷(第6期);正文全文 *
锑化铟红外焦平面器件信号分层问题研究;温涛等;《红外》;20200125(第01期);正文全文 *

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