CN111474460A - IGBT grid resistance fault detection system - Google Patents
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Abstract
The invention provides an IGBT grid resistance fault detection system, which comprises a first detection circuit, a second detection circuit and an AND gate circuit, wherein the first detection circuit is connected with the second detection circuit; the first detection circuit is used for detecting a voltage signal reflecting the change of the IGBT grid resistance and outputting a fault detection signal when the resistance value of the IGBT grid resistance is increased; the second detection circuit is used for detecting a voltage signal reflecting the change of the grid resistance of the IGBT and outputting a fault detection signal when the detected voltage signal is higher than a set upper limit threshold or lower than a set lower limit threshold; the gate fault detection circuit comprises an AND gate circuit, a first detection circuit, a second detection circuit and a drive chip of the IGBT, wherein the AND gate circuit is used for receiving fault signals output by the first detection circuit and the second detection circuit and outputting fault determination signals to the drive chip of the IGBT when the first detection circuit and the second detection circuit simultaneously output the fault signals.
Description
Technical Field
The invention relates to a fault detection system, in particular to an IGBT grid resistance fault detection system.
Background
The IGBT is used as a novel semiconductor power device, is widely applied to the fields of industry, rail transit, wind power generation, new energy automobiles and the like, and plays a vital role in the aspect of motor driving. The frequency converter utilizes IGBT to form a motor control device, can carry out soft start and speed regulation on the motor, and is beneficial to improving the production efficiency.
The IGBT is a key factor for reliability in an electronic power system, and the IGBT usually works under high voltage and large current, so a gate resistor is connected in series to the gate of the IGBT, and the role of the gate resistor is mainly expressed in three aspects: (1) a capacitive structure is formed between the grid electrode and the emitter electrode of the IGBT, parasitic inductance exists in a grid electrode loop, and if no grid electrode resistance exists, the grid electrode loop generates strong oscillation under the excitation of a drive pulse of a driver, so that the IGBT cannot work normally; (2) the driving current is limited, the power loss of the driver is transferred, the capacitance and the inductance are all reactive elements, if no grid resistance exists, most of the driving power is consumed on an output tube in the driver, and the temperature of the output tube is increased quickly; (3) the on-off speed of the power switch device is adjusted, the grid resistance is small, the on-off of the IGBT is fast, and the switching loss is small; otherwise, the speed is low, the switching loss value is increased, and the voltage and current change rate of the switching device is greatly improved due to the excessively high driving speed, so that larger interference is generated, and the whole device can not work seriously. Therefore, whether the gate resistance of the IGBT is normal or not is related to whether the IGBT and the driving circuit of the IGBT and the entire electronic system applied to the IGBT can reliably operate or not. In the use process of the grid resistance of the IGBT, if the grid resistance is damaged or is not lightened, the actual grid resistance of the IGBT is increased, so that the conduction time of the IBGT is prolonged, and when the IGBT is applied to an inverter bridge, the conduction time of two IBGT of the same bridge arm is overlapped, so that a short circuit is formed, and the whole system is damaged.
In the prior art, the fault detection of the gate resistance of the IGBT mainly adopts the following three modes:
the first is to judge by collecting the voltage between the collector and emitter of the IGBT itself, the second is to judge by detecting the current in a manner like a hall sensor, and the third is to judge by using the voltage and current between the collector and emitter of the multi-stage IGBT, however, the existing methods have the following defects:
first, it cannot be determined whether the IBGT itself or the gate resistance is faulty, but only whether the IBGT and its drive are faulty, but whether the gate resistance of the IBGT is faulty or not;
secondly, a Hall sensor is adopted, due to the frequency bandwidth of the sensor, the sampling delay of a controller and the like, the real-time performance is poor, and the grid fault of the IGBT cannot be found in time;
thirdly, a plurality of logic devices such as CP L D or FPGA are required to be configured for judgment, so that the whole structure is loaded, the cost is high, and accurate debugging is difficult.
Therefore, in order to solve the above technical problem, it is necessary to provide a new IGBT gate resistance failure detection apparatus or method.
Disclosure of Invention
In view of this, the present invention provides a system for detecting a gate resistance fault of an IGBT, which can accurately detect a gate fault of an IGBT in real time, so as to ensure the stability of the operation of the IGBT and further ensure the reliability and safety of a power electronic system using the IGBT.
The invention provides an IGBT grid resistance fault detection system, which comprises a first detection circuit, a second detection circuit and an AND gate circuit, wherein the first detection circuit is connected with the second detection circuit;
the first detection circuit is used for detecting a voltage signal reflecting the change of the IGBT grid resistance and outputting a fault detection signal when the resistance value of the IGBT grid resistance is increased;
the second detection circuit is used for detecting a voltage signal reflecting the change of the grid resistance of the IGBT and outputting a fault detection signal when the detected voltage signal is higher than a set upper limit threshold or lower than a set lower limit threshold;
and the AND gate circuit is used for receiving the fault signals output by the first detection circuit and the second detection circuit and outputting a fault determination signal to the drive chip of the IGBT when the first detection circuit and the second detection circuit simultaneously output the fault signals.
Further, the first detection circuit comprises a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a diode D1, a diode D2, a diode D3, a diode D4, a triode Q1, a triode Q2, a triode Q3, a triode Q4, a triode Q5, a capacitor C6 and a capacitor C7;
one end of a diode D1 is connected with a common connection point between an IGBT grid resistor and an output pin of a driving chip of the IGBT, the negative electrode of a diode D1 is connected with the base electrode of a triode Q1 through a resistor R10, the emitter electrode of a triode Q1 is connected with the common connection point between the IGBT grid resistor and the grid electrode of the IGBT, the base electrode of a triode Q1 is connected with the emitter electrode of a triode Q1 through a resistor R11, the collector electrode of a triode Q1 is connected with one end of a resistor R13 through a resistor R12, the other end of a resistor R13 is connected with a +15V power supply, one end of a capacitor C1 is connected with a +15V power supply, the other end of a capacitor C1 is connected with the base electrode of a triode Q2, the base electrode of the triode Q2 is connected with the common connection point between a resistor R12 and a resistor R13, the emitter electrode of the triode Q2 is connected with a +15V power supply, the collector electrode of a triode Q9 is connected with the positive, a common connection point between the resistor R15 and the resistor R17 is connected with a base electrode of a triode Q3 through a resistor R15, an emitting electrode of the triode Q3 is connected with a-10V power supply, a common connection point between the resistor R15 and the resistor R17 is connected with the-10V power supply through a capacitor C7, a collector electrode of the triode Q3 is connected with a +15V power supply through a resistor R14, a collector electrode of the triode Q3 is connected with a base electrode of a triode Q5, an emitting electrode of the triode Q5 is connected with the-10V power supply, a collector electrode of the triode Q5 is connected with the +15V power supply through a resistor R20, and a collector electrode of the triode Q5 serves as an;
an emitter of the triode Q4 is connected to a common connection point between a gate resistor of the IGBT and the gate of the IGBT, an emitter of the triode Q4 is connected with a base of the triode Q4 through a resistor R18, a base of the triode Q4 is connected with an anode of the diode D2 through a resistor R19, a cathode of the diode D2 is connected to a common connection point between the gate resistor of the IGBT and an output pin of a driving chip of the IGBT, a collector of the triode Q4 is connected with an anode of the diode D4, and a cathode of the diode D4 is connected to a common connection point between a cathode of the diode D3 and the resistor R15.
Further, the second detection circuit comprises an input amplification circuit, a delay comparison circuit and an inverted output circuit;
the output end of the input amplifying circuit is connected with the input end of the delay comparison circuit, the output end of the delay comparison circuit is connected with the input end of the inverting output circuit, and the output end of the inverting output circuit is used as the detection output end of the second detection circuit.
Further, the input amplifying circuit comprises a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and an operational amplifier U1;
one end of the capacitor C1 is used as a first input end of the input amplifying circuit, the other end of the capacitor C1 is connected with the inverting end of the operational amplifier U1 through a resistor R2, and the inverting end of the operational amplifier U1 is connected with the output end of the operational amplifier U1 after being connected in parallel through a resistor R4 and a capacitor C3;
one end of a capacitor C2 is used as a second input end of the input amplifying circuit, the other end of a capacitor C2 is connected to the in-phase end of an operational amplifier U1 through a resistor R3, the in-phase end of the operational amplifier U1 is connected in parallel with a capacitor C4 through a resistor R5 and then connected with a-10V power supply, one end of a resistor R1 is connected to a common connection point between the capacitor C1 and a resistor R2, and the other end of the resistor R1 is connected to a common connection point between the capacitor C2 and the resistor R3;
the output end of the operational amplifier U1 is connected with one end of a resistor R6, and the other end of the resistor R6 is used as the output end of the input amplifying circuit;
and the first input end and the second input end of the input amplifying circuit are respectively connected to two ends of the IGBT grid resistor.
Further, the delay comparison circuit comprises a comparator U2, a comparator U3, a resistor R7, a resistor R8, a resistor R9 and a capacitor C5;
one end of the resistor R7 is connected with a +15V power supply, the other end of the resistor R7 is connected with one end of the resistor R9 through a resistor R8, and the other end of the resistor R9 is connected with a-10V power supply;
the in-phase end of the comparator U2 is connected to the output end of the input amplifying circuit, and the inverting end of the comparator U2 is connected to the common connection point between the resistor R7 and the resistor R8;
the inverting end of the comparator U3 is connected to the output end of the input amplifying circuit, and the non-inverting end of the comparator U2 is connected to the common connection point between the resistor R8 and the resistor R9; the output ends of the comparator U2 and the comparator U3 are used as the output ends of the delay comparison circuit;
the inverting terminal of the comparator U2 is connected to the non-inverting terminal of the comparator U3 through a capacitor C5.
The invention has the beneficial effects that: the invention can accurately detect the grid fault of the IGBT in real time, thereby ensuring the working stability of the IGBT and further ensuring the reliability and safety of a power electronic system applying the IGBT.
Drawings
The invention is further described below with reference to the following figures and examples:
FIG. 1 is a schematic structural diagram of the present invention.
Fig. 2 is a schematic diagram of a first detection circuit of the present invention.
FIG. 3 is a schematic diagram of a second detection circuit of the present invention.
Fig. 4 is a schematic diagram of IGBT gate resistance connection according to the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings of the specification:
the invention provides an IGBT grid resistance fault detection system, which comprises a first detection circuit, a second detection circuit and an AND gate circuit, wherein the first detection circuit is connected with the second detection circuit;
the first detection circuit is used for detecting a voltage signal reflecting the change of the IGBT grid resistance and outputting a fault detection signal when the resistance value of the IGBT grid resistance is increased;
the second detection circuit is used for detecting a voltage signal reflecting the change of the grid resistance of the IGBT and outputting a fault detection signal when the detected voltage signal is higher than a set upper limit threshold or lower than a set lower limit threshold;
the invention can accurately detect the grid fault of the IGBT in real time, thereby ensuring the working stability of the IGBT and further ensuring the reliability and safety of a power electronic system applying the IGBT.
In this embodiment, the first detection circuit includes a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a diode D1, a diode D2, a diode D3, a diode D4, a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q4, a transistor Q5, a capacitor C6, and a capacitor C7;
one end of a diode D1 is connected with a common connection point between an IGBT grid resistor and an output pin of a driving chip of the IGBT, the negative electrode of a diode D1 is connected with the base electrode of a triode Q1 through a resistor R10, the emitter electrode of a triode Q1 is connected with the common connection point between the IGBT grid resistor and the grid electrode of the IGBT, the base electrode of a triode Q1 is connected with the emitter electrode of a triode Q1 through a resistor R11, the collector electrode of a triode Q1 is connected with one end of a resistor R13 through a resistor R12, the other end of a resistor R13 is connected with a +15V power supply, one end of a capacitor C1 is connected with a +15V power supply, the other end of a capacitor C1 is connected with the base electrode of a triode Q2, the base electrode of the triode Q2 is connected with the common connection point between a resistor R12 and a resistor R13, the emitter electrode of the triode Q2 is connected with a +15V power supply, the collector electrode of a triode Q9 is connected with the positive, a common connection point between the resistor R15 and the resistor R17 is connected with a base electrode of a triode Q3 through a resistor R15, an emitting electrode of the triode Q3 is connected with a-10V power supply, a common connection point between the resistor R15 and the resistor R17 is connected with the-10V power supply through a capacitor C7, a collector electrode of the triode Q3 is connected with a +15V power supply through a resistor R14, a collector electrode of the triode Q3 is connected with a base electrode of a triode Q5, an emitting electrode of the triode Q5 is connected with the-10V power supply, a collector electrode of the triode Q5 is connected with the +15V power supply through a resistor R20, and a collector electrode of the triode Q5 serves as an;
an emitter of a transistor Q4 is connected with a common connection point between a grid resistor of an IGBT and a grid of the IGBT, an emitter of a transistor Q4 is connected with a base of a transistor Q4 through a resistor R18, a base of a transistor Q4 is connected with an anode of a diode D2 through a resistor R19, a cathode of a diode D2 is connected with a common connection point between a grid resistor of the IGBT and an output pin of a driving chip of the IGBT, a collector of a transistor Q4 is connected with an anode of a diode D4, a cathode of a diode D4 is connected with a common connection point between a cathode of a diode D3 and a resistor R15, in the circuit, when a pulse electric driving signal output by a driving circuit (or a driving chip) of the IGBT is positive half cycle, if the grid resistor of the IGBT increases, a voltage difference between the anode of a diode D1 and the emitter of the transistor Q1 increases, when an on-voltage of the transistor Q1 is reached, the transistor Q1, the base voltage of the triode Q2 is pulled down, so that the triode Q2 is conducted, the triode Q3 is conducted, and the collector of the triode Q3 outputs low level; when the pulse driving signal is in the negative half cycle, when the falling edge of the pulse signal falls to the negative voltage signal, if the resistance value of the gate resistor increases, the voltage does not change due to the presence of the IGBT gate capacitor at the right end of the gate resistor (referring to fig. 4, for brevity, the end connected to the driving chip is the left end, and the end connected to the IGBT gate resistor and the IGBT gate is the right end), at this time, the voltage difference between the right end and the left end of the IGBT gate resistor increases, so that a reverse bias voltage of the transistor Q4 is formed, the transistor Q4 is turned on, so that the capacitor C7 is charged, and further the transistor Q3 is controlled to be turned on, the collector of the transistor Q3 outputs a low level, and the transistor Q5 is used for inverting the level signal of the transistor Q3, so that when the transistor Q3 outputs a low level, the collector of the transistor Q5 outputs a high level, which.
In this embodiment, the second detection circuit includes an input amplification circuit, a delay comparison circuit, and an inverting output circuit;
the output end of the input amplifying circuit is connected with the input end of the delay comparison circuit, the output end of the delay comparison circuit is connected with the input end of the inverting output circuit, and the output end of the inverting output circuit is used as the detection output end of the second detection circuit.
Specifically, the method comprises the following steps: the input amplifying circuit comprises a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and an operational amplifier U1;
one end of the capacitor C1 is used as a first input end of the input amplifying circuit, the other end of the capacitor C1 is connected with the inverting end of the operational amplifier U1 through a resistor R2, and the inverting end of the operational amplifier U1 is connected with the output end of the operational amplifier U1 after being connected in parallel through a resistor R4 and a capacitor C3;
one end of a capacitor C2 is used as a second input end of the input amplifying circuit, the other end of a capacitor C2 is connected to the in-phase end of an operational amplifier U1 through a resistor R3, the in-phase end of the operational amplifier U1 is connected in parallel with a capacitor C4 through a resistor R5 and then connected with a-10V power supply, one end of a resistor R1 is connected to a common connection point between the capacitor C1 and a resistor R2, and the other end of the resistor R1 is connected to a common connection point between the capacitor C2 and the resistor R3;
the output end of the operational amplifier U1 is connected with one end of a resistor R6, and the other end of the resistor R6 is used as the output end of the input amplifying circuit;
the first input end and the second input end of the input amplifying circuit are respectively connected to two ends of the IGBT grid resistor, that is, any one of the first input end and the second input end of the input amplifying circuit is connected to the left end or the right end of the IGBT grid resistor, so that fault detection of the grid resistor can be realized, wherein the capacitor C1 is used for detecting the resistance state of the grid resistor when the pulse driving signal is in a positive half cycle, and the capacitor C2 is used for detecting the resistance state of the grid resistor when the pulse driving signal is in a negative half cycle.
The delay comparison circuit comprises a comparator U2, a comparator U3, a resistor R7, a resistor R8, a resistor R9 and a capacitor C5;
one end of the resistor R7 is connected with a +15V power supply, the other end of the resistor R7 is connected with one end of the resistor R9 through a resistor R8, and the other end of the resistor R9 is connected with a-10V power supply;
the in-phase end of the comparator U2 is connected to the output end of the input amplifying circuit, and the inverting end of the comparator U2 is connected to the common connection point between the resistor R7 and the resistor R8;
the inverting end of the comparator U3 is connected to the output end of the input amplifying circuit, and the non-inverting end of the comparator U2 is connected to the common connection point between the resistor R8 and the resistor R9; the output ends of the comparator U2 and the comparator U3 are used as the output ends of the delay comparison circuit;
the inverting terminal of the comparator U2 is connected with the inverting terminal of the comparator U3 through a capacitor C5, wherein the capacitor C1, the capacitor C2 and a resistor R1 form an input filter circuit, the input filter circuit is a high-frequency filter circuit, a driving waveform interference spike caused by stray inductance is effectively filtered, as the driving signal is a pulse signal, when the driving signal is in a positive half cycle of the pulse driving signal, the positive half cycle pulse signal is filtered through the capacitor C1 and the resistor R1, then the filtered positive half cycle pulse signal is input into the operational amplifier U1 for amplification, then the amplified positive half cycle pulse signal is input into the comparator U2 for comparison, the voltage is compared with a set upper limit threshold, and when the voltage is greater than the upper limit threshold, the comparator outputs a high-level fault signal to represent that the current IGBT gate resistance is in a fault state; when the negative half cycle of the pulse signal is detected, filtering is carried out through a capacitor C2 and a resistor R1, the filtered signal is input to an inverting terminal of an operational amplifier U1 to be amplified, and then the amplified signal is output to a comparator U3 to be compared, when the voltage value of the negative half cycle of the pulse signal is lower than a lower limit threshold value, the comparator U3 outputs a high-level fault signal to represent that the current IGBT grid resistance is in a fault state, and when the first detection circuit and the second detection circuit both have the high-level fault signal, the AND gate circuit outputs a fault confirmation signal to determine that the current IGBT grid resistance is in fault.
Fig. 4 is a schematic diagram of driving an IGBT, IC is an IGBT driving chip, and RG is a gate resistance of the IGBT.
Finally, the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all of them should be covered in the claims of the present invention.
Claims (5)
1. The utility model provides a IGBT grid resistance fault detection system which characterized in that: the circuit comprises a first detection circuit, a second detection circuit and an AND gate circuit;
the first detection circuit is used for detecting a voltage signal reflecting the change of the IGBT grid resistance and outputting a fault detection signal when the resistance value of the IGBT grid resistance is increased;
the second detection circuit is used for detecting a voltage signal reflecting the change of the grid resistance of the IGBT and outputting a fault detection signal when the detected voltage signal is higher than a set upper limit threshold or lower than a set lower limit threshold;
and the AND gate circuit is used for receiving the fault signals output by the first detection circuit and the second detection circuit and outputting a fault determination signal to the drive chip of the IGBT when the first detection circuit and the second detection circuit simultaneously output the fault signals.
2. The IGBT gate resistance fault detection system of claim 1, wherein: the first detection circuit comprises a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a diode D1, a diode D2, a diode D3, a diode D4, a triode Q1, a triode Q2, a triode Q3, a triode Q4, a triode Q5, a capacitor C6 and a capacitor C7;
one end of a diode D1 is connected with a common connection point between an IGBT grid resistor and an output pin of a driving chip of the IGBT, the negative electrode of a diode D1 is connected with the base electrode of a triode Q1 through a resistor R10, the emitter electrode of a triode Q1 is connected with the common connection point between the IGBT grid resistor and the grid electrode of the IGBT, the base electrode of a triode Q1 is connected with the emitter electrode of a triode Q1 through a resistor R11, the collector electrode of a triode Q1 is connected with one end of a resistor R13 through a resistor R12, the other end of a resistor R13 is connected with a +15V power supply, one end of a capacitor C1 is connected with a +15V power supply, the other end of a capacitor C1 is connected with the base electrode of a triode Q2, the base electrode of the triode Q2 is connected with the common connection point between a resistor R12 and a resistor R13, the emitter electrode of the triode Q2 is connected with a +15V power supply, the collector electrode of a triode Q9 is connected with the positive, a common connection point between the resistor R15 and the resistor R17 is connected with a base electrode of a triode Q3 through a resistor R15, an emitting electrode of the triode Q3 is connected with a-10V power supply, a common connection point between the resistor R15 and the resistor R17 is connected with the-10V power supply through a capacitor C7, a collector electrode of the triode Q3 is connected with a +15V power supply through a resistor R14, a collector electrode of the triode Q3 is connected with a base electrode of a triode Q5, an emitting electrode of the triode Q5 is connected with the-10V power supply, a collector electrode of the triode Q5 is connected with the +15V power supply through a resistor R20, and a collector electrode of the triode Q5 serves as an;
an emitter of the triode Q4 is connected to a common connection point between a gate resistor of the IGBT and the gate of the IGBT, an emitter of the triode Q4 is connected with a base of the triode Q4 through a resistor R18, a base of the triode Q4 is connected with an anode of the diode D2 through a resistor R19, a cathode of the diode D2 is connected to a common connection point between the gate resistor of the IGBT and an output pin of a driving chip of the IGBT, a collector of the triode Q4 is connected with an anode of the diode D4, and a cathode of the diode D4 is connected to a common connection point between a cathode of the diode D3 and the resistor R15.
3. The IGBT gate resistance fault detection system of claim 1, wherein: the second detection circuit comprises an input amplification circuit and a delay comparison circuit;
the output end of the input amplifying circuit is connected with the input end of the delay comparison circuit, and the output end of the delay comparison circuit is used as the detection output end of the second detection circuit.
4. The IGBT gate resistance fault detection system of claim 3, wherein: the input amplifying circuit comprises a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and an operational amplifier U1;
one end of the capacitor C1 is used as a first input end of the input amplifying circuit, the other end of the capacitor C1 is connected with the inverting end of the operational amplifier U1 through a resistor R2, and the inverting end of the operational amplifier U1 is connected with the output end of the operational amplifier U1 after being connected in parallel through a resistor R4 and a capacitor C3;
one end of a capacitor C2 is used as a second input end of the input amplifying circuit, the other end of a capacitor C2 is connected to the in-phase end of an operational amplifier U1 through a resistor R3, the in-phase end of the operational amplifier U1 is connected in parallel with a capacitor C4 through a resistor R5 and then connected with a-10V power supply, one end of a resistor R1 is connected to a common connection point between the capacitor C1 and a resistor R2, and the other end of the resistor R1 is connected to a common connection point between the capacitor C2 and the resistor R3;
the output end of the operational amplifier U1 is connected with one end of a resistor R6, and the other end of the resistor R6 is used as the output end of the input amplifying circuit;
and the first input end and the second input end of the input amplifying circuit are respectively connected to two ends of the IGBT grid resistor.
5. The IGBT gate resistance fault detection system of claim 3, wherein: the delay comparison circuit comprises a comparator U2, a comparator U3, a resistor R7, a resistor R8, a resistor R9 and a capacitor C5;
one end of the resistor R7 is connected with a +15V power supply, the other end of the resistor R7 is connected with one end of the resistor R9 through a resistor R8, and the other end of the resistor R9 is connected with a-10V power supply;
the in-phase end of the comparator U2 is connected to the output end of the input amplifying circuit, and the inverting end of the comparator U2 is connected to the common connection point between the resistor R7 and the resistor R8;
the inverting end of the comparator U3 is connected to the output end of the input amplifying circuit, and the non-inverting end of the comparator U2 is connected to the common connection point between the resistor R8 and the resistor R9; the output ends of the comparator U2 and the comparator U3 are used as the output ends of the delay comparison circuit;
the inverting terminal of the comparator U2 is connected to the non-inverting terminal of the comparator U3 through a capacitor C5.
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CN202010478597.6A CN111474460B (en) | 2020-05-29 | 2020-05-29 | IGBT grid resistance fault detection system |
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