CN101344572B - Chopped wave test circuit and method for semiconductor power device - Google Patents
Chopped wave test circuit and method for semiconductor power device Download PDFInfo
- Publication number
- CN101344572B CN101344572B CN 200810212231 CN200810212231A CN101344572B CN 101344572 B CN101344572 B CN 101344572B CN 200810212231 CN200810212231 CN 200810212231 CN 200810212231 A CN200810212231 A CN 200810212231A CN 101344572 B CN101344572 B CN 101344572B
- Authority
- CN
- China
- Prior art keywords
- power device
- semiconductor power
- inductance
- conducting
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention discloses a semiconductor power apparatus chopped wave test circuit adopting an inductance as a test load. When the recovery voltage of a first semiconductor power apparatus is tested, the inductance is connected with an anode of a power supply; when the recovery voltage of a second semiconductor power apparatus is tested, the inductance is connected with a cathode of the power supply. The invention also discloses a semiconductor power apparatus chopped wave test method including the following steps: when the first semiconductor apparatus is tested, the action of the second semiconductor power apparatus is controlled to get the recovery voltage of the first semiconductor power apparatus; when the second semiconductor power apparatus is tested, the action of the first semiconductor power apparatus is controlled to obtain the recovery voltage of the second semiconductor power apparatus. The test circuit and the test method provided by the invention can realize the effective test to the recovery voltage of a freewheeling diode in the semiconductor power apparatus.
Description
Technical field
The present invention relates to semiconductor applications, relate in particular to a kind of semiconductor power device chopped wave test circuit and method.
Background technology
Traction convertor in the rail vehicle electrical system refers to the AC-DC-AC converter system to the mains electricity locomotive, is the DC-AC inversion system to city underground and light rail.Along with Development of Power Electronic Technology, their application in rail vehicle are also in progress and development constantly.Semiconductor power device in these converter systems has experienced the evolution from half control type thyristor (SCR), full-control type thyristor (GTO) to insulated gate bipolar transistor (IGBT).
Insulated gate bipolar transistor IGBT is a kind of multiple device, is combined with transistor by the MOSFET pipe, and serves as driving by the former.It belongs to the full-controlled switch device of driven, pulse switch frequency height, and performance is good, and loss is little, and the self-shield ability is also strong.For this reason, no matter be all to adopt the IGBT module to constitute in the main line railway or the electrical system of the electric vehicle of city rail in the world at present.
After the current transformer device fabrication is finished, need just can come into operation by a series of test, the wherein work that can semiconductor power device in the testing power module and driving circuit thereof safe and reliable under the operating mode that requires is one of important indicator of current transformer equipment electric property.At present, this test is generally undertaken by the method for copped wave.
In the prior art, the copped wave method of testing is to adopt the spike train of low frequency fixed pulse width as triggering mode, and conducting electric current, the cut-off voltage of semiconductor power device are tested.In this test, respectively the brachium pontis top tube and down tube in the power model are carried out the copped wave test.
Referring to shown in Figure 1, be semiconductor power device chopped wave test circuit synoptic diagram in the prior art.In this test circuit, comprise power supply E, capacitor C 1, semiconductor power device IPM1 and IPM2, wherein the positive pole of power supply E connects the positive pole of capacitor C 1 and the collector of IPM1, and the emitter of IPM1 links to each other with the collector of IPM2, and the negative pole of the emitter of IPM2 and capacitor C 1 is connected to the negative pole of power supply E.
In the copped wave test, power supply E gives and supports capacitor C 1 charging until the magnitude of voltage that requires, the low frequency and continuous pulse signal of 100 μ s～300 μ s is provided for the driving circuit of tested semiconductor power device by signal generator unit, drive semiconductor power device conducting, shutoff with this, detect Key Performance Indicators such as the cut-off voltage of semiconductor power device IPM1 or IPM2 and conducting electric current by welding wave measuring instrument between P, M or M, N.
Referring to Fig. 2, be the circuit diagram of in the prior art pipe IPM1 on the brachium pontis being tested.When test, load R is connected between M, the N, waveform meter is connected between P, the M.At first allow the IPM1 conducting, IPM2 turn-offs, and this moment, IPM1 was equivalent to short circuit, and IPM2 is equivalent to open circuit, and supply voltage almost completely is added in the resistance R two ends, obtains the electric current at IPM1 two ends by waveform meter, is the conducting current value of IPM1 under conducting state; Allow IPM1 turn-off then, because there are stray inductance in circuit and electron device in the circuit, and the not mutability of electric current, can produce surge voltage and be superimposed upon on the IPM1, at this moment, the voltage that obtains the IPM1 two ends by waveform meter is the cut-off voltage value of IPM1.
Referring to Fig. 3, in the prior art brachium pontis being managed the circuit diagram that IPM2 tests down.When test, load R is connected between P, the M, waveform meter is connected between M, the N.Testing process is measured conducting current value and the cut-off voltage value of IPM2 respectively with above-mentioned similar.
But, only to the conducting electric current of semiconductor power device with to test by voltage be not enough, modern quick semiconductor power device requires to adopt fast diode as fly-wheel diode, in the opening process of semiconductor power device each time, fly-wheel diode switches to reverse blocking state by forward conduction, this crosses the characteristic that the range request diode has soft recovery, along with the raising of the switching frequency of power component in the current transformer equipment, the operating characteristic of fly-wheel diode more and more comes into one's own.
In the prior art, adopt spike train as triggering mode, pulsed frequency requires low-down frequency, fly-wheel diode oppositely ended before the trigger action in the second time, therefore conducting electric current and cut-off voltage that can only the measuring semiconductor power device can not carry out Validity Test to the recovery voltage of wherein fly-wheel diode.
In addition, in the prior art, the spike train that adopts the low frequency fixed pulse width repeatedly is under the duty of big electric current, high cut-off voltage semiconductor power device as triggering mode, and power device is had certain loss.
Summary of the invention
Technical matters to be solved by this invention provides a kind of semiconductor power device chopped wave test circuit and method, and this test circuit and method can realize the Validity Test to the recovery voltage of fly-wheel diode in the semiconductor power device.
The invention provides a kind of semiconductor power device chopped wave test circuit; comprise power supply; electric capacity; first semiconductor power device; and second semiconductor power device; positive source connects the positive pole of electric capacity and the collector of first semiconductor power device; the emitter of first semiconductor power device links to each other with the collector of second semiconductor power device; the emitter of second semiconductor power device and the negative pole of electric capacity connect the negative pole of power supply; this circuit also comprises inductance; pulse signal generator; drive protected location; and test lead; wherein
Described inductance one terminates at the common port of described first semiconductor power device and described second semiconductor power device, the described test lead of another termination;
Described pulse signal generator links to each other with described driving protected location, is used to provide pulse signal;
Described driving protected location links to each other with the gate pole of described first semiconductor power device and the gate pole of described second semiconductor power device respectively, is used for described pulse signal is handled the action of control semiconductor power device;
Described test lead is used for when the recovery voltage of described first semiconductor power device is tested, connect described inductance and described positive source, when the recovery voltage of described second semiconductor power device is tested, connect described inductance and described power cathode.
Wherein, this circuit further comprises current sensor and over-current detection unit, wherein, described current sensor and the series connection of described inductance, described over-current detection unit is connected between described current sensor and the described driving protected location, wherein,
Described current sensor is used to monitor the current value on the inductance, and described current value is sent to over-current detection unit;
Described over-current detection unit is used to judge whether described current value surpasses threshold value, if surpass, sends control signals to described driving protected location;
Described driving protected location is used for producing and the corresponding pulse signal of described control signal, turn-offs corresponding semiconductor power device.
Wherein, described pulse signal generator is the dipulse signal generator.
The invention provides a kind of semiconductor power device copped wave method of testing, this method specifically may further comprise the steps:
Connect inductance and positive source by test lead;
Make first semiconductor power device be in normal off and open state, conducting second semiconductor power device;
Turn-off described second semiconductor power device;
Described second semiconductor power device of conducting records the magnitude of voltage at the instantaneous described first semiconductor power device two ends of conducting once more, is the recovery voltage value of described first semiconductor power device;
Connect described inductance and described power cathode by described test lead;
Make described second semiconductor power device be in normal off and open state, described first semiconductor power device of conducting;
Turn-off described first semiconductor power device;
Described first semiconductor power device of conducting records the magnitude of voltage at the instantaneous described second semiconductor power device two ends of conducting once more, is the recovery voltage value of described second semiconductor power device.
Wherein, at described conducting second semiconductor power device with turn-off between described second semiconductor power device, further comprise: record the electric current on described second semiconductor power device, obtain the conducting current value.
Wherein, at described second semiconductor power device of described shutoff with once more between described second semiconductor power device of conducting, further comprise: record the voltage at the described second semiconductor power device two ends, obtain the cut-off voltage value.
Wherein, at described first semiconductor power device of described conducting with turn-off between described first semiconductor power device, further comprise: record the electric current on described first semiconductor power device, obtain the conducting current value.
Wherein, at described first semiconductor power device of described shutoff with once more between described first semiconductor power device of conducting, further comprise: record the voltage at the described first semiconductor power device two ends, obtain the cut-off voltage value.
Wherein, this method further comprises: the current value on the monitoring inductance, judge that whether described current value surpasses threshold value, if surpass, turn-offs corresponding semiconductor power device.
Wherein, provide trigger pulse by the dipulse signal generator to semiconductor power device.
Wherein, carry out the measurement of current value and magnitude of voltage by waveform meter.
The present invention has following beneficial effect:
In semiconductor power device chopped wave test circuit provided by the present invention, adopt inductance as test load, when the recovery voltage of first semiconductor power device is tested, connect inductance and positive source, when the recovery voltage of second semiconductor power device is tested, connect inductance and power cathode.In semiconductor power device copped wave method of testing provided by the present invention, when first semiconductor power device is tested, control second semiconductor power device and turn-off conducting once more from being conducting to, record the recovery voltage value that the instantaneous first semiconductor power device both end voltage value of conducting once more is this device, when second semiconductor power device is tested, control first semiconductor power device and turn-off conducting once more, record the recovery voltage value that the instantaneous second semiconductor power device both end voltage value of conducting once more is this device from being conducting to.
Compared with prior art, adopt inductance as test load, by 2 very short pulses of interval time, the recovery voltage of fly-wheel diode on the measuring semiconductor power device effectively.
Simultaneously, in circuit provided by the present invention and the method, adopt the dipulse triggering of single to test, once semiconductor power device is only opened, turn-offed to test respectively once, reduced the impact to power device effectively.
Description of drawings
Fig. 1 is a semiconductor power device chopped wave test circuit synoptic diagram in the prior art;
The circuit diagram of Fig. 2 in the prior art pipe IPM1 on the brachium pontis being tested;
Fig. 3 is for managing the circuit diagram that IPM2 tests down to brachium pontis in the prior art;
Fig. 4 is semiconductor power device chopped wave test circuit synoptic diagram that first embodiment of the invention provided;
Fig. 5 is semiconductor power device chopped wave test circuit synoptic diagram that second embodiment of the invention provided;
The circuit diagram of Fig. 6 in the second embodiment of the invention recovery voltage of IPM1 being tested;
The circuit diagram of Fig. 7 in the second embodiment of the invention recovery voltage of IPM2 being tested;
Fig. 8 is semiconductor power device copped wave method of testing process flow diagram that first embodiment of the invention provided;
The waveform synoptic diagram of Fig. 9 a gate pole trigger pip when the recovery voltage of IPM1 tested;
The waveform synoptic diagram of Fig. 9 b IPM2 both end voltage when the recovery voltage of IPM1 tested;
The waveform synoptic diagram of Fig. 9 c IPM1 both end voltage when the recovery voltage of IPM1 tested;
Fig. 9 d waveform synoptic diagram of electric current on the inductance L when the recovery voltage of IPM1 tested;
The waveform synoptic diagram of Figure 10 a gate pole trigger pip when the recovery voltage of IPM2 tested;
The waveform synoptic diagram of Figure 10 b IPM1 both end voltage when the recovery voltage of IPM2 tested;
The waveform synoptic diagram of Figure 10 c IPM2 both end voltage when the recovery voltage of IPM2 tested;
Figure 10 d waveform synoptic diagram of electric current on the inductance L when the recovery voltage of IPM2 tested.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.
Referring to Fig. 4, be the semiconductor power device chopped wave test circuit synoptic diagram that first embodiment of the invention provided.
In this test circuit; comprise power supply E; support capacitor C 1; semiconductor power device IPM1 and IPM2; inductance L; pulse signal generator; drive protected location and test lead; wherein; the positive pole of power supply E connects the positive pole of capacitor C 1 and the collector of IPM1; the emitter of IPM1 links to each other with the collector of IPM2; the negative pole of the emitter of IPM2 and capacitor C 1 is connected to the negative pole of power supply E; pulse signal generator connects the gate pole of IPM1 and the gate pole of IPM2 respectively by driving protected location; inductance L one terminates at the common port of semiconductor power device IPM1 and IPM2; one termination test lead; test lead is used for when the recovery voltage of semiconductor power device IPM1 is tested; the positive pole that connects inductance L and power supply E; when the recovery voltage of semiconductor power device IPM2 is tested, connect the negative pole of inductance L and power supply E.
Referring to Fig. 5, be the semiconductor power device chopped wave test circuit synoptic diagram that second embodiment of the invention provided.
In this test circuit; comprise power supply E; support capacitor C 1; semiconductor power device IPM1 and IPM2; inductance L; current sensor CT; over-current detection unit; the dipulse signal generator; drive protected location; and test lead; wherein; the positive pole of power supply E connects the positive pole of capacitor C 1 and the collector of IPM1; the emitter of IPM1 links to each other with the collector of IPM2; the negative pole of the emitter of IPM2 and capacitor C 1 is connected to the negative pole of power supply E; the dipulse signal generator connects the gate pole of IPM1 and the gate pole of IPM2 respectively by driving protected location; inductance L and current sensor CT series connection; one terminates at the common port of semiconductor power device IPM1 and IPM2; another termination test lead; over-current detection unit is connected on current sensor CT and drives between the protected location; test lead is used for when the recovery voltage of semiconductor power device IPM1 is tested; the positive pole that connects current sensor CT and power supply E; when the recovery voltage of semiconductor power device IPM2 is tested, connect the negative pole of current sensor CT and power supply E.
In this test circuit, the dipulse signal generator is used to the trigger pulse that provides single, through the processing and amplifying of the protected location of overdriving, sends to the gate drive circuit of semiconductor power device IPM1 and IPM2, makes semiconductor power device open or turn-off; Current sensor CT is used to monitor the current value on the inductance, and this current value is sent to over-current detection unit; Over-current detection unit is used to judge whether current value surpasses pre-set threshold, if surpass, sends control signals to the driving protected location; Drive protected location according to the control signal that receives, turn-off the pulse triggering signal that the dipulse signal generator sends, to turn-off corresponding semiconductor power device.
The test circuit that is provided in the present embodiment comprises two kinds of methods of attachment, respectively pipe IPM1 on the brachium pontis in the power model and following pipe IPM2 is carried out the copped wave test.
Referring to Fig. 6, be the circuit diagram that the recovery voltage of IPM1 is tested.As shown in FIG., the positive pole that connects current sensor CT and power supply by test lead, make inductance L in parallel with IPM1, waveform meter is connected on the IPM1 two ends, be used for recording the recovery voltage value of IPM1 fly-wheel diode, waveform meter is connected on the IPM2 two ends, is used to record conducting electric current and the cut-off voltage of IPM2.
Referring to Fig. 7, be the circuit diagram that the recovery voltage of IPM2 is tested.As shown in FIG., the negative pole that connects current sensor CT and power supply by test lead, make inductance L in parallel with IPM2, waveform meter is connected on the IPM2 two ends, be used for recording the recovery voltage value of IPM2 fly-wheel diode, waveform meter is connected on the IPM1 two ends, is used to record conducting electric current and the cut-off voltage of IPM1.
Based on above-mentioned semiconductor power device chopped wave test circuit, the present invention also provides a kind of semiconductor power device copped wave method of testing, this method can realize the recovery voltage of semiconductor power device is tested, and can investigate the serviceability of semiconductor power device comprehensively.
Referring to Fig. 8, be the semiconductor power device copped wave method of testing process flow diagram that first embodiment of the invention provided, concrete steps are as described below:
Step 801: connect inductance and positive source by test lead;
Step 802: make first semiconductor power device be in normal off and open state, conducting second semiconductor power device;
Step 803: turn-off second semiconductor power device;
Step 804: conducting second semiconductor power device once more, record the magnitude of voltage at the instantaneous first semiconductor power device two ends of conducting, be the recovery voltage value of first semiconductor power device;
Step 805: connect inductance and power cathode by described test lead;
Step 806: make second semiconductor power device be in normal off and open state, conducting first semiconductor power device;
Step 807: turn-off first semiconductor power device;
Step 808: conducting first semiconductor power device once more, record the magnitude of voltage at the instantaneous second semiconductor power device two ends of conducting, be the recovery voltage value of second semiconductor power device.
Below the semiconductor power device copped wave method of testing that second embodiment of the invention provided is described in detail.
In semiconductor power device copped wave method of testing provided by the present invention, adopt inductance as test load, respectively pipe IPM1 on the brachium pontis in the power model and following pipe IPM2 are carried out the copped wave test.In test process, power supply E gives and supports capacitor C 1 charging until reaching the requirement magnitude of voltage, provide single trigger pulse to make semiconductor power device open or turn-off for the power model driving circuit by the dipulse signal generator, by the recovery voltage on the cut-off voltage on the waveform meter measuring semiconductor power device, conducting electric current and the fly-wheel diode, consider the serviceability of power device comprehensively.
In test; according to different test point of different periods; be divided into stable state and turn-off test and the test of overcurrent turn-off protection; test case is as shown in table 1; wherein, (A) connection is meant the two ends that load L are connected on IPM1, and this moment, the IPM1 normal off was opened; the examination device is IPM2, records the recovery voltage value IPM1U of fly-wheel diode among the IPM1
CD, the while can also record the stable state shutoff voltage of IPM2, i.e. cut-off voltage value IPM2U
CE, (B) connection is meant the two ends that load L are connected on IPM2, and this moment, the IPM2 normal off was opened, and the examination device is IPM1, records the recovery voltage value IPM2U of fly-wheel diode among the IPM2
CD, the while can also record the stable state shutoff voltage of IPM1, i.e. cut-off voltage value IPM1U
CE(U
CEBoth end voltage, i.e. cut-off voltage when turn-offing for the measuring semiconductor power device; U
CDOpen the recovery voltage of fly-wheel diode on the semiconductor power device for normal off.)
Semiconductor power device copped wave test case table is as shown in table 1:
Concrete method of testing flow process is as described below:
At first the recovery characteristics of diode among the pipe IPM1 on the brachium pontis is tested, referring to shown in Figure 9, be the waveform synoptic diagram of in the second embodiment of the invention recovery voltage of IPM1 being tested, wherein, 9a is the gate pole trigger pip waveform synoptic diagram of semiconductor power device; 9b is an IPM2 both end voltage waveform synoptic diagram; 9c is an IPM1 both end voltage waveform synoptic diagram; 9d is a current waveform synoptic diagram on the inductance L.
Adopt (A) connection; the dipulse signal generator provides single trigger pulse to make semiconductor power device open or turn-off for the gate drive circuit of semiconductor power device by driving protected location, and by waveform meter the correlated performance of device is tested.
At first, power supply E gives and supports capacitor C 1 charging until reaching the requirement magnitude of voltage;
Connect current sensor CT and positive source by test lead, make inductance L in parallel with semiconductor power device IPM1;
Waveform meter is connected on the IPM2 two ends, IPM1 keeps normal off state, provide first trigger pulse T1 by the dipulse signal generator for the gate drive circuit of IPM2, make it conducting, at the T1 stage pulse, inductance L is in charged state, current value constantly raises on it, this moment, supply voltage almost completely was added in load L two ends, that is to say the IPM1 two ends, in the circuit electric current by the positive pole of power supply E through over-current sensor CT, inductance L, IPM2 gets back to the negative pole of power supply E, and obtain flow through current value IPM2 on by waveform meter this moment, is the conducting current value of IPM2 under conducting state;
The T1 end-of-pulsing, the dipulse signal generator provides second trigger pulse T2 for the gate drive circuit of IPM2, make it to turn-off, at the T2 stage pulse, inductance L is in discharge condition, current value constantly reduces on it, at the T1 end-of-pulsing constantly, IPM2 becomes shutoff by conducting, inductance L discharge this moment, make the fly-wheel diode forward conduction among the IPM1, inductance L, current sensor CT, fly-wheel diode constitute the loop, and electric current is got back to the negative pole of fly-wheel diode through inductance L, current sensor CT by the positive pole of fly-wheel diode among the IPM1.In the moment that IPM2 turn-offs, because the existence of the stray inductance of circuit, produce a surge voltage during electric current commutation and be superimposed upon the IPM2 two ends, shown in the due to voltage spikes in the 9a oscillogram among Fig. 9, record this IPM2 both end voltage value constantly by waveform meter, then be the cut-off voltage value of power device IPM2;
Below, detect the restorability of fly-wheel diode among the IPM1, waveform meter is connected on the IPM1 two ends, the T2 end-of-pulsing, the dipulse signal generator provides the 3rd trigger pulse T3 for the gate drive circuit of IPM2, make it conducting once more, at this moment, because the existence of power supply E voltage, the fly-wheel diode among the IPM1 will be sported oppositely by forward conduction and end, both end voltage produces sudden change, and its transient voltage changing value is the recovery voltage of fly-wheel diode;
Below, IPM2 is carried out the test of overcurrent turn-off protection, waveform meter is connected on the IPM2 two ends, IPM1 keeps normal off state, can see by the current waveform of inductance L shown in the 9d among Fig. 9, at the T1 stage pulse, IPM2 is a conducting state, this moment, the current value on the inductance L constantly raise to the inductance L charging, and the current value when the TI end-of-pulsing on the inductance L is called cut-off current; At the T2 stage pulse, IPM1 is an off state, and this moment, the inductance L discharge made the fly-wheel diode forward conduction, and the current value on the inductance L reduces gradually, and the current value when the T2 end-of-pulsing on the inductance L is called opens electric current; At the T3 stage pulse, IPM2 is conducting once more, once more to the inductance L charging, at this moment, is opening rising once more on the basis of current value by the current value on the L.For holding circuit safety; prevent the excessive scaling loss device of electric current; in test process, by current sensor CT the current value of inductance L is monitored in real time, and this current value is sent to over-current detection unit; over-current detection unit judges whether this current value surpasses predefined current threshold; when surpassing, over-current detection unit transmits control signal to driving protected location, turn-offs the pulse triggering signal that the dipulse signal generator sends; turn-off IPM2, realize the overcurrent turn-off protection.
It more than is the detailed process that the recovery characteristics of diode among the pipe IPM1 on the brachium pontis is tested, below the recovery characteristics of diode among the pipe IPM2 under the brachium pontis is tested, referring to shown in Figure 10, be the waveform synoptic diagram of in the second embodiment of the invention recovery voltage of IPM2 being tested, wherein, 10a is the gate pole trigger pip waveform synoptic diagram of semiconductor power device; 10b is an IPM1 both end voltage waveform synoptic diagram; 10c is an IPM2 both end voltage waveform synoptic diagram; 10d is a current waveform synoptic diagram on the inductance L.
Adopt (B) connection, provide single trigger pulse to make semiconductor power device open or turn-off for the gate drive circuit of semiconductor power device by the dipulse signal generator, and the correlated performance of device is tested by waveform meter.
At first, power supply E gives and supports capacitor C 1 charging until reaching the requirement magnitude of voltage;
Connect current sensor CT and power cathode by test lead, make inductance L in parallel with semiconductor power device IPM2;
Waveform meter is connected on the IPM1 two ends, IPM2 keeps normal off state, provide first trigger pulse T1 by the dipulse signal generator for the gate drive circuit of IPM1, make it conducting, at the T1 stage pulse, inductance L is in charged state, current value constantly raises on it, this moment, supply voltage almost completely was added in load L two ends, that is to say the IPM2 two ends, in the circuit electric current by the positive pole of power supply E through over-current sensor CT, inductance L, IPM1 gets back to the negative pole of power supply E, and obtain flow through current value IPM1 on by waveform meter this moment, is the conducting current value of IPM1 under conducting state;
The T1 end-of-pulsing, the dipulse signal generator provides second trigger pulse T2 for the gate drive circuit of IPM1, make it to turn-off, at the T2 stage pulse, inductance L is in discharge condition, current value constantly reduces on it, at the T1 end-of-pulsing constantly, IPM1 becomes shutoff by conducting, inductance L discharge this moment, make the fly-wheel diode forward conduction among the IPM2, inductance L, current sensor CT, fly-wheel diode constitute the loop, and electric current is got back to the negative pole of fly-wheel diode through inductance L, current sensor CT by the positive pole of fly-wheel diode among the IPM2.In the moment that IPM1 turn-offs, because the existence of the stray inductance of circuit, produce a surge voltage during electric current commutation and be superimposed upon the IPM1 two ends, shown in the due to voltage spikes in the 10a oscillogram among Figure 10, record this IPM1 both end voltage value constantly by waveform meter, then be the cut-off voltage value of power device IPM1;
Below, detect the restorability of fly-wheel diode among the IPM2, waveform meter is connected on the IPM2 two ends, the T2 end-of-pulsing, the dipulse signal generator provides the 3rd trigger pulse T3 for the gate drive circuit of IPM1, make it conducting once more, at this moment, because the existence of power supply E voltage, the fly-wheel diode among the IPM2 will be sported oppositely by forward conduction and end, both end voltage produces sudden change, and its transient voltage changing value is the recovery voltage of fly-wheel diode;
Below, IPM1 is carried out the test of overcurrent turn-off protection, waveform meter is connected on the IPM1 two ends, IPM2 keeps normal off state, can see by the current waveform of inductance L shown in the 10d among Figure 10, at the T1 stage pulse, IPM1 is a conducting state, this moment, the current value on the inductance L constantly raise to the inductance L charging, and the current value when the TI end-of-pulsing on the inductance L is called cut-off current; At the T2 stage pulse, IPM2 is an off state, and this moment, the inductance L discharge made the fly-wheel diode forward conduction, and the current value on the inductance L reduces gradually, and the current value when the T2 end-of-pulsing on the inductance L is called opens electric current; At the T3 stage pulse, IPM1 is conducting once more, once more to the inductance L charging, at this moment, is opening rising once more on the basis of current value by the current value on the L.For holding circuit safety; prevent the excessive scaling loss device of electric current; in test process, by current sensor CT the current value of inductance L is monitored in real time, and this current value is sent to over-current detection unit; over-current detection unit judges whether this current value surpasses predefined current threshold; when surpassing, over-current detection unit transmits control signal to driving protected location, turn-offs the pulse triggering signal that the dipulse signal generator sends; turn-off IPM1, realize the overcurrent turn-off protection.
This dipulse copped wave method of testing provided by the present invention, when first pulse-off (the T1 finish time) superpotential that produces when wishing electric current of examination semiconductor power device is tested, the fly-wheel diode recovery voltage that (the T2 finish time) opens semiconductor power device to normal off when second pulse opened is tested.Wherein: T1=L * wish electric current/V, wherein, L is the load inductance induction coefficient, the load voltage of V when switching can be regulated and open electric current by adjusting T2.Therefore, can make test circuit provided by the present invention and method apply to the performance test of the semiconductor power device of different capacity grade by regulating T1, T2.
More than a kind of semiconductor power device chopped wave test circuit provided by the present invention and method are described in detail, used specific case herein principle of the present invention and embodiment are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, the part that all can change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (11)
1. semiconductor power device chopped wave test circuit; comprise power supply; electric capacity; first semiconductor power device; and second semiconductor power device; positive source connects the positive pole of electric capacity and the collector of first semiconductor power device; the emitter of first semiconductor power device links to each other with the collector of second semiconductor power device; the emitter of second semiconductor power device and the negative pole of electric capacity connect the negative pole of power supply; it is characterized in that; this circuit also comprises inductance; pulse signal generator; drive protected location; and test lead; wherein
Described inductance one terminates at the common port of described first semiconductor power device and described second semiconductor power device, the described test lead of another termination;
Described pulse signal generator links to each other with described driving protected location, is used to provide pulse signal;
Described driving protected location links to each other with the gate pole of described first semiconductor power device and the gate pole of described second semiconductor power device respectively, is used for described pulse signal is handled the action of control semiconductor power device;
Described test lead is used for when the recovery voltage of described first semiconductor power device is tested, connect described inductance and described positive source, when the recovery voltage of described second semiconductor power device is tested, connect described inductance and described power cathode.
2. circuit according to claim 1 is characterized in that this circuit further comprises current sensor and over-current detection unit; wherein, described current sensor and the series connection of described inductance, described over-current detection unit is connected between described current sensor and the described driving protected location; wherein
Described current sensor is used to monitor the current value on the inductance, and described current value is sent to over-current detection unit;
Described over-current detection unit is used to judge whether described current value surpasses threshold value, if surpass, sends control signals to described driving protected location;
Described driving protected location is used for producing and the corresponding pulse signal of described control signal, turn-offs corresponding semiconductor power device.
3. circuit according to claim 1 is characterized in that, described pulse signal generator is the dipulse signal generator.
4. method of utilizing the test circuit described in the claim 1 to semiconductor power device copped wave test is characterized in that this method specifically may further comprise the steps:
Connect inductance and positive source by test lead;
Make first semiconductor power device be in normal off and open state, conducting second semiconductor power device;
Turn-off described second semiconductor power device;
Described second semiconductor power device of conducting records the magnitude of voltage at the instantaneous described first semiconductor power device two ends of conducting once more, is the recovery voltage value of described first semiconductor power device;
Connect described inductance and described power cathode by described test lead;
Make described second semiconductor power device be in normal off and open state, described first semiconductor power device of conducting;
Turn-off described first semiconductor power device;
Described first semiconductor power device of conducting records the magnitude of voltage at the instantaneous described second semiconductor power device two ends of conducting once more, is the recovery voltage value of described second semiconductor power device.
5. method according to claim 4, it is characterized in that, at described conducting second semiconductor power device with turn-off between described second semiconductor power device, further comprise: record the electric current on described second semiconductor power device, obtain the conducting current value.
6. method according to claim 4, it is characterized in that, at described second semiconductor power device of described shutoff with once more between described second semiconductor power device of conducting, further comprise: record the voltage at the described second semiconductor power device two ends, obtain the cut-off voltage value.
7. method according to claim 4, it is characterized in that, at described first semiconductor power device of described conducting with turn-off between described first semiconductor power device, further comprise: record the electric current on described first semiconductor power device, obtain the conducting current value.
8. method according to claim 4, it is characterized in that, at described first semiconductor power device of described shutoff with once more between described first semiconductor power device of conducting, further comprise: record the voltage at the described first semiconductor power device two ends, obtain the cut-off voltage value.
9. method according to claim 4 is characterized in that, this method further comprises: the current value on the monitoring inductance, judge that whether described current value surpasses threshold value, if surpass, turn-offs corresponding semiconductor power device.
10. method according to claim 4 is characterized in that, provides trigger pulse by the dipulse signal generator to semiconductor power device.
11. method according to claim 4 is characterized in that, carries out the measurement of current value and magnitude of voltage by waveform meter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200810212231 CN101344572B (en) | 2008-09-04 | 2008-09-04 | Chopped wave test circuit and method for semiconductor power device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200810212231 CN101344572B (en) | 2008-09-04 | 2008-09-04 | Chopped wave test circuit and method for semiconductor power device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101344572A CN101344572A (en) | 2009-01-14 |
| CN101344572B true CN101344572B (en) | 2010-06-09 |
Family
ID=40246607
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200810212231 Active CN101344572B (en) | 2008-09-04 | 2008-09-04 | Chopped wave test circuit and method for semiconductor power device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101344572B (en) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101762778B (en) * | 2009-12-30 | 2012-10-10 | 株洲南车时代电气股份有限公司 | Power module test system and test method thereof |
| CN101937035B (en) * | 2010-08-20 | 2012-01-11 | 郭春雨 | Measuring device of power electronic element |
| CN102156253B (en) * | 2010-12-31 | 2014-03-26 | 中电普瑞科技有限公司 | Double-pulse test method for IGBT module |
| CN103105554A (en) * | 2013-01-29 | 2013-05-15 | 上海电气集团股份有限公司 | Test circuit and method of two-electrical-level converter switching performance based on double pulses |
| CN103969564A (en) * | 2013-01-30 | 2014-08-06 | 苏州同冠微电子有限公司 | Diode reverse recovery characteristic tester |
| CN103605072B (en) * | 2013-11-27 | 2017-01-04 | 浙江大学 | A kind of power device dynamic characteristic test circuit with thermoelectricity decoupling function and method of testing thereof |
| CN103837823A (en) * | 2014-03-17 | 2014-06-04 | 上海华虹宏力半导体制造有限公司 | Product testing circuit |
| CN105116184B (en) * | 2015-09-18 | 2017-10-13 | 江苏中科君芯科技有限公司 | IGBT dynamic test latch protection circuit |
| CN106124954B (en) * | 2016-06-15 | 2018-10-26 | 中国电子科技集团公司第五十五研究所 | The current limiting protecting method and system of silicon carbide diode and metal-oxide-semiconductor dynamic test |
| CN106802386B (en) * | 2017-02-27 | 2023-04-25 | 扬州国扬电子有限公司 | Low-sensitivity test equipment with laminated busbar |
| CN106707131B (en) * | 2017-02-27 | 2023-04-25 | 扬州国扬电子有限公司 | Switch mechanism and low-sensitivity test equipment with switch mechanism |
| CN106802387B (en) * | 2017-02-27 | 2023-04-25 | 扬州国扬电子有限公司 | Low-sensitivity test equipment |
| CN106841969B (en) * | 2017-02-27 | 2023-04-25 | 扬州国扬电子有限公司 | Low-sensitivity test equipment with cylindrical passing electrode |
| CN111157809B (en) * | 2018-11-08 | 2022-03-15 | 中车永济电机有限公司 | Fault determination method and device for traction converter |
| CN109856521B (en) * | 2018-12-27 | 2022-02-18 | 北京京能新能源有限公司 | Device testing system and method |
| CN111781485B (en) * | 2020-06-24 | 2021-07-23 | 珠海格力电器股份有限公司 | Diode detection method and device |
| CN112986804B (en) * | 2021-04-28 | 2021-09-07 | 成都万创科技股份有限公司 | Software implementation method for testing PCBA (printed Circuit Board Assembly) in mass production process based on Android equipment |
| CN113608091A (en) * | 2021-06-28 | 2021-11-05 | 臻驱科技（上海）有限公司 | Double-pulse test protection method and device |
| CN113608090A (en) * | 2021-06-28 | 2021-11-05 | 臻驱科技（上海）有限公司 | Pulse parameter adjustment and double-pulse testing method, device, electronic equipment and medium |
| CN114325062B (en) * | 2022-03-10 | 2022-06-10 | 杭州飞仕得科技有限公司 | Current testing method of power module |
| CN115684864B (en) * | 2023-01-05 | 2023-03-31 | 佛山市联动科技股份有限公司 | Test circuit and test method suitable for switching time test and threshold voltage test |
| CN116990601B (en) * | 2023-06-28 | 2024-04-02 | 荣信汇科电气股份有限公司 | High-power chopper circuit DC load capacity test device and test method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5942797A (en) * | 1996-04-02 | 1999-08-24 | Fuji Electric Co. Ltd. | Power semiconductor module |
| US20040034508A1 (en) * | 2002-05-28 | 2004-02-19 | Ballard Power Systems Corporation | Method and apparatus for measuring fault diagnostics on insulated gate bipolar transistor converter circuits |
| CN101123402A (en) * | 2006-08-11 | 2008-02-13 | 株式会社东芝 | Control apparatus for semiconductor power converter |
-
2008
- 2008-09-04 CN CN 200810212231 patent/CN101344572B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5942797A (en) * | 1996-04-02 | 1999-08-24 | Fuji Electric Co. Ltd. | Power semiconductor module |
| US20040034508A1 (en) * | 2002-05-28 | 2004-02-19 | Ballard Power Systems Corporation | Method and apparatus for measuring fault diagnostics on insulated gate bipolar transistor converter circuits |
| CN101123402A (en) * | 2006-08-11 | 2008-02-13 | 株式会社东芝 | Control apparatus for semiconductor power converter |
Non-Patent Citations (4)
| Title |
|---|
| 唐青松，吴强，曹怀志，车宪宁，彭方正.一种采用无源软开关吸收电路技术的新型高效DC/DC变换器.变流技术与电力牵引 4.2007,(4),18-24. |
| 唐青松,吴强,曹怀志,车宪宁,彭方正.一种采用无源软开关吸收电路技术的新型高效DC/DC变换器.变流技术与电力牵引 4.2007,(4),18-24. * |
| 蹇芳.IGBT变频器的关断浪涌电压仿真分析及其抑制方法.电力机车与城轨车辆31 4.2008,31(4),4-6. |
| 蹇芳.IGBT变频器的关断浪涌电压仿真分析及其抑制方法.电力机车与城轨车辆31 4.2008,31(4),4-6. * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101344572A (en) | 2009-01-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101344572B (en) | Chopped wave test circuit and method for semiconductor power device | |
| CN204116544U (en) | A kind of dipulse proving installation for half-bridge IGBT module | |
| CN106556791B (en) | High-power IGBT dynamic test circuit and control method thereof | |
| CN102156253B (en) | Double-pulse test method for IGBT module | |
| CN111781482B (en) | Method and device for detecting health state of bonding wire of high-power SIC MOSFET module | |
| CN111371293B (en) | IGBT driving circuit with state monitoring and fault recording functions | |
| CN201975764U (en) | Frequency converter load short circuit protection circuit for centrifugal machine | |
| CN102136720B (en) | Method for detecting short circuit and open circuit faults of IGBT device and controller in online manner | |
| CN102684652B (en) | The synchronized-pulse control circuit of anti-MCU or drive IC fault | |
| CN110492439B (en) | Protection circuit suitable for high-power SiCMOS field effect transistor | |
| CN109698611A (en) | Multistage drop grid voltage type SiC-MOSFET driving circuit | |
| CN102082429A (en) | IGBT (Insulated Gate Bipolar Translator) shut-off surge voltage clamp and suppression circuit | |
| CN202652171U (en) | Reliable and sensitive IGBT current foldback circuit | |
| CN108390547B (en) | It is a kind of based on current threshold judgement inverse conductivity type IGBT gate pole move back driven saturated method in advance | |
| CN111474460B (en) | IGBT grid resistance fault detection system | |
| CN105242149A (en) | IGCT phase module circuit with inductor voltage state detection | |
| CN101950949A (en) | Short-circuit shutoff method for insulated gate bipolar transistor (IGBT) of high-power current transformer | |
| CN211859931U (en) | IGBT drive circuit with state monitoring and fault recording functions | |
| CN102082418A (en) | Method for setting overcurrent protection point for insulated gate bipolar transistor | |
| Wang et al. | Short-circuit fault adaptive analysis and protection for SiC MOSFETs | |
| CN102957133B (en) | The IGBT of frequency converter moves back full protective circuit | |
| CN201781268U (en) | Over-voltage protection device of inverter | |
| CN103532365B (en) | A kind of brake unit | |
| CN202957584U (en) | IGBT saturation retreating protection circuit for frequency converter | |
| CN211089463U (en) | Overvoltage protection circuit for HXD2 traction power module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: CHINA RAILWAY CORPORATION Free format text: FORMER OWNER: TRANSPORT BUREAU OF RAILWAY DEPARTMENT Effective date: 20140924 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 100844 HAIDIAN DISTRICT, BEIJING TO: 100844 HAIDIAN, BEIJING |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20140924 Address after: 100844 Fuxing Road, Beijing, Haidian District, No. 10 Patentee after: CHINA RAILWAY CORPORATION Patentee after: Zhuzhou CSR Times Electric Co., Ltd. Address before: 10 Fuxing Road, Beijing, No. 100844 Patentee before: Transport Bureau of Railway Department Patentee before: Zhuzhou CSR Times Electric Co., Ltd. |