CN111273709A - Temperature control device and method - Google Patents
Temperature control device and method Download PDFInfo
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- CN111273709A CN111273709A CN201811481476.6A CN201811481476A CN111273709A CN 111273709 A CN111273709 A CN 111273709A CN 201811481476 A CN201811481476 A CN 201811481476A CN 111273709 A CN111273709 A CN 111273709A
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Abstract
The present disclosure relates to a temperature control apparatus and method, the apparatus including a plurality of processing chips and a control chip connected in series, each processing chip having a temperature sensing part disposed therein, the control chip being connected to a first-stage processing chip among the plurality of processing chips. The control chip is configured to: acquiring temperature data sensed by a temperature sensing component of a target processing chip; determining a first temperature interval in which a plurality of processing chips are currently located according to a plurality of preset temperature intervals and temperature data; judging whether the temperature regulation condition is met or not according to the calculation efficiencies of the plurality of processing chips and the first temperature interval; and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition. The embodiment of the disclosure can control the working state of each chip in real time, and prevent a certain chip from generating high temperature or ultralow temperature, thereby ensuring safe and effective operation of the whole link.
Description
Technical Field
The present disclosure relates to the field of electronic technologies, and in particular, to a temperature control device and method.
Background
The heat generated by the semiconductor device comes from the power consumption of the chip, the accumulation of the heat necessarily causes the increase of the junction temperature of the semiconductor, and the performance of the semiconductor device is reduced along with the increase of the junction temperature, so that chip manufacturers have the regulation of the junction temperature of the semiconductor device. In a common digital circuit, because the power consumption of a low-speed circuit is smaller, the temperature rise of a chip is not too large under a normal heat dissipation condition, and the heat dissipation problem of the chip is not considered. In a high-speed circuit, the power consumption of a chip is large, and heat dissipation under normal conditions cannot ensure that the junction temperature of the chip does not exceed an allowable working temperature, so that the heat dissipation problem of the chip needs to be considered. In the related art, when multiple chips are cascaded, the temperature of different chips in each link cannot be controlled, and the safety of the whole link is poor.
Disclosure of Invention
In view of this, the present disclosure provides a temperature control method and apparatus, which can prevent a chip in a link from being too high or too low temperature, and ensure safe and effective operation of the entire link.
According to an aspect of the present disclosure, a temperature control device is provided. The device comprises:
the device comprises a plurality of processing chips connected in series, wherein a temperature sensing component is arranged in each processing chip;
a control chip connected to a first level processing chip of the plurality of processing chips, the control chip configured to:
acquiring temperature data sensed by a temperature sensing component of a target processing chip, the target processing chip being at least one of the plurality of processing chips;
determining a first temperature interval in which the plurality of processing chips are currently located according to a plurality of preset temperature intervals and the temperature data;
judging whether a temperature regulation condition is met or not according to the calculation efficiencies of the plurality of processing chips and the first temperature interval;
and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition.
In one possible implementation, the control chip is further configured to:
respectively acquiring each group of temperature data of the plurality of processing chips when the plurality of processing chips work at each working frequency according to a plurality of preset working frequencies;
respectively determining a plurality of second temperature intervals of the plurality of processing chips according to the plurality of groups of temperature data;
merging and dividing the plurality of second temperature intervals to obtain a plurality of temperature intervals,
wherein the temperature deviation of each temperature interval is greater than or equal to the temperature deviation of the respective second temperature interval.
In a possible implementation manner, the determining whether a temperature regulation condition is satisfied according to the computational efficiencies of the plurality of processing chips and the first temperature interval includes:
when the temperature minimum value of the first temperature interval is greater than a first temperature threshold value and the computational efficiency of the plurality of processing chips is greater than or equal to the first threshold value, determining that a first temperature regulation condition is met,
when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition, wherein the temperature regulation strategy comprises the following steps:
and when the first temperature regulation condition is met, reducing the working frequency of the plurality of processing chips.
In a possible implementation manner, the determining whether a temperature regulation condition is satisfied according to the computational efficiencies of the plurality of processing chips and the first temperature interval includes:
when the temperature minimum value of the first temperature interval is greater than a first temperature threshold value and the calculation efficiency of the plurality of processing chips connected in series is less than the first threshold value, judging that a second temperature regulation condition is met,
when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition, wherein the temperature regulation strategy comprises the following steps:
and when the second temperature control condition is met, improving the running speed of a heat dissipation module of the temperature control device.
In a possible implementation manner, the determining whether a temperature regulation condition is satisfied according to the computational efficiencies of the plurality of processing chips and the first temperature interval includes:
when the maximum temperature value of the first temperature interval is smaller than a second temperature threshold value, judging that a third temperature regulation condition is met,
when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition, wherein the temperature regulation strategy comprises the following steps:
and when the third temperature regulation condition is met, increasing the working frequency of the plurality of processing chips and/or reducing the running speed of a heat dissipation module of the temperature control device.
In one possible implementation, the target processing chip is configured to:
when the temperature of the target processing chip is greater than or equal to a first preset temperature, generating a first early warning signal;
and sending the first early warning signal to the control chip.
In one possible implementation, the target processing chip is configured to:
when the temperature of the target processing chip is less than or equal to a second preset temperature, generating a second early warning signal;
and sending the second early warning signal to the control chip.
In one possible implementation, the computational efficiency is a ratio of the amount of processed data to the total amount of data for the target processing chip.
In one possible implementation, the temperature ranges of the plurality of temperature intervals are continuous and do not overlap.
According to another aspect of the present disclosure, a temperature control method is provided. The method is applied to a control chip of a temperature control device, the temperature control device also comprises a plurality of processing chips which are connected in series, the control chip is connected to a first-stage processing chip in the plurality of processing chips,
the method comprises the following steps:
acquiring temperature data sensed by a temperature sensing component of a target processing chip, the target processing chip being at least one of the plurality of processing chips;
determining a first temperature interval in which the plurality of processing chips are currently located according to a plurality of preset temperature intervals and the temperature data;
judging whether a temperature regulation condition is met or not according to the calculation efficiencies of the plurality of processing chips and the first temperature interval;
and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition.
According to the temperature control device and the temperature control method, the device comprises a plurality of processing chips and a control chip which are connected in series, wherein each processing chip is provided with a temperature sensing component, and the control chip is connected to a first-stage processing chip in the plurality of processing chips. The control chip is configured to: acquiring temperature data sensed by a temperature sensing component of a target processing chip; determining a first temperature interval in which a plurality of processing chips are currently located according to a plurality of preset temperature intervals and temperature data; judging whether the temperature regulation condition is met or not according to the calculation efficiencies of the plurality of processing chips and the first temperature interval; and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition. The embodiment of the disclosure can control the working state of each chip in the link instantly, and prevent the occurrence of over-high temperature or ultra-low temperature, thereby ensuring the safe and effective operation of the whole link.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.
FIG. 1 shows a block diagram of a temperature control device according to an embodiment of the present disclosure;
FIG. 2 shows a block diagram of a processing chip according to an embodiment of the present disclosure;
FIG. 3 shows a flow chart of a temperature control method according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present disclosure.
Fig. 1 shows a block diagram of a temperature control device according to an embodiment of the present disclosure.
As shown in fig. 1, the temperature control apparatus includes a plurality of processing chips 1 and a control chip2 connected in series, a temperature sensor (not shown) is provided in each processing chip1, the control chip2 is connected to a first-stage processing chip of the plurality of processing chips 1, and the control chip is configured to:
acquiring temperature data sensed by a temperature sensing part of a target processing chip, the target processing chip being at least one of the plurality of processing chips 1; determining a first temperature interval in which a plurality of processing chips are currently located according to a plurality of preset temperature intervals and temperature data; judging whether the temperature regulation condition is met or not according to the calculation efficiencies of the processing chips 1 and the first temperature interval; and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition.
According to the embodiment of the disclosure, the temperature control device can timely control the working states of a plurality of processing chips, and prevent a certain chip from being excessively high temperature or ultralow temperature, so that the safe and effective operation of the whole link is ensured.
In this embodiment, the plurality of processing chips may be large power chips, and are applied to a multi-chip cascade processing system. The plurality of processing chips may be applied to, for example, cloud computing and Artificial Intelligence (AI), and the specific type of the processing chip is not limited by the present disclosure.
FIG. 2 shows a block diagram of a processing chip according to an embodiment of the present disclosure. As shown in fig. 2, the processing chip1 is provided with a temperature sensing part 3 inside. The temperature sensing component 3 may be a temperature sensor, and may also be other devices for sensing temperature, which is not limited by the present disclosure.
In one possible implementation, the control chip2 is used to control and manage a plurality of processing chips 1. During operation, there may be temperature deviations among the plurality of processing chips 1 on the link, and thus the range of the temperature deviations from front to back on the entire link can be evaluated in advance.
In one possible implementation, the control chip is further configured to:
respectively acquiring each group of temperature data of a plurality of processing chips when the processing chips work at each working frequency according to a plurality of preset working frequencies;
respectively determining a plurality of second temperature intervals of a plurality of processing chips according to the plurality of groups of temperature data;
merging and dividing the plurality of second temperature intervals to obtain a plurality of temperature intervals,
wherein the temperature deviation of each temperature interval is greater than or equal to the temperature deviation of the respective second temperature interval.
In this implementation, there are different chips (chips) on the link (chain), and their operating temperatures may be different due to various reasons, such as Chip generation differences, internal data flip rates (toggle rates), discrete fan distances, etc. The temperature of the chip on the link from the front to the back has a deviation, and the operating frequency of the link needs to be adjusted according to the temperature deviation range.
For example, as shown in fig. 1, a link (chain) has n chips, which are respectively represented by Chip1, Chip2, Chip3 and … … Chipn, and may configure an initial operating frequency, obtain temperature values of the n chips at the initial operating frequency, and obtain a temperature difference range; increasing the working frequency to obtain the temperature values of n chips on a link under the working frequency, and then obtaining a deviation range; by analogy, the frequency is increased step by step, and the temperature deviation range of n chips from front to back on the whole link can be measured and evaluated.
For example, the control chip may preset the frequency f1＝100M、f2＝300M、f3500M. In the link shown in fig. 1, assuming that the number of chips on the link is 3, that is, n is 3, the processing Chip can be obtained1、Chip2、Chip3At each operating frequency f1、f2、f3Temperature data for each set during operation. For example, the processing Chip1、Chip2、Chip3At f1The temperature data are respectively corresponding to T1 1＝25℃、T1 2＝28℃、T1 3＝26℃，T1 1、T1 2、T1 3Form T1A temperature data set; at f2The temperature data are respectively corresponding to T2 1＝37℃、T2 2＝40℃、T2 3＝45℃，T2 1、T2 2、T2 3Form T2A temperature data set; at f3The temperature data are respectively corresponding to T3 1＝43℃、T3 2＝47℃、T3 3＝52℃，T3 1、T3 2、T3 3Form T3A temperature data set. The number of links, the number of chips on each link, and a plurality of preset operating frequencies can be set according to actual circuit function requirements, and the disclosure does not limit the number.
In this implementation, the temperature data T is based on multiple sets1、T2、T3A plurality of second temperature intervals, such as temperature data sets T, for the plurality of processing chips may be determined separately1The second temperature interval was determined to be [25 deg.C, 28 deg.C ]]Temperature data set T2The second temperature interval was determined to be [37 deg.C, 45 deg.C ]]Temperature data set T3The second temperature interval was determined to be [43 deg.C, 52 deg.C ]]. There may be overlapping portions or non-continuous portions between multiple second temperature ranges, such as the second temperature range [25 deg.C, 28 deg.C ]]And [35 ℃,45℃ ]]Discontinuous, [35 ℃,45 DEG C]And [43 ℃,52 DEG C]There is an overlap.
In this implementation, a plurality of second temperature intervals [25 ℃,28 ℃), [37 ℃,45 ℃), and [43 ℃,52 ℃) may be combined to obtain an overall temperature interval [25 ℃,52 ℃), and the overall temperature interval may be divided to obtain a plurality of temperature intervals [25 ℃,34 ℃), [34 ℃,43 ℃) and [43 ℃,52 ℃). The second temperature interval may be divided according to the chip operation requirement in the actual link, which is not limited by the present disclosure.
In one possible implementation, the temperature ranges of the plurality of temperature intervals are continuous and do not overlap.
In this implementation, the plurality of temperature ranges [25 ℃,34 ℃), [34 ℃,43 ℃) and [43 ℃,52 ℃) are continuous and non-overlapping, and the temperature deviation of the plurality of temperature ranges is greater than or equal to the temperature deviation of each second temperature range, the temperature deviation of the plurality of temperature ranges is 9 ℃, and the temperature deviations of the second temperature ranges [25 ℃,28 ℃), [37 ℃,45 ℃) and [43 ℃,52 ℃) are 3 ℃, 8 ℃ and 9 ℃, respectively.
Through the mode, a plurality of temperature intervals (temperature gears) can be obtained, and data reference is provided for the follow-up evaluation of the whole temperature condition of the link and the execution of the temperature regulation strategy.
In one possible implementation, after determining the plurality of temperature intervals (temperature steps), the control chip may evaluate the overall temperature condition of the link by acquiring temperature data of only one or several of the plurality of processing chips on the link.
For example, the control chip may obtain temperature data of a target processing chip of the plurality of processing chips. The target processing chip is at least one of a plurality of processing chips. If the target processing chip is one of the plurality of processing chips, the temperature data of the chip can be directly read; if the target processing chip is some of the plurality of processing chips (partial chips), the temperature data of these chips may be averaged and the average may be used as the obtained temperature data. The present disclosure does not limit the number of target processing chips and the manner of obtaining temperature data when a plurality of target processing chips are provided.
In a possible implementation manner, after the temperature data of the target processing chip is obtained, the control chip may determine, according to a plurality of preset temperature intervals, a first temperature interval in which the plurality of processing chips are currently located.
In this implementation, for example, the target processing Chip in the link shown in fig. 1 is Chip2, and Chip2 is at frequency f2The temperature was 40 ℃ at 100M. According to a plurality of preset temperature intervals of [25 ℃,34 ℃), [34 ℃,43 ℃) and [43 ℃,52 DEG C]The control Chip may determine that the temperature range in which the temperature of the Chip2 is 40 ℃ is [34 ℃,43 ℃) as the first temperature range in which the plurality of processing chips are currently located.
In one possible implementation, the control chip may obtain the computational performance of a plurality of processing chips. The computational performance may be expressed as a ratio of the amount of data currently processed by the plurality of processing chips to the total amount of data processed. For example, the amount of data currently processed by the plurality of processing chips is 9000 bytes, the total amount of processed data is 10000 bytes, and the computational efficiency is 0.9.
In one possible implementation, whether the temperature regulation condition is satisfied is determined according to the computational performance of the plurality of processing chips and a first temperature range ([34 ℃,43 ℃) of the plurality of processing chips on the link. And if the temperature regulation condition is met, the control chip executes a temperature regulation strategy corresponding to the temperature regulation condition.
By the mode, the temperature difference range of all chips on the link can be obtained, the temperature of the whole link is controlled according to the temperature data of the chips, excessive high temperature or excessive low temperature of a certain chip in the link is prevented, and safe and effective operation of the whole link is guaranteed.
In a possible implementation manner, the step of determining whether the temperature regulation condition is satisfied according to the computation performance of the plurality of processing chips and the first temperature interval may include:
when the temperature minimum value of the first temperature interval is greater than a first temperature threshold value and the computational efficiency of the plurality of processing chips is greater than or equal to the first threshold value, determining that a first temperature regulation condition is satisfied,
when the temperature regulation condition is satisfied, the step of executing the temperature regulation strategy corresponding to the temperature regulation condition may include:
and when the first temperature regulation condition is met, the working frequency of the plurality of processing chips is reduced.
In this implementation, if the first temperature interval of the plurality of processing chips is [43 ℃,52 ℃), and the first temperature threshold is 40 ℃, it may be determined that the minimum value of the temperature of the first temperature interval (43 ℃) is greater than the first temperature threshold (40 ℃); if the first threshold of the computational performance of the plurality of processing chips is 0.8 and the computational performance of the plurality of processing chips is 0.9, it may be determined that the computational performance of the plurality of processing chips (0.9) is greater than the first threshold (0.8). At this time, it is determined that the first temperature regulation condition is satisfied, and the operating frequencies of the plurality of processing chips can be reduced.
In this case, the temperature exceeds the threshold value but most of the data is calculated, the requirement on the operating frequency is reduced, and the temperatures of the plurality of processing chips can be reduced by reducing the operating frequency of the plurality of processing chips, so that the safety of the whole link is ensured.
It should be understood that the first temperature threshold and the first threshold for computing performance may be determined based on the performance of the actual chip and the link requirements, and the disclosure is not limited thereto.
In one possible implementation manner, the step of determining whether the temperature regulation condition is satisfied according to the computation performance of the plurality of processing chips and the first temperature interval may include:
when the temperature minimum value of the first temperature interval is greater than a first temperature threshold value and the calculation efficiency of the plurality of processing chips connected in series is less than the first threshold value, judging that a second temperature regulation condition is met,
when the temperature regulation condition is satisfied, the step of executing the temperature regulation strategy corresponding to the temperature regulation condition may include:
and when the second temperature control condition is met, the running speed of the heat dissipation module of the temperature control device is increased.
In this implementation, if the first temperature interval of the plurality of processing chips is [43 ℃,52 ℃), and the first temperature threshold is 40 ℃, it may be determined that the minimum value of the temperature of the first temperature interval (43 ℃) is greater than the first temperature threshold (40 ℃); if the first threshold of the computational performance of the plurality of processing chips is 0.8 and the computational performance of the plurality of processing chips is 0.6, it may be determined that the computational performance of the plurality of processing chips (0.6) is less than the first threshold (0.8). At this time, it is determined that the second temperature regulation condition is satisfied, and the operation rate of the heat dissipation module of the temperature control device may be increased (for example, the rotation speed of the fan is increased or the flow rate of the cooling liquid is increased). The present disclosure is not limited to the specific manner of dissipating heat.
In this case, the temperature exceeds the threshold and the calculated data amount is insufficient, the demand for the operating frequency is still high, and the temperature cannot be lowered by lowering the operating frequency. Therefore, the temperature of the plurality of processing chips can be reduced by increasing the rotation speed of the fan or increasing the flow rate of the cooling liquid, and the safety of the whole link can be ensured.
Through the mode, when the temperature of the target chip exceeds the first threshold temperature, the control chip can adopt a corresponding temperature regulation strategy for the processing chip so as to prevent the chips in the link from generating high temperature to influence the calculation efficiency of the whole system.
In a possible implementation manner, the step of determining whether the temperature regulation condition is satisfied according to the computation performance of the plurality of processing chips and the first temperature interval may include:
when the maximum temperature value of the first temperature interval is smaller than the second temperature threshold value, judging that a third temperature regulation condition is met,
when the temperature regulation condition is satisfied, the step of executing the temperature regulation strategy corresponding to the temperature regulation condition may include:
and when the third temperature regulation condition is met, the working frequency of the plurality of processing chips is increased and/or the running speed of a heat dissipation module of the temperature control device is reduced.
In this implementation, if the first temperature section of the plurality of processing chips is [25 ℃,34 ℃) and the second temperature threshold is 35 ℃, it may be determined that the maximum temperature value (34 ℃) of the first temperature section is less than the second temperature threshold (35 ℃). At this time, it is determined that the third temperature regulation condition is satisfied, and the operating frequency of the plurality of processing chips may be increased and/or the operating speed of the heat dissipation module of the temperature control device may be reduced. The specific value of the second temperature threshold is not limited in this disclosure.
In this case, it can be considered that the temperature of each chip in the link is too low, and the operating frequency of the plurality of processing chips can be increased; or to reduce the operating efficiency of the thermal module of the temperature control device (e.g., to reduce the speed of the on-chip fan or to reduce the flow rate of the cooling fluid). It should be understood that the appropriate cooling strategy may be selected based on the actual heat sink, and the disclosure is not limited thereto.
Through the mode, when the temperature of the target chip is lower than the second threshold value, the control chip can adopt the corresponding temperature regulation and control strategy for the processing chip so as to prevent the target chip in the link from being ultralow in temperature to influence the calculation efficiency of the whole system.
According to the embodiment of the disclosure, each processing chip on the link can be enabled to support the function of high and low temperature early warning.
In one possible implementation, a target processing chip of the plurality of processing chips is configured to:
when the temperature of the target processing chip is greater than or equal to a first preset temperature, generating a first early warning signal;
and sending a first early warning signal to the control chip.
In this implementation manner, each processing chip may support generating and sending a first warning signal (high temperature warning interrupt) to the control chip when the temperature of the processing chip is greater than or equal to a first preset temperature, so as to avoid the chip temperature exceeding a temperature tolerance value from being burnt. The first warning signal may be a preset number sequence. The first preset temperature may be, for example, 60 ℃, and the specific value of the first preset temperature is not limited by the present disclosure.
In one possible implementation, a target processing chip of the plurality of processing chips is configured to:
when the temperature of the target processing chip is less than or equal to a second preset temperature, generating a second early warning signal;
and sending a second early warning signal to the control chip.
In this implementation, each processing chip may support generating and sending a second warning signal (low temperature warning interrupt) to the control chip when the temperature of the processing chip is less than or equal to a second preset temperature. The second warning signal may be a predetermined sequence of numbers. The second predetermined temperature may be, for example, 10 ℃, and the disclosure does not limit the specific value of the second predetermined temperature.
By the mode, the control chip can interrupt the work of the processing chip only according to the first early warning signal or the second early warning signal without monitoring the temperature of each chip in real time, and the control efficiency and the safety are greatly improved.
FIG. 3 shows a flow chart of a temperature control method according to an embodiment of the present disclosure.
In one possible implementation, the method is applied to a control chip of a temperature control device, the temperature control device further comprises a plurality of processing chips connected in series, the control chip is connected to a first-stage processing chip in the plurality of processing chips,
the method includes steps S11 to S14:
in step S11, temperature data sensed by the temperature sensing part of the target processing chip, which is at least one of the plurality of processing chips, is acquired;
in step S12, determining a first temperature interval in which the plurality of processing chips are currently located according to a plurality of preset temperature intervals and temperature data;
in step S13, determining whether a temperature regulation condition is satisfied according to the computation performance of the plurality of processing chips and the first temperature interval;
in step S14, when the temperature regulation condition is satisfied, a temperature regulation strategy corresponding to the temperature regulation condition is executed.
By the method, the working state of each processing chip can be controlled in real time, and the processing capacity of the whole link system is prevented from being affected by the high temperature or the ultra-low temperature of a certain processing chip.
The temperature control device provided by the embodiment of the disclosure comprises a plurality of processing chips and a control chip which are connected in series, wherein each processing chip is provided with a temperature sensing component, and the control chip is connected to a first-stage processing chip in the plurality of processing chips. The control chip is configured to: acquiring temperature data sensed by a temperature sensing component of a target processing chip; determining a first temperature interval in which a plurality of processing chips are currently located according to a plurality of preset temperature intervals and temperature data; judging whether the temperature regulation condition is met or not according to the calculation efficiencies of the plurality of processing chips and the first temperature interval; and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition. The embodiment of the disclosure can control the working state of each chip in real time, and prevent a certain chip from generating high temperature or ultralow temperature, thereby ensuring safe and effective operation of the whole link.
According to the temperature control device and the temperature control method, under the condition that a plurality of chips are cascaded, temperature monitoring and temperature deviation evaluation of a link are carried out on the whole link; randomly reading the temperature of a certain chip, and performing temperature control processing according to the temperature deviation value; each chip is provided with a high-temperature early warning mode and a low-temperature early warning mode, the working conditions of the chips are fed back automatically, and the working safety and stability of the whole link are improved.
It should be noted that, although the temperature control device and method are described by taking the above-mentioned embodiments as examples, those skilled in the art can understand that the disclosure should not be limited thereto. In fact, the user can flexibly set each step according to personal preference and/or actual application scene, as long as the technical scheme of the disclosure is met.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein were chosen in order to best explain the principles of the embodiments, the practical application, or technical improvements to the techniques in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (10)
1. A temperature control apparatus, characterized in that the apparatus comprises:
the device comprises a plurality of processing chips connected in series, wherein a temperature sensing component is arranged in each processing chip;
a control chip connected to a first level processing chip of the plurality of processing chips, the control chip configured to:
acquiring temperature data sensed by a temperature sensing component of a target processing chip, the target processing chip being at least one of the plurality of processing chips;
determining a first temperature interval in which the plurality of processing chips are currently located according to a plurality of preset temperature intervals and the temperature data;
judging whether a temperature regulation condition is met or not according to the calculation efficiencies of the plurality of processing chips and the first temperature interval;
and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition.
2. The apparatus of claim 1, wherein the control chip is further configured to:
respectively acquiring each group of temperature data of the plurality of processing chips when the plurality of processing chips work at each working frequency according to a plurality of preset working frequencies;
respectively determining a plurality of second temperature intervals of the plurality of processing chips according to the plurality of groups of temperature data;
merging and dividing the plurality of second temperature intervals to obtain a plurality of temperature intervals,
wherein the temperature deviation of each temperature interval is greater than or equal to the temperature deviation of the respective second temperature interval.
3. The apparatus of claim 1, wherein the determining whether the temperature regulation condition is satisfied according to the computational efficiencies of the plurality of processing chips and the first temperature interval comprises:
when the temperature minimum value of the first temperature interval is greater than a first temperature threshold value and the computational efficiency of the plurality of processing chips is greater than or equal to the first threshold value, determining that a first temperature regulation condition is met,
when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition, wherein the temperature regulation strategy comprises the following steps:
and when the first temperature regulation condition is met, reducing the working frequency of the plurality of processing chips.
4. The apparatus of claim 1, wherein the determining whether the temperature regulation condition is satisfied according to the computational efficiencies of the plurality of processing chips and the first temperature interval comprises:
when the temperature minimum value of the first temperature interval is greater than a first temperature threshold value and the calculation efficiency of the plurality of processing chips connected in series is less than the first threshold value, judging that a second temperature regulation condition is met,
when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition, wherein the temperature regulation strategy comprises the following steps:
and when the second temperature control condition is met, improving the running speed of a heat dissipation module of the temperature control device.
5. The apparatus of claim 1, wherein the determining whether the temperature regulation condition is satisfied according to the computational efficiencies of the plurality of processing chips and the first temperature interval comprises:
when the maximum temperature value of the first temperature interval is smaller than a second temperature threshold value, judging that a third temperature regulation condition is met,
when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition, wherein the temperature regulation strategy comprises the following steps:
and when the third temperature regulation condition is met, increasing the working frequency of the plurality of processing chips and/or reducing the running speed of a heat dissipation module of the temperature control device.
6. The apparatus of claim 1, wherein the target processing chip is configured to:
when the temperature of the target processing chip is greater than or equal to a first preset temperature, generating a first early warning signal;
and sending the first early warning signal to the control chip.
7. The apparatus of claim 1, wherein the target processing chip is configured to:
when the temperature of the target processing chip is less than or equal to a second preset temperature, generating a second early warning signal;
and sending the second early warning signal to the control chip.
8. The apparatus of any one of claims 1-7, wherein the computational performance is a ratio of a processed data amount to a total data amount of the plurality of processing chips.
9. The apparatus of claim 2, wherein the temperature ranges of the plurality of temperature intervals are contiguous and non-overlapping.
10. A temperature control method is applied to a control chip of a temperature control device, the temperature control device further comprises a plurality of processing chips which are connected in series, the control chip is connected to a first-stage processing chip in the plurality of processing chips,
the method comprises the following steps:
acquiring temperature data sensed by a temperature sensing component of a target processing chip, the target processing chip being at least one of the plurality of processing chips;
determining a first temperature interval in which the plurality of processing chips are currently located according to a plurality of preset temperature intervals and the temperature data;
judging whether a temperature regulation condition is met or not according to the calculation efficiencies of the plurality of processing chips and the first temperature interval;
and when the temperature regulation condition is met, executing a temperature regulation strategy corresponding to the temperature regulation condition.
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