CN117130408A

CN117130408A - Temperature-based control method and system for target chip and storage medium

Info

Publication number: CN117130408A
Application number: CN202311385449.XA
Authority: CN
Inventors: 高元元
Original assignee: Hefei Weiguo Semiconductor Co ltd
Current assignee: Hefei Weiguo Semiconductor Co ltd
Priority date: 2023-10-25
Filing date: 2023-10-25
Publication date: 2023-11-28

Abstract

The application provides a temperature-based control method, a temperature-based control system and a temperature-based storage medium for a target chip, wherein the temperature-based control method for the target chip is applied to an upper computer, the upper computer is connected with at least one target chip, each target chip comprises at least one channel, and each channel is connected with at least one execution unit, and the method comprises the following steps: receiving the current chip junction temperature uploaded by the first target chip; wherein the first target chip is any one target chip; executing a preset control strategy, and controlling all target chips based on the current chip junction temperature of the first target chip. The upper computer can control the first target chip, can synchronously control all the target chips, and can protect the target chips and simultaneously reduce the influence on the system function as much as possible so as to avoid influencing the use feeling of customers.

Description

Temperature-based control method and system for target chip and storage medium

Technical Field

The application relates to the field of electronic devices, in particular to a temperature-based control method and system for a target chip and a storage medium.

Background

In the prior art, power chips in power management and LED drive control application systems mostly have OTP (Over Temperature Protection) functions in terms of temperature protection, when the chip junction temperature of the power chips reaches a set threshold (mostly set to 150 ℃), an OTP function is started, and the power chips (Slave ICs) are subjected to shutdown processing (shutdown), so that the processing mode of suddenly shutting down the ICs influences the system functions and customer use feelings.

Therefore, those skilled in the art are focusing on how to perform over-temperature protection while minimizing the influence on the system functions and avoiding influence on the use feeling of customers.

Disclosure of Invention

The application aims to provide a temperature-based control method and system for a target chip and a storage medium, so as to solve the problems.

In order to achieve the above object, the technical scheme adopted by the embodiment of the application is as follows:

in a first aspect, an embodiment of the present application provides a temperature-based control method for a target chip, which is applied to a host computer, where the host computer is connected to at least one target chip, each target chip includes at least one channel, and each channel is connected to at least one execution unit, and the method includes:

Receiving the current chip junction temperature uploaded by the first target chip;

wherein the first target chip is any one of the target chips;

and executing a preset control strategy, and controlling all target chips based on the current chip junction temperature of the first target chip.

In a second aspect, an embodiment of the present application provides a temperature-based control system for a target chip, where the temperature-based control system for a target chip includes a host computer and at least one target chip, where the host computer is connected to the at least one target chip, and each target chip includes at least one channel, and each channel is connected to at least one execution unit;

the first target chip is used for uploading the current chip junction temperature to the upper computer when the current chip junction temperature is monitored;

wherein the first target chip is any one of the target chips;

the upper computer is used for receiving the current chip junction temperature uploaded by the first target chip; and executing a preset control strategy, and controlling all target chips based on the current chip junction temperature of the first target chip.

In a third aspect, embodiments of the present application provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method described above.

Compared with the prior art, the temperature-based control method, the temperature-based control system and the storage medium for the target chips are applied to an upper computer, the upper computer is connected with at least one target chip, each target chip comprises at least one channel, each channel is connected with at least one execution unit, and the method comprises the following steps: receiving the current chip junction temperature uploaded by the first target chip; wherein the first target chip is any one target chip; executing a preset control strategy, and controlling all target chips based on the current chip junction temperature of the first target chip. The upper computer can control the first target chip, can synchronously control all the target chips, and can protect the target chips and simultaneously reduce the influence on the system function as much as possible so as to avoid influencing the use feeling of customers.

In order to make the above objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic block diagram of a temperature-based control system for a target chip according to an embodiment of the present application;

FIG. 2 is a schematic diagram of an LCD display system according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of a MiniLED lamp panel according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a display screen according to an embodiment of the present application;

FIG. 5 is a schematic flow chart of a temperature-based control method for a target chip according to an embodiment of the present application;

FIG. 6 is a second flowchart of a temperature-based control method for a target chip according to an embodiment of the present application;

fig. 7 is a third flowchart of a temperature-based control method for a target chip according to an embodiment of the application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. The components of the embodiments of the present application generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the application, as presented in the figures, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

In the description of the present application, it should be noted that, directions or positional relationships indicated by terms such as "upper", "lower", "inner", "outer", etc., are directions or positional relationships based on those shown in the drawings, or those conventionally put in use in the application, are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present application.

In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed", "connected" and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.

Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.

When the chip junction temperature of the power chip reaches a set threshold (mostly set to 150 ℃), the OTP function is started, and the power chip (Slave IC) is subjected to shutdown (shutdown), so that the processing mode of suddenly shutting down the IC can influence the system function and influence the use feeling of a customer. For example, a sudden shut down of a power chip (Slave IC) in a display system may cause uneven brightness or a black screen in a display, and a sudden shut down of a power chip (Slave IC) in a motor system may cause a sudden shutdown of a motor.

In order to minimize the influence on the system function and avoid affecting the use feeling of a client while performing over-temperature protection, the embodiment of the application provides a temperature-based control system for a target chip, please refer to fig. 1, and fig. 1 is a schematic block diagram of the temperature-based control system for the target chip provided by the embodiment of the application. As shown in fig. 1, the target chip temperature-based control system includes a host computer and at least one target chip. The target chip may be, but is not limited to, a power chip. The upper computer is connected with at least one target chip. The number of target chips shown in fig. 1 is 3, but is not limited thereto, and the number of target chips may be 1, 2, and greater than 3, which is not limited thereto.

In an alternative embodiment, the first target chip is configured to upload the current chip junction temperature to the host computer when the current chip junction temperature is monitored; wherein the first target chip is any one target chip.

The upper computer is used for receiving the current chip junction temperature uploaded by the first target chip; executing a preset control strategy, and controlling all target chips based on the current chip junction temperature of the first target chip.

Optionally, the preset control strategy is any one of the first control strategy, the second control strategy and the third control strategy.

The first control strategy representation synchronously controls the output currents of all the target chips based on the current chip junction temperature and the corresponding temperature change speed of the first target chip;

the second control strategy representation is based on the current chip junction temperature of the first target chip, and the output currents of all the target chips are synchronously controlled;

and the third control strategy representation synchronously controls the output current of a target channel of the first target chip based on the current chip junction temperature and the corresponding temperature change speed of the first target chip, wherein the target channel is one or more channels with the largest current output current in the first target chip.

The upper computer can be a general processor, and comprises a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short) and the like; it may also be a digital signal processor (Digital Signal Processor, DSP), application specific integrated circuit (Application Specific Integrated Circuit, ASIC), field-programmable gate array (Field-Programmable Gate Array, FPGA), screen drive board (also called central control board, TCON), micro control unit (Microcontroller Unit, MCU), system On Chip (SOC) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components.

In an alternative embodiment, the target chip (Slave IC) communicates with the host computer in real time by means of I2C, SPI or one-wire, etc.

With continued reference to fig. 1, each target chip includes at least one channel (also called channel), and each channel is connected to at least one execution unit. Each channel of the target chip may be individually referred to as a partition, which is also called LED Zone when the target chip is an LED driving chip. The number of channels shown in fig. 1 is 2, but not limited thereto, and the number of channels may be 1 or greater than 2, which is not limited thereto, and the number of execution units on the channels is not limited thereto.

In an alternative embodiment, the target chip and the corresponding execution unit may be separately provided, or may be integrated together, which is not limited herein.

In an alternative embodiment, the actuator unit is an LED luminary (also called LED light) or a motor electric machine. The target chip (Slave IC) may be an LED Driver chip (LED Driver) or a Motor Driver chip (Motor Driver). The target chip (Slave IC) may be any one of a power management integrated circuit (Power Management IC, abbreviated as PMIC), a Level Shift chip (Level Shift), and a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET).

In an alternative embodiment, a temperature detection module is disposed in the target chip (Slave IC), and the temperature detection module is configured to detect a chip junction temperature of the target chip (Slave IC). After the chip junction temperature of the target chip (Slave IC) is obtained, the detected chip junction temperature can be uploaded to the upper computer in real time, and the upper computer can control and manage the target chip (Slave IC) based on the received chip junction temperature, for example, control the output power or the output current of the target chip (Slave IC).

In an alternative embodiment, the temperature-based Control system of the target chip is configured with two functions, namely an a-OTP (Advanced Over Temperature Protection) function and an HTWRC (High Temperature Warning Report & Control) function, and the a-OTP and HTWRC functions can be flexibly controlled by the upper computer, so that the chip can be better protected, and better use feeling is brought to the customer.

Optionally, the a-OTP function means that when the chip junction temperature of the target chip (Slave IC) reaches an a-OTP set threshold (e.g. a monitored temperature point below), the target chip (Slave IC) may execute an over-temperature protection strategy, reduce the output power, and cool down or directly shut down (shutdown) to over-temperature protect the target chip (Slave IC). However, the upper computer may send an invalidation instruction to the target chip based on the overall effect of the system, so that the first target chip may cancel executing the over-temperature protection policy, that is, the action of the a-OTP is invalid (disable), and the target chip (Slave IC) is subject to the upper computer to continue to operate.

Alternatively, the a-OTP setting threshold may be set in advance by the user, for example, by external hardware or an upper computer.

Optionally, the HTWRC function means that when the target chip (Slave IC) detects that the chip junction temperature is greater than or equal to the high-temperature early-warning gear (for example, the monitored temperature point may be set by the upper computer) the high-temperature early-warning report is sent to the upper computer, where the high-temperature early-warning report includes the detected current chip junction temperature. Alternatively, the number of the monitored temperature points may be one or more, for example, N monitored temperature points are set hereinafter. The upper computer analyzes the information of threshold value, interval time and the like of the high-temperature early warning report, and controls a target chip (Slave IC) in real time through a corresponding algorithm.

In an alternative embodiment, the high-temperature early-warning gear includes N monitored temperature points, and temperature values corresponding to the N monitored temperature points are sequentially increased. For example, the N monitored temperature points are the 1 st monitored temperature point (Alarm 1), the 2 nd monitored temperature point (Alarm 2) … … nth monitored temperature point (AlarmN), respectively. When the chip junction temperature of the target chip (Slave IC) is detected to be greater than or equal to Alarm1, the target chip (Slave IC) can send a 1 st high-temperature early warning report to the upper computer, the 1 st high-temperature early warning report comprises the current chip junction temperature (Alarm 1) detected by the target chip (Slave IC), when the chip junction temperature of the target chip (Slave IC) rises by a preset rise (also called Alarm Step), the chip junction temperature of the target chip (Slave IC) is detected to be greater than or equal to Alarm2, the target chip (Slave IC) can send a 2 nd high-temperature early warning report to the upper computer, and the 2 nd high-temperature early warning report comprises the current chip junction temperature (Alarm 2) detected by the target chip (Slave IC). And by analogy, when the target chip (Slave IC) detects that the chip junction temperature is greater than or equal to AlarmN, the target chip (Slave IC) can send an N-th high-temperature early warning report to the upper computer, and the N-th high-temperature early warning report comprises the current chip junction temperature (AlarmN) detected by the target chip (Slave IC).

It should be noted that, in one possible scenario, when the chip junction temperature of the target chip (Slave IC) decreases by a predetermined fluctuation (also referred to as Alarm Step), for example, the target chip (Slave IC) detects that the chip junction temperature decreases from Alarm2 to Alarm1, or from Alarm3 to Alarm2, or the like, the target chip (Slave IC) sends a high-temperature early warning report to the upper computer, including the chip junction temperature corresponding to the current chip junction temperature.

The upper computer can acquire the temperature change speed of the chip junction temperature of the target chip (Slave IC), also called junction temperature rising trend, by analyzing the information such as the threshold value, the interval time and the like of the high-temperature early warning report, and further controls the target chip (Slave IC) in real time through a corresponding algorithm, so that the influence on the system function is reduced as much as possible while the over-temperature protection is carried out, and the influence on the use feeling of a client is avoided.

In an alternative embodiment, the upper computer may query the current chip junction temperature of each target chip according to a preset period, or report the corresponding current chip junction temperature of each target chip in real time according to the preset period. The upper computer can acquire the temperature change speed of the chip junction temperature of the target chip (Slave IC) based on the chip junction temperature information.

In an alternative implementation manner, a user can set a state of a target chip (Slave IC) through an upper computer, wherein the state comprises a first state, a second state and a third state, the first state refers to an a-OTP function Disable state, a temperature-based control system of the target chip does not execute the a-OTP function and only executes an HTWRC function, the second state refers to an a-OTP function Enable state, a temperature-based control system of the target chip does not execute the HTWRC function and only executes the a-OTP function; the third state refers to that the A-OTP function and the HTWRC function are executed synchronously in parallel, but the upper computer can send an invalidation instruction to the target chip based on the overall effect of the system, so that the first target chip can cancel execution of the over-temperature protection strategy, namely, the action of the A-OTP is invalid (disable), and the target chip (Slave IC) is subject to continuous work of the upper computer.

Optionally, when the target chip (Slave IC) is in the first state, the high-temperature early warning report needs to be fed back to the upper computer, or the detected chip junction temperature needs to be fed back directly, when the target chip (Slave IC) is in the second state, the HTWRC function cannot be executed, the high-temperature early warning report and the detected chip junction temperature do not need to be fed back to the upper computer, and when the target chip (Slave IC) is in the third state, the a-OTP function and the HTWRC function are synchronized, the high-temperature early warning report needs to be fed back to the upper computer, or the detected chip junction temperature needs to be fed back directly.

Referring to fig. 2, fig. 2 is a schematic structural diagram of an LCD display system according to an embodiment of the application. In the LCD display system shown in fig. 2, a target chip (Slave IC) is a single LED Driver chip (LED Driver), and an execution unit is an LED luminary (also referred to as LED light). The target chip (Slave IC) is provided with 6 channels, each channel is provided with 9 LED light emitters (also called LED lights), the LED light emitters in the figure form a 6-string 9-parallel backlight panel, and the maximum output current of the LED driving chip (LED Driver) is 20mA, i.e. when the backlight reaches the maximum brightness, the output current of the LED Driver is 20mA.

As shown in fig. 2, the LED driving chip is connected with the upper computer in a communication manner. The upper computer can set the state of the LED driving chip. For example, when the upper computer sets the LED driving chip to the second state, the A-OTP function of the LED driving chip is enabled, and at this time, the control system of the LED driving chip does not execute the HTWRC function, but only executes the A-OTP function. For example, when the set threshold value (a certain monitored temperature point) of the a-OTP is set to 120 ℃, if the junction temperature of the LED driving chip reaches 120 ℃, the output current of the LED driving chip is 19.5mA, but the junction temperature of the LED driving chip triggers the a-OTP function, the LED driving chip needs to reduce the output power, so as to achieve the purpose of reducing the temperature, possibly, the output current of the LED driving chip is directly reduced to 17mA, and at this time, the picture of the LCD display system is suddenly darkened, which brings uncomfortable sensory feeling to the user.

When the upper computer sets the LED driving chip to be in a first state, the A-OTP function of the LED driving chip is disabled, at the moment, the control system of the LED driving chip can not execute the A-OTP function and only execute the HTWRC function, a third control strategy can be executed, when the output current of the LED driving chip needs to be reduced, the situation that the picture suddenly darkens due to the fact that the backlight brightness suddenly reduces can be avoided by slowly reducing, and better use feeling is brought to a customer.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a MiniLED lamp panel according to an embodiment of the present application. Fig. 3 shows an array MiniLED lamp panel using 800 partitions, each channel (LED Zone) is provided with 4 LED luminaries (also called LED lights), i.e. 4 LED lamps are controlled by each LED driving chip. The LED driving chip (LED Driver) is in communication connection with the upper computer in a serial-parallel connection mode, the maximum output current of the LED driving chip is set to be 10mA initially, namely, when the LED lamp reaches the maximum brightness, the output current of the LED Driver is set to be 10mA.

Referring to fig. 4, fig. 4 is a schematic diagram of a display screen according to an embodiment of the application. When the MiniLED lamp panel display picture is shown in fig. 4, the upper part of the picture is bright sun, the brightness of the corresponding area of the sun is maximum, and the brightness of the shadow area at the lower right part of the picture is minimum. In fig. 4, the LED partition on the backlight panel corresponding to the area where the sun is located is referred to as zone1, and the LED partition on the backlight panel corresponding to the shadow area on the lower right is referred to as zone2. As described above, in the screen shown in fig. 4, the LED Driver chip (LED Driver) of zone1 partition has the largest output current, and the LED Driver chip (LED Driver) of zone2 partition has the smallest output current. If the picture is displayed for a long time, the chip junction temperature of the LED Driver chip (LED Driver) of zone1 partition is necessarily much higher than that of the LED Driver chip (LED Driver) of zone2 partition, and it may happen that the LED Driver chip (LED Driver) of zone1 partition triggers OTP or a-OTP, so that the LED Driver chip (LED Driver) is turned off (shutdown), the corresponding display area suddenly darkens, and the user is hard to distinguish the display objects of each area, thus bringing poor sensory feeling to the user.

In order to avoid the occurrence of the situation, promote customer use feeling, use the goal chip that the application provides to carry on the overall control based on control system of the temperature, set up LED drive chip (LED Driver) A-OTP function as Disable, will not carry out A-OTP function, only carry out HTWRC function; or, the LED Driver) A-OTP function is set as an Enable state, the A-OTP function and the HTWRC function are executed in parallel and synchronously, but the upper computer can send an invalidation instruction to the target chip based on the overall effect of the system, so that the first target chip can cancel execution of the over-temperature protection strategy, namely, the action of the A-OTP is invalid (disable), and the target chip (Slave IC) is subject to continuous operation of the upper computer, so that any one of the following first control strategy, second control strategy and third control strategy is executed, thereby avoiding influencing the system function and improving the use experience of a client.

It should be noted that, the temperature-based control system for a target chip provided in this embodiment may execute the method flow shown in the method flow embodiment below, so as to achieve the corresponding technical effects. For a brief description, reference is made to the corresponding parts of the above embodiments, where this embodiment is not mentioned.

The embodiment of the application also provides a temperature-based control method of the target chip, which is applied to an upper computer in a temperature-based control system of the target chip, and concretely relates to a flow, please refer to fig. 5, the temperature-based control method of the target chip comprises the following steps: s101 and S105 are specifically described below.

S101, receiving the current chip junction temperature uploaded by the first target chip.

Wherein the first target chip is any one target chip.

Optionally, uploading the current chip junction temperature of the first target chip to the upper computer in a high-temperature early warning report mode.

S105, executing a preset control strategy, and controlling all target chips based on the current chip junction temperature of the first target chip.

Optionally, all the target chips in step S105 are all target chips that are communicatively connected to the host computer in the temperature-based control system and are the same type as the first target chip, and also include the first target chip.

It should be noted that, the host computer not only can control the first target chip, but also can synchronously control all the target chips, so that the influence on the system function is reduced as much as possible while the target chips are protected, and the use feeling of the client is avoided.

In an alternative embodiment, the preset control strategy is any one of the first control strategy, the second control strategy and the third control strategy.

The first control strategy representation synchronously controls the output currents of all the target chips based on the current chip junction temperature and the corresponding temperature change speed of the first target chip.

Alternatively, the synchronous control of the output currents of all the target chips means that the output currents of the respective channels of each target chip are synchronously controlled.

The second control strategy characterizes the output current of all the target chips to be synchronously controlled based on the current chip junction temperature of the first target chip.

Optionally, the other target chips are all target chips in the control system, which are in communication connection with the upper computer and are the same as the first target chip in type except the first target chip.

Optionally, when the preset control policy is the first control policy, executing the preset control policy, that is, executing the first control policy. On this basis, for the content in S105, the embodiment of the present application further provides an optional implementation manner, please refer to the following S105, execute a preset control policy, and control all target chips based on the current chip junction temperature of the first target chip, which includes: s105-1, S105-2, S105-3, and S105-4 are specifically described below.

S105-1, when the current chip junction temperature of the first target chip reaches the ith monitoring temperature point, acquiring the temperature change speed of the first target chip between the ith monitoring temperature point and the ith monitoring temperature point, wherein i < N, N is more than or equal to 2 and is less than or equal to the total number of the monitoring temperature points.

In the scheme of the application, N monitoring temperature points are arranged, the temperature monitoring is carried out by stage and gear, sufficient cooling time is reserved, and chip protection is better completed. When the junction temperature of the current chip reaches the ith monitoring temperature point, the junction temperature may not be enough to harm the first target chip, and if the output current of the target chip is directly reduced, excessive protection may occur, so that the use experience of a user is affected. Therefore, in the case that N monitoring temperature points are provided, when the current chip junction temperature of the first target chip reaches the ith monitoring temperature point, it is necessary to obtain the temperature change speed of the first target chip between the ith-1 monitoring temperature point and the ith monitoring temperature point, and further determine whether the first target chip is possibly damaged by combining the temperature change speed.

Optionally, the temperature change speed of the first target chip between the i-1 th monitoring temperature point and the i-th monitoring temperature point is determined based on the time interval from the chip junction temperature of the first target chip to the i-1 th monitoring temperature point to the i-th monitoring temperature point.

S105-2, if the temperature change speed of the first target chip is smaller than the preset speed threshold, the processing is not performed temporarily.

When the temperature change speed is smaller than the preset speed threshold, the change speed of the junction temperature of the chip is lower, the rising trend is not obvious, and the first target chip is not damaged enough at the moment, so that the first target chip is not processed temporarily.

Optionally, the preset speed threshold is 20 ℃/min, and the preset speed threshold can be flexibly set by an upper computer.

S105-3, if the temperature change speed of the first target chip is greater than or equal to the preset speed threshold, controlling the output currents of all the target chips to reduce a first preset amplitude within a first preset time length.

It should be noted that, when the temperature change speed is greater than or equal to the preset speed threshold, the change speed of the chip junction temperature is higher, the rising trend is obvious, and the first target chip may be damaged. The power reduction process needs to be performed in advance, and specifically, the output currents of all the target chips may be reduced. When the execution unit is an LED luminous body, the output current of all target chips is synchronously controlled to be reduced, so that the situation that uneven brightness or sudden black screen appears can be avoided, the situation that a user is difficult to distinguish display objects in all areas is avoided, and the use experience of the user can be improved.

When the executing unit is a motor, the motor is arranged in the safety massage armchair, and the output current of all target chips is reduced by synchronous control, so that the condition that part of motor stops working, the massage force is uneven and the user experience is influenced can be avoided.

Optionally, the output currents of all the target chips are reduced within a first preset time length, and the total reduced amplitude is the first preset amplitude.

Optionally, the first preset time length is 1min, the first preset amplitude is 10%, and the first preset time length and the first preset amplitude can be flexibly set by the upper computer.

In an alternative embodiment, the first preset time length and/or the first preset amplitude corresponding to different target chips are different. For example, the first preset time length corresponding to the target chip changes with the distance between the target chip and the first target chip, and the longer the distance is, the longer the first preset time length is. The first preset amplitude corresponding to the target chip changes along with the distance between the target chip and the first target chip, and the longer the distance is, the smaller the first preset amplitude is.

S105-4, when the current chip junction temperature of the first target chip reaches the Nth monitoring temperature point, controlling the output currents of all the target chips to reduce a second preset amplitude within a second preset time length.

It should be noted that, when the chip junction temperature of the first target chip rises from the 1 st monitored temperature point to the N-1 st monitored temperature point, in any temperature rising stage (one temperature rising stage represents a stage from the i-1 st monitored temperature point to the i-th monitored temperature point), the temperature change speed of the first target chip is smaller than the preset speed threshold, and under the condition of not performing the treatment temporarily, the chip junction temperature of the first target chip may continuously rise until the chip junction temperature of the first target chip rises to the N-th monitored temperature point. Or in one or more heating stages, the temperature change speed of the first target chip is greater than or equal to a preset speed threshold, the output currents of all the target chips are controlled to be reduced by a first preset amplitude in a first preset time length, but the chip junction temperature of the first target chip is not effectively controlled to rise, and the chip junction temperature of the first target chip can continuously rise until the chip junction temperature of the first target chip rises to an Nth monitoring temperature point.

When the current chip junction temperature of the first target chip reaches the Nth monitoring temperature point, further over-temperature protection is needed, and the output currents of all the target chips are controlled to be reduced by a second preset amplitude within a second preset time length.

Optionally, the output currents of all the target chips are reduced within a second preset time length, and the total reduced amplitude is the second preset amplitude. The chip junction temperature is avoided to be too high, the first target chip can be effectively protected, when the execution unit is an LED luminous body, the situation that the picture suddenly darkens caused by suddenly reducing the backlight brightness can be avoided, better use feeling is brought to a customer, when the execution unit is a motor, the situation that part of motor stops working, the massage force is uneven and the user experience is influenced can be avoided.

It should be noted that, in the solution of the present application, when the execution unit is an LED luminary, the output current may be controlled to be reduced according to log, so as to make the output current more in line with the visual effect.

For example, the second preset time length is 30s, the second preset amplitude is 20%, and the second preset time length and the second preset amplitude can be flexibly set by the host computer.

In an alternative embodiment, the second preset time length and/or the second preset amplitude corresponding to different target chips are different. For example, the second preset time length corresponding to the target chip changes with the distance between the target chip and the first target chip, and the longer the distance is, the longer the second preset time length is. The second preset amplitude corresponding to the target chip changes along with the distance between the target chip and the first target chip, and the longer the distance is, the smaller the second preset amplitude is.

Optionally, when the preset control policy is the second control policy, executing the preset control policy, that is, executing the second control policy. On this basis, for the content in S105, the embodiment of the present application further provides an optional implementation manner, please refer to the following S105, execute a preset control policy, and control all target chips based on the current chip junction temperature of the first target chip, which includes: s105-5, described in detail below.

S105-5, when the current chip junction temperature of the first target chip reaches the ith monitoring temperature point, controlling the output currents of all the target chips to reduce a third preset amplitude within a third preset time length, wherein i is more than or equal to 1 and less than or equal to N, and N represents the total number of the monitoring temperature points.

For example, the third preset time length is 10s, the third preset amplitude is 3%, and the third preset time length and the third preset amplitude can be flexibly set by the upper computer.

In an alternative embodiment, the third preset amplitude corresponding to the ith monitored temperature point is smaller than the third preset amplitude corresponding to the (i+1) th monitored temperature point, so that the continuous temperature rise of the first target chip is inhibited as much as possible, and a protection effect is achieved.

In an alternative embodiment, the third preset time length and/or the third preset amplitude corresponding to different target chips are different. For example, the third preset time length corresponding to the target chip changes with the distance between the target chip and the first target chip, and the longer the distance is, the longer the third preset time length is. The third preset amplitude corresponding to the target chip changes along with the distance between the target chip and the first target chip, and the longer the distance is, the smaller the third preset amplitude is.

Optionally, the output currents of all the target chips are reduced within a third preset time length, and the total reduced amplitude is the third preset amplitude. When the execution unit is an LED luminous body, the output current of all target chips is synchronously controlled to be reduced, so that the situation that uneven brightness or sudden black screen appears can be avoided, the situation that a user is difficult to distinguish display objects in all areas is avoided, and the use experience of the user can be improved. When the executing unit is a motor, the motor is arranged in the safety massage armchair, and the output current of all target chips is reduced by synchronous control, so that the condition that part of motor stops working, the massage force is uneven and the user experience is influenced can be avoided.

And through the mode that the output current is reduced when the junction temperature of the chip reaches a monitoring temperature point, the condition that the junction temperature of the whole chip is rapidly increased due to the influence of other target chips on the first target chip under the conditions of overheat environment and poor heat dissipation is avoided.

Optionally, when the preset control policy is the third control policy, executing the preset control policy, that is, executing the third control policy. On this basis, for the content in S105, the embodiment of the present application further provides an optional implementation manner, please refer to the following S105, execute a preset control policy, and control all target chips based on the current chip junction temperature of the first target chip, which includes: s105-6, S105-7, S105-8 and S105-9 are described in detail below.

S105-6, when the current chip junction temperature of the first target chip reaches the ith monitoring temperature point, acquiring the temperature change speed of the first target chip between the ith-1 monitoring temperature point and the ith monitoring temperature point, wherein i < N, N is more than or equal to 2 and the total number of the monitoring temperature points.

Optionally, in the case that N monitoring temperature points are set, when the current chip junction temperature of the first target chip reaches the ith monitoring temperature point, a temperature change speed of the first target chip between the ith-1 monitoring temperature point and the ith monitoring temperature point needs to be obtained, and whether the first target chip is possibly damaged is determined by further combining the temperature change speed. Optionally, the temperature change speed of the first target chip between the i-1 th monitoring temperature point and the i-th monitoring temperature point is determined based on the time interval from the chip junction temperature of the first target chip to the i-1 th monitoring temperature point to the i-th monitoring temperature point.

S105-7, if the temperature change speed of the first target chip is smaller than the preset speed threshold, temporarily not processing.

When the temperature change speed is smaller than the preset speed threshold, the change speed of the junction temperature of the chip is lower, the rising trend is not obvious, and the first target chip is not damaged enough at the moment, so that the processing is not changed temporarily.

S105-8, if the temperature change speed of the first target chip is greater than or equal to the preset speed threshold, controlling the output current of the target channel to reduce a fourth preset amplitude within a fourth preset time length.

It should be noted that, when the temperature change speed is greater than or equal to the preset speed threshold, the change speed of the chip junction temperature is higher, the rising trend is obvious, and the first target chip may be damaged. The power reduction process needs to be performed in advance, and specifically, the output current of the target channel may be reduced.

Optionally, the output current of the target channel decreases within a fourth preset time length, and the total magnitude of the decrease is the fourth preset magnitude.

Optionally, the fourth preset time length is 1min, the fourth preset amplitude is 10%, and the fourth preset time length and the fourth preset amplitude can be flexibly set by the upper computer.

S105-9, when the current chip junction temperature of the first target chip reaches the Nth monitoring temperature point, controlling the output current of the target channel to reduce a fifth preset amplitude within a fifth preset time length.

As described above, when the current chip junction temperature of the first target chip reaches the nth monitored temperature point, further over-temperature protection is required, and the output current of the target channel is controlled to decrease by a fifth preset magnitude within a fifth preset time period.

Optionally, the output current of the target channel decreases within a fifth preset time length, and the total magnitude of the decrease is the fifth preset magnitude. The chip junction temperature is avoided to be too high, the first target chip can be effectively protected, when the execution unit is an LED luminous body, the situation that the picture suddenly darkens caused by suddenly reducing the backlight brightness can be avoided, better use feeling is brought to a customer, when the execution unit is a motor, the situation that part of motor stops working, the massage force is uneven and the user experience is influenced can be avoided.

For example, the fifth preset time length is 30s, the fifth preset amplitude is 20%, and the fifth preset time length and the fifth preset amplitude can be flexibly set by the host computer.

In an alternative embodiment, the fifth preset time period is 2 minutes and the fifth preset amplitude is 20%.

On the basis of fig. 5, regarding how to determine the preset control policy to simultaneously consider the protection of the target chip and the use experience of the user, the embodiment of the present application further provides a possible implementation manner, referring to fig. 6, and before S105, the temperature-based control method of the target chip further includes: s104 is specifically described below.

S104, acquiring the current environment temperature.

Optionally, a temperature sensor for monitoring the ambient temperature is provided on the housing of the application device (e.g., the MiniLED light panel shown in fig. 3) of the target chip temperature-based control system, and optionally, the temperature sensor may also be provided adjacent to the execution unit. The temperature sensor is in communication connection with the upper computer, and can transmit the monitored current ambient temperature to the upper computer. The current ambient temperature is the temperature of the ambient space in which the execution unit is located or the exterior temperature of the execution unit. It should be noted that, different ambient temperatures will affect different heat conduction rates inside the application device, and may affect the heat dissipation speed of the whole machine. Therefore, when the preset control strategy is determined, the current environment temperature can be combined, and the selection can be reasonably made under the condition of considering the heat dissipation speed, so that the protection of the target chip and the use experience of a user are simultaneously considered. Optionally, for the content in S105, an alternative implementation manner is further provided in the embodiment of the present application. Referring to the following, S105, a step of executing a preset control strategy to control all target chips based on the current chip junction temperature of the first target chip, includes: s105-10, specifically described below.

S105-10, executing a preset control strategy in combination with the current environment temperature, and controlling all target chips based on the current environment temperature and the current chip junction temperature of the first target chip.

Optionally, parameters in the preset control strategy may be set based on the current ambient temperature, including, but not limited to, any one or more of the first preset time length to the fifth preset time length and the first preset amplitude to the fifth preset amplitude.

Optionally, the policy to be executed may also be determined based on the current ambient temperature. In the scheme of the application, when the current ambient temperature is larger than the first temperature threshold, the ambient temperature is too high, and the heat dissipation effect of the whole machine is poor, namely the heat dissipation speed is low. Under such circumstances, if the temperature is not reduced in time, the temperature will be reduced only when the junction temperature of the chip is already high (for example, when the nth monitored temperature point is reached), which may cause a continuous increase in temperature due to the heat dissipation speed, and even affect the increase in junction temperature of other adjacent target chips, so that the target chips may be damaged. Therefore, the second control strategy can be determined as a preset control strategy, and the temperature is reduced once every time the second control strategy reaches a monitoring temperature point, so that the output current is reduced, and the target chip is reasonably protected. And determining the first control strategy as a preset control strategy under the condition that the current environmental temperature is larger than the second temperature threshold and smaller than or equal to the first temperature threshold. In the scheme of the application, when the current ambient temperature is larger than the second temperature threshold and smaller than or equal to the first temperature threshold, the ambient temperature is moderate, and the heat dissipation effect of the whole machine is better than that when the current ambient temperature is larger than the first temperature threshold. In this case, if the chip junction temperature is high, when a cooling means is adopted, for example, after the output current is reduced, the chip junction temperature is rapidly reduced by heat dissipation, and damage to the target chip can be avoided after the cooling means is adopted. Therefore, the first control strategy can be determined as a preset control strategy, the temperature reduction is controlled by combining the monitored temperature point and the corresponding temperature change speed, and the output current is reduced, so that the target chip is reasonably protected, and the use feeling of a user is improved.

In an alternative embodiment, the present ambient temperature is used for temperature compensation of the corresponding output current in the preset control strategy.

Alternatively, because the LED/motor current and emitted luminous flux/output power are different at different temperatures, their relationship is different. The temperature compensation refers to determining how large the current the target chip (certain IC) should actually output according to the temperature reported by the target chip (certain IC), so as to keep the luminous flux/output power emitted by the LED/motor as the set standard value.

In an alternative implementation mode, the first target chip is provided with N monitoring temperature points, when the junction temperature of the first target chip reaches the kth monitoring temperature point, the kth monitoring temperature point is determined to be the current junction temperature of the chip, and the current junction temperature of the chip is uploaded to the upper computer, wherein k is more than or equal to 1 and less than or equal to N.

Optionally, the kth monitoring temperature point is, for example, alarmk in the foregoing, and the first target chip only needs to report the current chip junction temperature when the chip junction temperature reaches the kth monitoring temperature point, so that the communication frequency between the upper computer and the first target chip is reduced, the data processing amount of the upper computer and the first target chip is reduced, and the hardware cost can be reduced.

In an optional implementation manner, the first target chip executes the a-OTP function and the HTWRC function in parallel and synchronously, but the upper computer may send an invalidation instruction to the target chip based on the overall effect of the system, so that the first target chip may cancel execution of the over-temperature protection policy, that is, the action of the a-OTP is invalid (disable), and the target chip (Slave IC) continues to operate according to the upper computer, so as to execute any one of the following first control policy, second control policy and third control policy, so as to avoid affecting the system function and improve the use experience of the client. When the junction temperature of the first target chip reaches a kth monitoring temperature point, an over-temperature protection strategy is executed, and the output current of the first target chip is reduced by a sixth preset amplitude or the output current is closed within a sixth preset time length.

On this basis, with reference to fig. 7, before executing the preset control policy, the method for controlling the target chip based on temperature further includes: s102 and S103 are specifically described below.

S102, determining whether a preset control strategy needs to be executed or not based on the rising speed of the first target chip in the process of rising the chip junction temperature to the kth monitoring temperature point. If yes, executing S103; if not, skipping.

Optionally, in the case that the rising speed is greater than the preset rising threshold, it is determined that the preset control strategy needs to be executed. At this time, the upper computer may send an invalidation instruction to the target chip based on the overall effect of the system, so that the first target chip may cancel execution of the over-temperature protection policy, that is, the action of the a-OTP is invalid (disable), and the target chip (Slave IC) is subject to the upper computer to continue to operate.

When the execution unit corresponding to the target chip is an LED illuminant and the display content corresponding to the target chip is dynamically changed, for the content in S102, the embodiment of the present application further provides an optional implementation, and specifically, please refer to the following, S102 includes:

Firstly judging whether the target output current corresponding to the first target chip at the next moment is matched with the current of the first target chip after the chip junction temperature reaches the kth monitoring temperature point and the over-temperature protection strategy is executed;

if so, determining that the preset control strategy does not need to be executed.

If the first target chip is not matched with the second target chip, determining whether a preset control strategy needs to be executed or not based on the rising speed of the first target chip in the process of rising the chip junction temperature to the kth monitoring temperature point.

Optionally, the target output current matches the present current, indicating that the difference between the two is less than a preset difference. According to the scheme, global consideration and comprehensive judgment can be performed based on the current junction temperature and the temperature rising speed of the chip and the target output current required at the next moment.

And S103, an invalidation instruction is sent to the first target chip so that the first target chip can cancel executing the over-temperature protection strategy.

In an alternative embodiment, the host computer may set the state of the target chip, and when the state is set to the first state, the a-OTP function is not executed, only the HTWRC function is executed, and the host computer does not execute S102 and S103. When the third state is set, the a-OTP function and the HTWRC function are simultaneously executed, and the upper level opportunity is required to execute S102 and S103. When the second state is set, the upper computer may not execute S101-S105 when only the a-OTP function is executed.

The embodiment of the application also provides a storage medium, which stores computer instructions and programs, and the computer instructions and the programs execute the target chip temperature-based control method of the embodiment when being read and executed. The storage medium may include memory, flash memory, registers, combinations thereof, or the like.

In summary, the embodiments of the present application provide a temperature-based control method, a temperature-based control system and a storage medium for a target chip, where the temperature-based control method is applied to a host computer, and the host computer is connected to at least one target chip, each target chip includes at least one channel, and each channel is connected to at least one execution unit, and the method includes: receiving the current chip junction temperature uploaded by the first target chip; wherein the first target chip is any one target chip; executing a preset control strategy, and controlling all target chips based on the current chip junction temperature of the first target chip. The upper computer can control the first target chip, can synchronously control all the target chips, and can protect the target chips and simultaneously reduce the influence on the system function as much as possible so as to avoid influencing the use feeling of customers.

The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

It will be evident to those skilled in the art that the application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims

1. A temperature-based control method for a target chip, which is applied to a host computer, wherein the host computer is connected with at least one target chip, each target chip comprises at least one channel, and each channel is connected with at least one execution unit, and the method comprises:

wherein the first target chip is any one of the target chips;

2. The method of claim 1, wherein the preset control strategy is any one of a first control strategy, a second control strategy, and a third control strategy;

the first control strategy representation synchronously controls the output currents of all target chips based on the current chip junction temperature and the corresponding temperature change speed of the first target chip;

3. The method of temperature-based control of a target chip of claim 2, wherein the step of executing the first control strategy comprises:

when the current chip junction temperature of the first target chip reaches an ith monitoring temperature point, acquiring the temperature change speed of the first target chip between the ith-1 monitoring temperature point and the ith monitoring temperature point, wherein i < N, N is more than or equal to 2 and indicates the total number of the monitoring temperature points;

if the temperature change speed of the first target chip is smaller than a preset speed threshold value, temporarily not processing;

if the temperature change speed of the first target chip is greater than or equal to a preset speed threshold, controlling the output currents of all the target chips to reduce a first preset amplitude within a first preset time length;

when the current chip junction temperature of the first target chip reaches an N monitoring temperature point, controlling the output currents of all the target chips to reduce a second preset amplitude within a second preset time length.

4. A method of temperature-based control of a target chip as claimed in claim 3, wherein the first preset amplitudes for different ones of the target chips are different and/or the second preset amplitudes for different ones of the target chips are different.

5. The method of temperature-based control of a target chip of claim 2, wherein the step of executing the second control strategy comprises:

when the current chip junction temperature of the first target chip reaches an ith monitoring temperature point, controlling the output currents of all the target chips to reduce a third preset amplitude within a third preset time length, wherein i is more than or equal to 1 and less than or equal to N, and N represents the total number of the monitoring temperature points.

6. The method of claim 5, wherein the third preset magnitudes corresponding to different target chips are different.

7. The method of temperature-based control of a target chip of claim 2, wherein the step of executing the third control strategy comprises:

if the temperature change speed of the first target chip is greater than or equal to a preset speed threshold, controlling the output current of the target channel to reduce a fourth preset amplitude within a fourth preset time length;

When the current chip junction temperature of the first target chip reaches an N monitoring temperature point, controlling the output current of the target channel to reduce a fifth preset amplitude within a fifth preset time length.

8. The method of temperature-based control of a target chip of claim 1, wherein prior to said executing a preset control strategy, the method comprises:

acquiring a current environment temperature, wherein the current environment temperature is the temperature of an environment space where the execution unit is located or the appearance temperature of the execution unit;

the step of executing a preset control strategy and controlling all target chips based on the current chip junction temperature of the first target chip comprises the following steps:

and executing a preset control strategy in combination with the current environment temperature, and controlling all target chips based on the current environment temperature and the current chip junction temperature of the first target chip.

9. The method of claim 8, wherein the current ambient temperature is used to temperature compensate the corresponding output current in the preset control strategy.

10. The method for controlling a target chip based on temperature according to claim 1, wherein the first target chip is provided with N monitoring temperature points, and when the chip junction temperature reaches a kth monitoring temperature point, the kth monitoring temperature point is determined as the current chip junction temperature, and the current chip junction temperature is uploaded to the upper computer, wherein k is 1-N.

11. The method of claim 10, wherein the first target chip performs an over-temperature protection strategy when the chip junction temperature reaches the kth monitored temperature point, the output current of the first target chip decreases by a sixth preset magnitude or turns off the output current for a sixth preset length of time, and the target chip temperature-based control method further comprises, before performing the preset control strategy:

determining whether the preset control strategy needs to be executed or not based on the rising speed of the first target chip in the process of rising the chip junction temperature to the kth monitoring temperature point;

and if so, sending an invalid instruction to the first target chip so that the first target chip can cancel executing the over-temperature protection strategy.

12. A temperature-based control system for a target chip, wherein the temperature-based control system for a target chip comprises a host computer and at least one target chip, wherein the host computer is connected with the at least one target chip, each target chip comprises at least one channel, and each channel is connected with at least one execution unit;

Wherein the first target chip is any one of the target chips;

13. A computer readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the method according to any of claims 1-11.