CN111200903A - Method for manufacturing double-sided board of fine circuit - Google Patents
Method for manufacturing double-sided board of fine circuit Download PDFInfo
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- CN111200903A CN111200903A CN202010136075.8A CN202010136075A CN111200903A CN 111200903 A CN111200903 A CN 111200903A CN 202010136075 A CN202010136075 A CN 202010136075A CN 111200903 A CN111200903 A CN 111200903A
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- copper
- copper plating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/032—Organic insulating material consisting of one material
- H05K1/0346—Organic insulating material consisting of one material containing N
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Abstract
The invention discloses a method for manufacturing a double-sided board of a fine circuit, which comprises the following process manufacturing flows: step A: blanking a base material; and B: laser drilling; and C: carrying out plasma treatment; step D: vacuum sputtering; step E: copper plating for the first time; step F: copper plating for the second time; step G: micro-etching treatment; step H: vacuum film pasting; step I: exposing the circuit; step J: developing the dry film; step K: etching and stripping; step L: and (4) carrying out flash etching. The invention can be used for manufacturing fine circuits with the etching factor more than or equal to 5, the line width and the line distance of 35/35 mu m and 30/30 mu m.
Description
Technical Field
The invention relates to the technical field of flexible circuit boards, in particular to a method for manufacturing a double-sided board of a fine circuit.
Background
With the trend of high-speed development of electronic products, flexible circuit boards serving as component supports and electrical signal transmission carriers are gradually developing towards miniaturization, light weight, high density and multiple functions, so that higher requirements are put on the performance of flexible circuit boards, particularly, the circuit requirements are more and more fine, the circuit manufacturing capability is limited by the thickness of a copper layer, the thinner the copper layer is, the finer the circuit can be manufactured, the thickness of the copper layer of a conventional copper foil on the market is 12 μm, the copper of holes of a circuit board generally has the requirement of more than 8 μm, the copper after copper plating through drilling generally reaches more than 22 μm, the copper is used as a circuit, the minimum circuit manufacturing capability is 45/45 μm, the more and more fine circuit requirements cannot be met, such as fine circuits of 35/35 μm and 30/30 μm, and the MSAP (magnetic field programmable gate process) developed in recent years has high process difficulty and equipment is high in equipment, The input cost of materials, liquid medicine and the like is extremely high, so that the research, optimization and improvement of fine lines become more economic and urgent requirements on the basis of the existing line manufacturing process.
In view of the above, the present inventors have made extensive studies and researches on various defects and inconveniences caused by the perfection of the fine circuit manufacturing process of the flexible printed circuit board.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for manufacturing a double-sided board of a fine circuit.
In order to achieve the above purpose, the solution of the invention is:
a double-sided board manufacturing method of fine lines comprises the following process manufacturing flows:
step A: blanking a base material, wherein the base material is a PI material, and the thickness of the base material is more than or equal to 20 mu m;
and B: performing laser drilling, namely performing laser drilling on the base material, wherein the minimum aperture is more than or equal to 25 mu m;
and C: plasma treatment, namely treating residual glue in the holes of the substrate and cleaning the surface of the substrate by plasma;
step D: vacuum sputtering, namely sputtering a conductive medium layer on the surface of the substrate and in the hole;
step E: plating copper for the first time, namely plating a thin first copper plating layer on the surface of the base material and the conductive medium layer in the hole to ensure that the surface of the base material and the hole are provided with ultrathin base copper;
step F: performing second copper plating, namely performing thickening copper plating on the first copper plating layer to obtain a second copper plating layer, wherein the thickness of the second copper plating layer meets the requirements of the hole copper and fine circuit manufacturing thickness of a product, so that the surface and the hole of the base material have the hole copper and the surface copper required by the fine circuit;
step G: microetching, namely performing microetching treatment on the surface of the copper, roughening the surface of the copper by microetching and cleaning the surface of the copper, and improving the binding force between the surface of the copper and a dry film;
step H: vacuum film pasting, namely pressing a dry film on the surface of the copper in vacuum, wherein the thickness of the dry film is 10-20 mu m;
step I: line exposure, namely transferring line pattern exposure to a dry film, and adopting an LDI exposure machine for exposure or a parallel exposure machine and a glass film for exposure;
step J: developing a dry film, namely developing a dry film pattern, wherein the developing point is 50-70%;
step K: etching and stripping, namely removing the first copper plating layer and the second copper plating layer at the positions without the dry film coverage by vacuum etching, then stripping and removing the dry film layer to show a primary circuit graph;
step L: and (4) flashing, wherein the non-circuit area is etched by flashing, and the circuit pattern is completely etched.
Further, in step B, in laser drilling, the minimum aperture is 50, 75 or 100 μm.
Further, in the step D, in the vacuum sputtering, the conductive medium layer is nickel, chromium, copper, titanium, aluminum, palladium or cadmium.
Further, in the step D), the thickness of the conductive dielectric layer is 100-300 nm.
Further, in the first copper plating of step E, the thickness of the first copper plating layer is 2 to 4 μm.
And step F, in the second copper plating, the thickness of the second copper plating layer is 6-8 mu m, and the thickness of the copper on the surface of the twice copper plating total body is 8-12 mu m.
Further, in the second copper plating in the step F, the copper thickness of the surface of the secondary copper plating total body is 9 μm or 12 μm.
Further, in the step H of vacuum film pasting, the thickness of the dry film is 15 μm, and the resolution of the dry film is less than or equal to 30 μm.
Furthermore, in the step L of flash etching, the adopted flash etching liquid medicine contains an etching inhibitor, the etching inhibitor is mainly adsorbed on the top surface and the side surface of the circuit, no or little etching inhibitor is adsorbed at the line distance, in the flash etching process, the conductive medium layer at the line distance is quickly etched and removed, and the top surface and the side surface of the circuit are uniformly etched in a micro-scale manner due to the protection of the etching inhibitor, so that the required fine circuit is obtained.
Further, the invention relates to a method for manufacturing a double-sided board of a fine circuit, which further comprises a step M of drying and a step N of plasma processing, wherein the step M is arranged after the step J and before the step K, and the step M is as follows: drying, namely drying the moisture on the board at the drying temperature of 80-120 ℃ for 15-45 min; and step N: plasma treatment, plasma treatment get rid of line distance department dry film root edge cull, circuit deckle edge is bad when improving the etching, improves the circuit precision.
After the scheme is adopted, the PI substrate is subjected to laser drilling, the aperture of 25 mu m can be drilled in a minimum laser mode, the upper conductive dielectric layer is sputtered in the hole and on the surface of the PI substrate, the first ultrathin copper plating layer is plated on the conductive dielectric layer, the surface and the hole of the substrate are provided with the ultrathin substrate copper, the second copper plating layer is plated on the first copper plating layer in a thickening mode, the surface and the hole of the substrate are plated with copper twice, the hole copper required by a product and the surface copper required by a fine circuit are obtained, the copper plating is divided into two times, the process conditions are controlled separately, the first copper ensures that the conductive dielectric layer is not damaged, the copper plating efficiency can be improved during the second copper plating, and the required surface copper and hole copper can be obtained flexibly according to the requirements of the product; the bonding force between the dry film and the copper surface is improved by adopting a microetching treatment and a vacuum film pasting process; the LDI exposure machine or the parallel exposure machine and the glass film exposure are adopted to complete the fine line pattern transfer; a vacuum etching process is adopted to finish the initial pattern of the circuit, improve the pool effect during etching and improve the etching factor; the flash etching process is adopted, the flash etching liquid medicine containing the etching inhibitor is adopted, the etching inhibitor is mainly adsorbed on the top surface and the side surface of the circuit, the line space does not adsorb or slightly adsorb the etching inhibitor, the conductive medium layer of the line space is quickly etched and removed in the flash etching process, the top surface and the side surface of the circuit are slightly and uniformly etched due to the protection of the etching inhibitor, the phenomena that the conductive medium layer of the line space is not completely etched or the root of the circuit is excessively etched are improved, and the manufacturing capacity of the fine circuit is improved; further, after the developing step, drying and plasma processing are adopted to remove residual glue at the root edge of the dry film, so that the defect of line burrs during etching is improved, and the line precision is improved; the invention can be used for manufacturing fine circuits with the etching factor more than or equal to 5, the line width and the line distance of 35/35 mu m and 30/30 mu m.
Drawings
FIG. 1 is a process flow diagram of one embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a substrate according to the present invention;
FIG. 3 is a schematic view of the structure of the present invention after step B (laser drilling);
FIG. 4 is a schematic view of the structure after step D (vacuum sputtering);
FIG. 5 is a schematic view of the structure of the present invention after step E (first copper plating);
FIG. 6 is a schematic view of the structure of the present invention after step F (second copper plating);
FIG. 7 is a schematic view showing the structure of the present invention after step H (vacuum lamination);
FIG. 8 is a schematic structural view after step J (development) of the present invention;
FIG. 9 is a schematic diagram of the structure of the present invention after step K (etching and stripping);
FIG. 10 is a schematic view of the structure of the present invention after step L (flash etching);
FIG. 11 is a process flow diagram of another preferred embodiment of the present invention;
FIG. 12 is a schematic view of the dry film root residue after development at X in FIG. 8;
FIG. 13 is a schematic diagram of the dry film root residual glue processed by X plasma in FIG. 8.
Detailed Description
In order to further explain the technical solution of the present invention, the present invention is explained in detail by the following specific examples.
As shown in fig. 1, the present invention is a method for manufacturing a double-sided board of fine circuit, and the process flow is as follows:
step A: blanking a base material, wherein the base material 1 is a PI material, and the thickness of the base material 1 is more than or equal to 20 mu m, as shown in figure 2;
and B: laser drilling, namely performing laser drilling on the base material 1, wherein the minimum aperture is more than or equal to 25 mu m, as shown in figure 3;
and C: plasma treatment, namely treating residual glue in the holes of the substrate 1 and cleaning the surface of the substrate 1 by plasma;
step D: vacuum sputtering, namely, sputtering a conductive medium layer 2 on the surface of the substrate 1 and in the hole in vacuum, as shown in FIG. 4;
step E: first copper plating, namely plating a thin first copper plating layer 3 on the conductive medium layer 2 on the surface of the base material 1 and in the hole to ensure that the surface of the base material 1 and the hole are provided with ultrathin base copper, as shown in fig. 5;
step F: a second copper plating step of performing thickening copper plating on the first copper plating layer 3 to obtain a second copper plating layer 4, wherein the thickness of the second copper plating layer 4 is determined according to the thickness of the hole copper and the fine line of the product, so that the surface and the hole of the base material 1 have the hole copper and the surface copper required by the fine line of the product, as shown in fig. 6;
step G: microetching, namely performing microetching treatment on the surface of the copper, roughening the surface of the copper by microetching and cleaning the surface of the copper, and improving the binding force between the surface of the copper and a dry film;
step H: vacuum film pasting, namely pressing a dry film 5 on the surface of the copper in vacuum, wherein the thickness of the dry film 5 is 10-20 μm, as shown in figure 7;
step I: line exposure, namely transferring line pattern exposure to the dry film 6, and adopting an LDI exposure machine for exposure or a parallel exposure machine and a glass film for exposure;
step J: dry film development, developing out a dry film pattern with a development point of 50-70%, as shown in fig. 8;
step K: etching and stripping, removing the first copper plating layer 3 and the second copper plating layer 4 at the positions without the dry film coverage by vacuum etching, and then stripping and removing the dry film layer to show a primary circuit graph as shown in FIG. 9;
step L: and (4) performing flash etching, wherein the conductive medium layer 2 at the non-line area, namely the line distance S, is removed by the flash etching, and the line pattern W is completely etched, as shown in FIG. 10.
Further, in step B (laser drilling), the minimum aperture is 50, 75 or 100 μm.
Further, in step D (vacuum sputtering), the conductive dielectric layer 2 is nickel, chromium, copper, titanium, aluminum, palladium or cadmium.
Further, in step D (vacuum sputtering), the thickness of the conductive dielectric layer 2 is 100-300 nm.
Further, in step E (first copper plating), the thickness of the first copper plating layer 3 is 2 to 4 μm.
Further, in step F (second copper plating), the thickness of the second copper plating layer 4 is 6-8 μm, and the copper thickness of the surface of the twice copper plating assembly is 8-12 μm.
Further, in step F (second copper plating), the copper thickness of the secondary copper plating overall surface is 9 μm or 12 μm.
Further, in step H (vacuum lamination), the thickness of the dry film 5 is 15 μm, and the dry film resolution is less than or equal to 30 μm.
Further, in the step L (flash etching), the adopted flash etching liquid contains an etching inhibitor, the etching inhibitor is mainly adsorbed on the top surface and the side surface of the line L, no or a small amount of the etching inhibitor is adsorbed at the line distance S, during the flash etching, the conductive dielectric layer 2 at the line distance S is quickly etched and removed, and the top surface and the side surface of the line L are uniformly etched in a micro-scale due to the protection of the etching inhibitor, so as to obtain the required fine line.
As shown in fig. 11, the method for manufacturing a double-sided board of a fine circuit according to the present invention further includes a step M of drying and a step N of plasma processing, which are provided after the step J and before the step K, and the step M: drying, namely drying the moisture on the board at the drying temperature of 80-120 ℃ for 15-45 min; and step N: and (3) plasma treatment, namely removing the residual glue 51 on the edge of the dry film root at the line distance S by plasma treatment, improving the line burr defect during etching and improving the line precision.
After the scheme is adopted, the PI substrate is subjected to laser drilling, the aperture of 25 mu m can be drilled in a minimum laser mode, the upper conductive dielectric layer is sputtered in the hole and on the surface of the PI substrate, the first ultrathin copper plating layer is plated on the conductive dielectric layer, the surface and the hole of the substrate are provided with the ultrathin substrate copper, the second copper plating layer is plated on the first copper plating layer in a thickening mode, the surface and the hole of the substrate are plated with copper twice, the hole copper required by a product and the surface copper required by a fine circuit are obtained, the copper plating is divided into two times, the process conditions are controlled separately, the first copper ensures that the conductive dielectric layer is not damaged, the copper plating efficiency can be improved during the second copper plating, and the required surface copper and hole copper can be obtained flexibly according to the requirements of the product; the bonding force between the dry film and the copper surface is improved by adopting a microetching treatment and a vacuum film pasting process; the LDI exposure machine or the parallel exposure machine and the glass film exposure are adopted to complete the fine line pattern transfer; a vacuum etching process is adopted to finish the initial pattern of the circuit, improve the pool effect during etching and improve the etching factor; the method adopts a flash etching process and flash etching liquid medicine containing an etching inhibitor, the etching inhibitor is mainly adsorbed on the top surface and the side surface of the line L, no etching inhibitor or a small amount of etching inhibitor is adsorbed at the line distance S, in the flash etching process, the conductive medium layer at the line distance S is quickly etched and removed, the top surface and the side surface of the line L are slightly and uniformly etched due to the protection of the etching inhibitor, the phenomenon that the conductive medium layer at the line distance S is not completely etched or the root of the line L is excessively etched is improved, and the manufacturing capability of a fine line is improved; further, after the developing step, drying and plasma processing are adopted to remove residual glue at the root edge of the dry film, so that the defect of line burrs during etching is improved, and the line precision is improved; the invention can be used for manufacturing fine circuits with the etching factor more than or equal to 5, the line width and the line distance of 35/35 mu m and 30/30 mu m.
The above embodiments and drawings are not intended to limit the form and style of the present invention, and any suitable changes or modifications thereof by those skilled in the art should be considered as not departing from the scope of the present invention.
Claims (10)
1. The method for manufacturing the double-sided board of the fine circuit is characterized by comprising the following process manufacturing flows:
step A: blanking a base material, wherein the base material is a PI material, and the thickness of the base material is more than or equal to 20 mu m;
and B: performing laser drilling, namely performing laser drilling on the base material, wherein the minimum aperture is more than or equal to 25 mu m;
and C: plasma treatment, namely treating residual glue in the holes of the substrate and cleaning the surface of the substrate by plasma;
step D: vacuum sputtering, namely sputtering a conductive medium layer on the surface of the substrate and in the hole;
step E: plating copper for the first time, namely plating a first copper plating layer on the surface of the base material and the conductive medium layer in the hole to ensure that the surface of the base material and the hole are provided with ultrathin base copper;
step F: performing second copper plating, namely performing thickening copper plating on the first copper plating layer to obtain a second copper plating layer, wherein the thickness of the second copper plating layer meets the requirements of the hole copper and fine circuit manufacturing thickness of a product, so that the surface and the hole of the base material have the hole copper and the surface copper required by the fine circuit;
step G: microetching, namely performing microetching treatment on the copper surface, roughening the microetching and cleaning the copper surface;
step H: vacuum film pasting, namely pressing a dry film on the surface of the copper in vacuum, wherein the thickness of the dry film is 10-20 mu m;
step I: line exposure, namely transferring line pattern exposure to a dry film, and adopting an LDI exposure machine for exposure or a parallel exposure machine and a glass film for exposure;
step J: developing a dry film, namely developing a dry film pattern, wherein the developing point is 50-70%;
step K: etching and stripping, namely removing the first copper plating layer and the second copper plating layer at the positions without the dry film coverage by vacuum etching, then stripping and removing the dry film layer to show a primary circuit graph;
step L: and (4) flashing, wherein the non-circuit area is etched by flashing, and the circuit pattern is completely etched.
2. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and B, in laser drilling, the minimum aperture is 50, 75 or 100 mu m.
3. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and D, in the vacuum sputtering, the conductive medium layer is nickel, chromium, copper, titanium, aluminum, palladium or cadmium.
4. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and D) performing vacuum sputtering, wherein the thickness of the conductive medium layer is 100-300 nm.
5. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and E, in the first copper plating, the thickness of the first copper plating layer is 2-4 mu m.
6. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and F, in the second copper plating, the thickness of the second copper plating layer is 6-8 mu m, and the thickness of the copper on the surface of the twice copper plating total body is 8-12 mu m.
7. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and F, in the second copper plating, the thickness of the copper on the surface of the secondary copper plating total body is 9 micrometers or 12 micrometers.
8. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and H, in the vacuum film pasting, the thickness of the dry film is 15 mu m, and the resolution of the dry film is less than or equal to 30 mu m.
9. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and in the step L, the adopted flash etching liquid medicine contains an etching inhibitor, the etching inhibitor is adsorbed on the top surface and the side surface of the circuit, no etching inhibitor or a small amount of etching inhibitor is adsorbed at the line distance, the conductive medium layer at the line distance is quickly etched and removed in the flash etching process, and the top surface and the side surface of the circuit are uniformly etched in a micro-scale manner due to the protection of the etching inhibitor, so that the required fine circuit is obtained.
10. The method for manufacturing a double-sided board of fine lines as claimed in claim 1, wherein: and the step M drying and the step N plasma processing are arranged after the step J and before the step K, and the step M: drying, namely drying the moisture on the board at the drying temperature of 80-120 ℃ for 15-45 min; and step N: and (4) carrying out plasma treatment, wherein residual glue on the edge of the root of the dry film at the line distance is removed by the plasma treatment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010136075.8A CN111200903A (en) | 2020-03-02 | 2020-03-02 | Method for manufacturing double-sided board of fine circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010136075.8A CN111200903A (en) | 2020-03-02 | 2020-03-02 | Method for manufacturing double-sided board of fine circuit |
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| CN111200903A true CN111200903A (en) | 2020-05-26 |
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| CN202010136075.8A Pending CN111200903A (en) | 2020-03-02 | 2020-03-02 | Method for manufacturing double-sided board of fine circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111629526A (en) * | 2020-06-09 | 2020-09-04 | 瑞声精密制造科技(常州)有限公司 | LCP substrate manufacturing method |
| CN113056093A (en) * | 2021-03-09 | 2021-06-29 | 深圳市昱安旭瓷电子科技有限公司 | TFT circuit substrate production process |
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| CN103140026A (en) * | 2013-02-04 | 2013-06-05 | 深圳市佳捷特陶瓷电路技术有限公司 | Ceramic base copper clad laminate and production method thereof |
| CN103781285A (en) * | 2014-02-18 | 2014-05-07 | 华中科技大学 | Method for manufacturing and repairing conducting circuits on surfaces of ceramic substrates |
| CN104582320A (en) * | 2013-12-16 | 2015-04-29 | 厦门弘信电子科技股份有限公司 | Front-end manufacturing technology of flexible circuit board |
| CN105282986A (en) * | 2015-10-14 | 2016-01-27 | 苏州福莱盈电子有限公司 | Production technique of fine flexible circuit boards |
| US20170006708A1 (en) * | 2015-06-30 | 2017-01-05 | Unitech Printed Circuit Board Corp. | Method of manufacturing printed circuit board with embedded electronic components positioned by using solder paste |
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2020
- 2020-03-02 CN CN202010136075.8A patent/CN111200903A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103140026A (en) * | 2013-02-04 | 2013-06-05 | 深圳市佳捷特陶瓷电路技术有限公司 | Ceramic base copper clad laminate and production method thereof |
| CN104582320A (en) * | 2013-12-16 | 2015-04-29 | 厦门弘信电子科技股份有限公司 | Front-end manufacturing technology of flexible circuit board |
| CN103781285A (en) * | 2014-02-18 | 2014-05-07 | 华中科技大学 | Method for manufacturing and repairing conducting circuits on surfaces of ceramic substrates |
| US20170006708A1 (en) * | 2015-06-30 | 2017-01-05 | Unitech Printed Circuit Board Corp. | Method of manufacturing printed circuit board with embedded electronic components positioned by using solder paste |
| CN105282986A (en) * | 2015-10-14 | 2016-01-27 | 苏州福莱盈电子有限公司 | Production technique of fine flexible circuit boards |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111629526A (en) * | 2020-06-09 | 2020-09-04 | 瑞声精密制造科技(常州)有限公司 | LCP substrate manufacturing method |
| CN111629526B (en) * | 2020-06-09 | 2021-09-24 | 瑞声精密制造科技(常州)有限公司 | LCP substrate manufacturing method |
| CN113056093A (en) * | 2021-03-09 | 2021-06-29 | 深圳市昱安旭瓷电子科技有限公司 | TFT circuit substrate production process |
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