CN111629526B - LCP substrate manufacturing method - Google Patents
LCP substrate manufacturing method Download PDFInfo
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- CN111629526B CN111629526B CN202010519372.0A CN202010519372A CN111629526B CN 111629526 B CN111629526 B CN 111629526B CN 202010519372 A CN202010519372 A CN 202010519372A CN 111629526 B CN111629526 B CN 111629526B
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- layer circuit
- circuit board
- microetching
- inner layer
- lcp substrate
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- 239000000758 substrate Substances 0.000 title claims abstract description 30
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 49
- 229910052802 copper Inorganic materials 0.000 claims abstract description 48
- 239000010949 copper Substances 0.000 claims abstract description 48
- 238000005530 etching Methods 0.000 claims abstract description 8
- 238000003825 pressing Methods 0.000 claims abstract description 6
- 238000004544 sputter deposition Methods 0.000 claims abstract description 5
- 238000005406 washing Methods 0.000 claims description 32
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 20
- 238000002294 plasma sputter deposition Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 15
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 15
- 239000002253 acid Substances 0.000 claims description 14
- 230000003064 anti-oxidating effect Effects 0.000 claims description 10
- 238000001035 drying Methods 0.000 claims description 9
- LCPVQAHEFVXVKT-UHFFFAOYSA-N 2-(2,4-difluorophenoxy)pyridin-3-amine Chemical compound NC1=CC=CN=C1OC1=CC=C(F)C=C1F LCPVQAHEFVXVKT-UHFFFAOYSA-N 0.000 claims description 6
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 claims description 6
- 239000003963 antioxidant agent Substances 0.000 claims description 6
- 230000003078 antioxidant effect Effects 0.000 claims description 6
- 229910001431 copper ion Inorganic materials 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 6
- CHQMHPLRPQMAMX-UHFFFAOYSA-L sodium persulfate Substances [Na+].[Na+].[O-]S(=O)(=O)OOS([O-])(=O)=O CHQMHPLRPQMAMX-UHFFFAOYSA-L 0.000 claims description 6
- 238000007788 roughening Methods 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims description 3
- 238000005554 pickling Methods 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 122
- 229920000106 Liquid crystal polymer Polymers 0.000 description 20
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 20
- 238000010586 diagram Methods 0.000 description 8
- 238000005507 spraying Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000011810 insulating material Substances 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 239000007789 gas Substances 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000006087 Brown hydroboration reaction Methods 0.000 description 1
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 125000003178 carboxy group Chemical group [H]OC(*)=O 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000003921 oil Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/227—Drying of printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/26—Cleaning or polishing of the conductive pattern
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
The invention discloses a manufacturing method of an LCP substrate, which comprises the steps of providing an inner layer circuit board and an outer layer circuit board; etching the inner layer circuit board to release the copper layer circuit; sputtering the inner layer circuit board by plasma; carrying out microetching treatment on the sputtered inner layer circuit board; and pressing the inner layer circuit board and the outer layer circuit board after the microetching treatment to form the LCP substrate.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of circuit boards, in particular to a manufacturing method of an LCP substrate.
[ background of the invention ]
With the rapid development of 5G communication and millimeter waves, the demand of high-frequency and high-speed FPCs is increasing. At present, the high-frequency substrate mainly used in the industry is mainly an LCP (Liquid Crystal Polymer) substrate, and a pressing process is required to manufacture an LCP multilayer board, and a copper foil needs to be roughened in order to improve interlayer bonding force.
At present, the pretreatment of LCP glue-free lamination is mainly blackening or browning, and a compact passivation layer is generated on the surface of copper so as to enhance the bonding force of the inner layer of the multilayer board. However, both brown oxidation and blackening oxidation of copper generate copper oxide while increasing the roughness of the copper surface, and cause deterioration of the conductivity of copper.
Therefore, it is necessary to provide a method for fabricating an LCP substrate to solve the above problems.
[ summary of the invention ]
The invention aims to disclose a manufacturing method of an LCP substrate.
The purpose of the invention is realized by adopting the following technical scheme: a manufacturing method of an LCP substrate comprises the following steps:
providing an inner layer circuit board and an outer layer circuit board;
etching the inner layer circuit board to release the copper layer circuit;
sputtering the inner layer wiring board by plasma, the step of plasma sputtering the inner layer wiring board comprising: plasma sputtering the surface of the copper layer circuit to coarsen the surface of the copper layer circuit;
carrying out microetching treatment on the copper layer circuit of the inner layer circuit board after sputtering, wherein the microetching treatment comprises the following steps: microetching the surface of the roughened copper layer circuit to form micro roughening, wherein the microetching is to place the inner layer circuit board in a microetching device and carry out etching treatment by adopting microetching liquid, and the microetching liquid comprises sulfuric acid, sodium persulfate and copper ions; the content of the sulfuric acid is 3-5%, the content of the sodium persulfate is controlled to be 50-70 g/L, and the content of copper ions is less than 25 g/L;
and pressing the inner layer circuit board and the outer layer circuit board subjected to the micro-etching treatment to form the LCP substrate.
Preferably, the microetching treatment further includes:
washing the copper layer circuit of the inner layer circuit board subjected to the microetching with water;
and (3) carrying out acid cleaning on the inner layer circuit board copper layer circuit after water cleaning to remove oxides on the surface of the copper layer circuit.
Preferably, in the acid washing step, acid washing is performed at a temperature of 25 ℃ to 35 ℃ using a sulfuric acid solution having a concentration of 3% to 5%.
Preferably, the microetching treatment further comprises:
washing the copper layer circuit of the inner layer circuit board after the acid washing;
and carrying out anti-oxidation treatment on the copper layer circuit of the inner layer circuit board after washing so as to remove the pickling solution on the surface of the inner layer circuit board.
Preferably, the antioxidant treatment is carried out on the inner-layer circuit board at room temperature by using an antioxidant.
Preferably, the microetching treatment further comprises:
washing the inner layer circuit board subjected to the anti-oxidation treatment with water;
and drying the washed inner-layer circuit board, wherein the temperature of the drying treatment is 75-85 ℃.
Preferably, in the step of laminating the microetched inner layer circuit board and the outer layer circuit board to form the LCP substrate, the inner layer circuit board is laminated with the outer layer circuit board within 24 hours after the plasma sputtering. .
Compared with the prior art, in the application, the roughness of the copper layer circuit is improved by the cooperation of plasma sputtering and microetching treatment. The method has the advantage of improving the roughness of the copper layer circuit without introducing oxide on the copper layer circuit.
[ description of the drawings ]
Fig. 1 is a schematic flow chart of a method for manufacturing an LCP substrate provided by the present invention;
FIG. 2 is a schematic structural diagram of an inner-layer circuit board provided by the present invention;
FIG. 3 is a schematic structural diagram of the inner layer circuit board provided by the present invention after plasma sputtering;
FIG. 4 is a schematic structural diagram of the inner layer circuit board provided by the present invention after microetching;
fig. 5 is a schematic structural diagram of the inner layer circuit board laminated with the outer layer circuit board after microetching.
[ detailed description ] embodiments
The invention is further described with reference to the following figures and embodiments.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
It will also be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
Referring to fig. 1 to 5, fig. 1 is a schematic flow chart of a method for manufacturing an LCP substrate 100 provided by the present invention, fig. 2 is a schematic structural diagram of an inner layer circuit board 10 provided by the present invention, fig. 3 is a schematic structural diagram of the inner layer circuit board 10 provided by the present invention after plasma sputtering, fig. 4 is a schematic structural diagram of the inner layer circuit board 10 provided by the present invention after microetching, and fig. 5 is a schematic structural diagram of the inner layer circuit board 10 provided by the present invention after microetching.
The present invention provides a method for manufacturing LCP substrate 100, and the method for manufacturing LCP substrate 100 at least includes the following 5 steps.
S101: an inner layer wiring board 10 and an outer layer wiring board 20 are provided.
The LCP substrate 100 of the present application is a multilayer circuit board, and the LCP substrate 100 includes an inner layer circuit board 10 and an outer layer circuit board 20, and the inner layer circuit board 10 and the outer layer circuit board 20 are separately manufactured and then pressed together.
S102: the inner layer wiring board 10 is etched to release the copper layer wiring 14.
The inner layer wiring board 10 is etched to release the copper layer wiring 14. The specific steps may be to coat the copper layer with an insulating material according to the pattern of the copper layer line 14, then etch the circuit layer not coated with the insulating material, and leave the circuit layer coated with the insulating material to remove the insulating material to obtain the copper layer line 14.
S103: the inner-layer wiring board 10 is sputtered by plasma.
The copper layer circuit 14 of the inner layer circuit board 10 is sputtered by plasma to coarsen the copper layer circuit 14, and the contact area of the copper layer circuit 14 is increased. The purpose of the roughening treatment of the plasma sputtered copper layer circuit 14 is to improve the roughness of the copper layer circuit 14 to increase the bonding force of the bonding, printing, welding and other processes, the surface tension of the copper layer circuit 14 after the plasma sputtered copper layer circuit 14 is improved, and the plasma generated by the active gas can also increase the surface roughness.
The working principle of plasma sputtering is as follows: electric energy generated by the radio frequency voltage generator forms an electric field between electrodes, mixed gas entering the cavity is excited to plasma under the action of the electric field to generate free radicals and charged ions, the free radicals and the charged ions are mixed with original gas, the charged ions and molecules can do physical work through sputtering, and the plasma process can finish the effect of surface roughening through physical bombardment.
Specifically, the surface of the copper layer wiring 14 is plasma sputtered to roughen the surface of the copper layer wiring 14.
S104: the sputtered inner layer wiring board 10 is subjected to microetching treatment.
And carrying out microetching treatment on the sputtered inner layer circuit board 10, wherein the microetching treatment aims to remove an oxide layer on the surface of the copper layer circuit 14, so that the surface of the board is clean, microcosmic coarsening is formed, and the bonding force of the surface of the board is enhanced.
Specifically, the roughened surface of the copper layer wire 14 is microetched to form a microscopic roughening.
The microetching treatment further comprises the following steps:
A) the inner layer circuit board 10 is put into a microetching device and etched by using microetching liquid, wherein the microetching liquid comprises sulfuric acid, sodium persulfate and copper ions. The concentration of the sulfuric acid is controlled between 3 percent and 5 percent, the content of the sodium persulfate is controlled between 50g/L and 70g/L, the content of the copper ions is controlled to be less than 25g/L, the reaction temperature is between 28 ℃ and 32 ℃, the upward spraying pressure is controlled between 1.3Kg/cm2 and 1.7Kg/cm2, and the downward spraying pressure is controlled between 1.1Kg/cm2 and 1.5Kg/cm 2.
It is noted that the etching rate of the inner layer wiring board 10 is affected by the flow rate of the inner layer wiring board 10 in the microetching device, and in the present embodiment, the microetching rate of the inner layer wiring board 10 is 1.5 μm/min to 2.5 μm/min.
B) The microetched inner layer wiring board 10 is washed with water.
And (3) washing the microetched inner-layer circuit board 10, wherein in order to ensure the washing effect, the washing is divided into three steps, and the inner-layer circuit board 10 is washed by water for the first time, the second time and the third time.
C) The inner layer wiring board 10 after washing with water is subjected to acid washing to remove oxides on the surface of the copper layer wiring 14.
And D, placing the inner layer circuit board 10 subjected to the step B into an acid solution, and carrying out acid washing to remove oxides and dirt on the surface of the copper layer circuit 14 and improve the conductivity of the copper layer circuit 14.
The acid wash may be performed using a sulfuric acid solution. The concentration of the sulfuric acid is controlled between 3 percent and 5 percent, the reaction temperature is between 25 ℃ and 35 ℃, and the upward spraying pressure is controlled between 1.3Kg/cm2 and 1.7Kg/cm2The lower spraying pressure is controlled between 1.1Kg/cm2 and 1.5Kg/cm2。
D) The inner layer wiring board 10 after the acid washing is washed with water.
And (3) washing the inner-layer circuit board 10 after acid washing to remove residual acid solution, wherein in order to ensure the washing effect, the washing process is divided into three steps, namely, the first washing, the second washing and the third washing are carried out on the inner-layer circuit board 10.
E) The inner layer wiring board 10 after the water washing is subjected to an oxidation resistant treatment to remove the acid washing solution on the surface of the inner layer wiring board 10.
The inner layer circuit board 10 after the washing is subjected to an oxidation resistance treatment to completely remove the pickling solution remaining on the surface of the inner layer circuit board 10, so as to achieve an oxidation resistance effect.
And (4) carrying out anti-oxidation treatment by adopting an antioxidant at room temperature. The concentration of the antioxidant is controlled between 0.5 percent and 1.5 percent, and the upward spraying pressure is controlled between 1.3Kg/cm2 and 1.7Kg/cm2The lower spraying pressure is controlled to be 1.1Kg/cm2-1.5Kg/cm2。
F) The inner layer wiring board 10 after the antioxidation treatment is washed with water.
The inner layer circuit board 10 after the antioxidation treatment is washed with water, the residual antioxidant solution used in the antioxidation treatment process is removed, and in order to ensure the washing effect, the washing process is divided into three steps, and the inner layer circuit board 10 is washed with water for the first time, the second time and the third time.
G) And drying the washed inner-layer circuit board 10.
And drying the washed inner-layer circuit board 10. The drying process is to dry the moisture on the inner layer circuit board 10 so that the copper layer circuit 14 is not oxidized in the air because of the water as a medium.
The drying method can be to stand the inner layer circuit board 10 in a dry environment, and the drying method can also be to blow air to the inner layer circuit board 10 by a fan, wherein the temperature is controlled to be 75-85 ℃.
S105: and laminating the inner layer circuit board 10 and the outer layer circuit board after the microetching treatment to form the LCP substrate 100.
The inner layer wiring board 10 includes a first base layer 12 and copper layer wiring 14 disposed on opposite sides of the first base layer 12. The material of the first substrate 12 may be LCP.
The number of the outer layer circuit boards 20 can be two, and the two outer layer circuit boards 20 are respectively connected with the copper layer circuit 14 in a pressing mode. The outer layer circuit board 20 comprises a second base layer 22 and an outer circuit 24, wherein one side of the second base layer 22 far away from the outer circuit 24 is connected with the copper layer circuit 14 in a pressing mode. The material of the second substrate 22 may be LCP. The lamination of the inner layer circuit board 10 and the outer layer circuit board should be controlled to carry out lamination within 24 hours of plasma sputtering, so as to solve the problem of timeliness of plasma sputtering. Because the physical effect of plasma sputtering is to modify and coarsen the surface of the material, the protrusions on the surface after etching are increased, and the surface area is increased. If exposed to contaminated air for an extended period of time, the surface adhesion after plasma sputtering is gradually reduced due to the inclusion of dust, oil, and impurities. In addition, oxygen polar groups containing carboxyl, hydroxyl and the like are introduced by the chemical action of plasma sputtering, and the active molecules have timeliness and are easy to chemically change with other substances.
In the present application, the plasma sputtering and microetching processes cooperate to increase the roughness of the copper layer lines 14. The benefit of this approach is that it does not introduce oxide onto the copper layer trace 14 while increasing the roughness of the copper layer trace 14.
While the foregoing is directed to embodiments of the present invention, it will be understood by those skilled in the art that various changes may be made without departing from the spirit and scope of the invention.
Claims (7)
1. A method for manufacturing an LCP substrate is characterized by comprising the following steps:
providing an inner layer circuit board and an outer layer circuit board;
etching the inner layer circuit board to release the copper layer circuit;
sputtering the inner layer wiring board by plasma, the step of plasma sputtering the inner layer wiring board comprising: plasma sputtering the surface of the copper layer circuit to coarsen the surface of the copper layer circuit;
carrying out microetching treatment on the sputtered inner layer circuit board, wherein the microetching treatment comprises the following steps: microetching the surface of the roughened copper layer circuit to form micro roughening, wherein the microetching is to place the inner layer circuit board in a microetching device and carry out etching treatment by adopting microetching liquid, and the microetching liquid comprises sulfuric acid, sodium persulfate and copper ions; the content of the sulfuric acid is 3-5%, the content of the sodium persulfate is controlled to be 50-70 g/L, and the content of copper ions is less than 25 g/L;
and pressing the inner layer circuit board and the outer layer circuit board after the microetching treatment to form the LCP substrate.
2. The method for fabricating the LCP substrate of claim 1, wherein the microetching step further comprises:
washing the inner layer circuit board subjected to the microetching with water;
and carrying out acid cleaning on the inner-layer circuit board after water cleaning so as to remove oxides on the surface of the copper-layer circuit.
3. The method for manufacturing an LCP substrate as claimed in claim 2, wherein the acid-washing step is performed by using a 3% to 5% sulfuric acid solution at a temperature of 25 ℃ to 35 ℃.
4. The method of fabricating the LCP substrate of claim 2, wherein the microetching step further comprises:
washing the inner-layer circuit board after the acid washing;
and carrying out anti-oxidation treatment on the inner-layer circuit board after washing so as to remove the pickling solution on the surface of the inner-layer circuit board.
5. The method for manufacturing an LCP substrate according to claim 4, wherein the anti-oxidation treatment is an anti-oxidation treatment of the inner layer circuit board at room temperature using an antioxidant.
6. The method of fabricating the LCP substrate of claim 4, wherein the microetching step further comprises:
washing the inner layer circuit board subjected to the anti-oxidation treatment with water;
and drying the washed inner-layer circuit board, wherein the temperature of the drying treatment is 75-85 ℃.
7. The method of manufacturing an LCP substrate of claim 1, wherein in the step of laminating the microetched inner layer circuit board and outer layer circuit board to form an LCP substrate, the inner layer circuit board is laminated with the outer layer circuit board within 24 hours after plasma sputtering.
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CN202010519372.0A CN111629526B (en) | 2020-06-09 | 2020-06-09 | LCP substrate manufacturing method |
PCT/CN2020/099310 WO2021248586A1 (en) | 2020-06-09 | 2020-06-30 | Manufacturing method for lcp substrate |
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CN112391169A (en) * | 2020-11-04 | 2021-02-23 | 厦门华天华电子有限公司 | Oxidation-resistant mixed liquid and FPC (flexible printed circuit) etching method for reducing oxidation under film |
CN112770543A (en) * | 2020-12-10 | 2021-05-07 | 安捷利(番禺)电子实业有限公司 | Preparation method of FPC board |
CN112752447B (en) * | 2020-12-25 | 2022-05-17 | 惠州市大亚湾科翔科技电路板有限公司 | Manufacturing process of circuit board with embedded components |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20080093554A (en) * | 2007-04-17 | 2008-10-22 | 후포 일렉트로닉스 코포레이션 | Manufacturing method for welding pad applicable to epitaxy of light emitting diode and structure thereof |
CN103491732A (en) * | 2013-10-08 | 2014-01-01 | 华进半导体封装先导技术研发中心有限公司 | Method for manufacturing circuit board layer-adding structure |
CN110241422A (en) * | 2019-05-28 | 2019-09-17 | 电子科技大学 | A kind of multilayer high frequency printed circuit boards copper foil surface coarsening solution and its application method |
CN111200903A (en) * | 2020-03-02 | 2020-05-26 | 厦门弘信电子科技集团股份有限公司 | Method for manufacturing double-sided board of fine circuit |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020121702A1 (en) * | 2001-03-01 | 2002-09-05 | Siemens Dematic Electronics Assembly Systems, Inc. | Method and structure of in-situ wafer scale polymer stud grid array contact formation |
-
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- 2020-06-30 WO PCT/CN2020/099310 patent/WO2021248586A1/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20080093554A (en) * | 2007-04-17 | 2008-10-22 | 후포 일렉트로닉스 코포레이션 | Manufacturing method for welding pad applicable to epitaxy of light emitting diode and structure thereof |
CN103491732A (en) * | 2013-10-08 | 2014-01-01 | 华进半导体封装先导技术研发中心有限公司 | Method for manufacturing circuit board layer-adding structure |
CN110241422A (en) * | 2019-05-28 | 2019-09-17 | 电子科技大学 | A kind of multilayer high frequency printed circuit boards copper foil surface coarsening solution and its application method |
CN111200903A (en) * | 2020-03-02 | 2020-05-26 | 厦门弘信电子科技集团股份有限公司 | Method for manufacturing double-sided board of fine circuit |
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