CN111074352A - Wafer processing method and apparatus - Google Patents

Wafer processing method and apparatus Download PDF

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Publication number
CN111074352A
CN111074352A CN201911316365.4A CN201911316365A CN111074352A CN 111074352 A CN111074352 A CN 111074352A CN 201911316365 A CN201911316365 A CN 201911316365A CN 111074352 A CN111074352 A CN 111074352A
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wafer
electrolytic
copper
copper plate
insulating film
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董博轩
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Xian Eswin Silicon Wafer Technology Co Ltd
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Xian Eswin Silicon Wafer Technology Co Ltd
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B35/00—Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N1/00—Sampling; Preparing specimens for investigation
    • G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
    • G01N1/32—Polishing; Etching
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N1/00—Sampling; Preparing specimens for investigation
    • G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
    • G01N1/34—Purifying; Cleaning
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N1/00—Sampling; Preparing specimens for investigation
    • G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
    • G01N1/44—Sample treatment involving radiation, e.g. heat
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/416—Systems
    • G01N27/42—Measuring deposition or liberation of materials from an electrolyte; Coulometry, i.e. measuring coulomb-equivalent of material in an electrolyte

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  • Molecular Biology (AREA)
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  • Biomedical Technology (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

The invention provides a wafer processing method and a wafer processing device, and belongs to the technical field of semiconductors. The wafer processing method comprises the following steps: placing the wafer with the insulating film formed on the surface in an electrolyte as an electrolytic cathode, and removing part of the insulating film on the surface of the wafer; placing the copper plate in the electrolyte to be used as an electrolytic anode; and applying pulse electric signals to the electrolytic anode and the electrolytic cathode, reducing copper ions to copper at the COP defect position of the wafer, and detecting the COP defect on the surface of the wafer according to the reduced copper. The method can accurately and efficiently determine the COP defect.

Description

Wafer processing method and apparatus
Technical Field
The present invention relates to the field of semiconductor technology, and more particularly, to a wafer processing method and apparatus.
Background
With the continuous development and upgrade of the semiconductor industry, the development of czochralski silicon single crystal towards large size has become a trend in order to reduce the manufacturing cost, and the size of the wafer is developed from diameter 150mm, diameter 200mm, diameter 300mm to diameter 450 mm; the integrated circuit is used as an important branch of a semiconductor, the characteristic dimension of the integrated circuit is continuously reduced along with the rapid development of the integrated circuit, the characteristic line width is reduced from the original 45nm to 32nm, at present, the characteristic line width of a component adopted in the microelectronic field is developing towards the process below 10nm, and higher requirements are put forward on a monocrystalline silicon base material.
In a silicon single Crystal, growth defects include COP (Crystal Originated Particle) defects, FPD (flow pattern defects), and LSTD (Laser Scattering tomography defects). Nowadays, the number of void type native microdefects, i.e., COP defects, existing in large-diameter czochralski silicon has become a key factor affecting the yield of integrated circuits. Studies on the different defect generation mechanisms show that they are generated during the solidification process, from the melting point of silicon at 1200 c to the cooling process, their density and distribution are strongly dependent on the crystal growth environment, and monitoring the density and distribution of COPs in a silicon wafer is crucial to find the optimal single crystal process conditions.
Disclosure of Invention
The invention aims to provide a wafer processing method and a wafer processing device, which can accurately and efficiently determine COP defects.
To solve the above technical problem, embodiments of the present invention provide the following technical solutions:
in one aspect, an embodiment of the present invention provides a wafer processing method, including:
placing the wafer with the insulating film formed on the surface in an electrolyte as an electrolytic cathode, and removing part of the insulating film on the surface of the wafer;
placing the copper plate in the electrolyte to be used as an electrolytic anode;
and applying pulse electric signals to the electrolytic anode and the electrolytic cathode, reducing copper ions to copper at the COP defect position of the wafer, and detecting the COP defect on the surface of the wafer according to the reduced copper.
Optionally, before the wafer with the insulating film formed on the surface is placed in the electrolyte as an electrolytic cathode, the method further comprises
Carrying out heat treatment on the surface of the wafer, and preparing an oxide film on the surface of the wafer as the insulating film;
and removing the oxide film on the back surface of the wafer to enable the wafer to be conductive.
Optionally, the thickness of the oxide film is 200 to 500 angstroms.
Optionally, the temperature of the heat treatment is 950-1050 ℃.
Optionally, the removing the oxide film on the back surface of the wafer includes:
and placing the wafer in HF acid with the concentration of 20-30%, and removing the oxide film on the back of the wafer through the HF acid.
Optionally, after the removing the oxide film on the back surface of the wafer by using the HF acid, the method further includes:
and washing the HF acid remained on the surface of the wafer in ultrapure water.
Optionally, before the placing the copper plate in the electrolyte as an electrolytic anode, the method further comprises:
the copper plate is placed in HNO3And cleaning in the solution to remove impurities on the surface of the copper plate.
Optionally, said copper plate is in HNO3After the washing in solution, the method further comprises:
HNO remaining on the surface of the copper plate in ultrapure water3And (5) washing the substrate.
Optionally, the HNO to be remained on the surface of the copper plate in the ultrapure water3After rinsing, the method further comprises:
the copper plate was blow dried with nitrogen.
Optionally, the duty cycle of the pulsed electrical signal is 5-15%.
The embodiment of the invention also provides a wafer processing device which comprises a power supply, an electrolytic anode, an electrolytic cathode, an electrolytic tank and a detection module, wherein the electrolytic tank is filled with electrolyte, the electrolytic anode and the electrolytic cathode respectively extend into the electrolyte, the electrolytic cathode is a wafer with an insulating film formed on the surface, part of the insulating film on the surface of the wafer is removed, the electrolytic anode is a copper plate, the electrolytic anode and the electrolytic cathode are respectively and electrically connected with the power supply, the power supply is used for applying a pulse electrical signal to the electrolytic anode and the electrolytic cathode, and the detection module is used for detecting COP defects on the surface of the wafer according to copper reduced from the surface of the wafer.
The embodiment of the invention has the following beneficial effects:
in the scheme, the pulse electric signals are applied to the electrolytic anode and the electrolytic cathode, so that the power consumption in the copper decoration process is reduced, the adsorption capacity of the surface of the electrolytic cathode is improved, the concentration polarization phenomenon in the electrochemical reaction process is reduced, the deposition rate of copper ions is increased, the efficiency of a copper decoration method is improved, the number of COP defects on the surface of a wafer can be better determined, and the COP defects of the wafer can be accurately and efficiently determined.
Drawings
FIG. 1 is a schematic flow chart illustrating a wafer processing method according to an embodiment of the invention;
FIG. 2 is a schematic structural diagram of a wafer processing apparatus according to an embodiment of the present invention;
FIG. 3 is a diagram of a pulsed electrical signal according to an embodiment of the present invention.
The reference numerals are explained below:
1 electrolytic cell
2 electrolyte solution
3 electrolytic cathode
4 insulating film
5 electrolytic anode
6 pulse power supply
Detailed Description
In order to make the technical problems, technical solutions and advantages to be solved by the embodiments of the present invention clearer, the following detailed description will be given with reference to the accompanying drawings and specific embodiments.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention, are within the scope of the invention.
The COP defect can be observed by a copper decoration method in which methanol is used as an electrolytic solution, a Cu (copper) plate is used as an electrolytic anode, a wafer having an oxide film formed on the surface thereof is used as an electrolytic cathode, and the COP defect is detected by applying an external voltage to the wafer after the oxide film having a predetermined thickness is formed on the wafer surface by utilizing a phenomenon that the oxide film becomes uneven at a portion where the COP defect exists when an insulating film (for example, an oxide film) is formed on the wafer surface, thereby causing Cu ions to precipitate at the same time as the oxide film is broken at the defective portion on the wafer surface, and observing the precipitated Cu by a microscope.
The power supply used by the existing copper decoration method is a direct current power supply, so that the power consumption is high, concentration polarization is easy to generate, and the effect of the copper decoration method is influenced; in addition, in the process of the copper decoration method, the copper precipitation rate is slow, and the efficiency is low.
Embodiments of the present invention provide a wafer processing method and apparatus, which can accurately and efficiently determine COP defects of a wafer.
An embodiment of the present invention provides a wafer processing method, as shown in fig. 1, including:
step 101: placing the wafer with the insulating film formed on the surface in an electrolyte as an electrolytic cathode, and removing part of the insulating film on the surface of the wafer;
step 102: placing the copper plate in the electrolyte to be used as an electrolytic anode;
step 103: and applying pulse electric signals to the electrolytic anode and the electrolytic cathode, reducing copper ions to copper at the COP defect position of the wafer, and detecting the COP defect on the surface of the wafer according to the reduced copper.
In the embodiment, the pulse electrical signals are applied to the electrolytic anode and the electrolytic cathode, so that the power consumption in the copper decoration process is reduced, the adsorption capacity of the surface of the electrolytic cathode is improved, the concentration polarization phenomenon in the electrochemical reaction process is reduced, the deposition rate of copper ions is increased, the efficiency of the copper decoration method is improved, the number of COP defects on the surface of a wafer can be determined better, and the COP defects of the wafer can be determined accurately and efficiently.
The insulating film on the surface of the wafer may be an oxide film, and the insulating film on the surface portion of the wafer must be removed so that the wafer can have conductivity to serve as an electrolytic cathode, and specifically, the insulating film on the back surface of the wafer can be removed.
In an exemplary embodiment, before the placing the wafer with the insulating film formed on the surface thereof in the electrolyte solution as an electrolytic cathode, the method further includes:
carrying out heat treatment on the surface of the wafer, and preparing an oxide film on the surface of the wafer as the insulating film;
and removing the oxide film on the back surface of the wafer to enable the wafer to be conductive.
The accuracy of COP defect detection can be influenced by too large or too small thickness of the oxide film, and the thickness of the oxide film can be designed to be 200-500 angstroms, so that the accuracy of COP defect detection can be ensured.
Wherein the temperature of the heat treatment can be 950-1050 ℃.
In an exemplary embodiment, the removing the oxide film on the back surface of the wafer includes:
and placing the wafer in HF acid with the concentration of 20-30%, and removing the oxide film on the back of the wafer through the HF acid.
Of course, the technical solution of the present invention is not limited to the above-mentioned method for removing the oxide film on the back surface of the wafer, and other types of acids or removal methods may be used for removing the oxide film on the back surface of the wafer, but the HF acid can be used for quickly and effectively removing the oxide film on the back surface of the wafer.
In order to avoid the HF acid remaining on the surface of the wafer from affecting subsequent processes, after the oxide film on the back surface of the wafer is removed by the HF acid, the method further includes:
and washing the HF acid remained on the surface of the wafer in ultrapure water.
Further, after the HF acid remained on the surface of the wafer is washed clean, the wafer can be dried by adopting nitrogen.
In order to avoid impurities on the surface of the copper plate to influence the electrolytic process, before the copper plate is placed in the electrolyte to be used as an electrolytic anode, the method further comprises the following steps:
the copper plate is placed in HNO3And cleaning in the solution to remove impurities on the surface of the copper plate.
Of course, the technical solution of the present invention is not limited to the above-mentioned method for cleaning the copper plate, and other methods may be used for cleaning the copper plate, but HNO is used3The solution can quickly and effectively clean the copper plate.
To avoid HNO residue on the wafer surface3Affecting the subsequent process, said copper plate is applied on HNO3After the washing in solution, the method further comprises:
HNO remaining on the surface of the copper plate in ultrapure water3And (5) washing the substrate.
Further, HNO to be remained on the surface of the copper plate in ultrapure water3After rinsing, the method further comprises:
the copper plate was blow dried with nitrogen.
The wafer processing method of the present invention will be further described with reference to the accompanying drawings and specific embodiments, wherein the wafer processing method of the present embodiment includes the following steps:
step 1, carrying out heat treatment on the surface of a wafer at 950-1050 ℃, and preparing an oxide film with the thickness of 200-500 angstroms on the surface of the wafer;
step 2, placing the wafer in HF acid with the concentration of 20-30%, corroding and removing the oxide film on the back of the wafer through the HF acid to enable the wafer to have conductivity, then washing the HF acid remained on the surface of the wafer in UPW (ultra pure water), and using N2Drying the wafer;
step 3, selecting cleanCu plate in HNO3Cleaning in the solution to remove impurities on the surface of the Cu plate, then washing in UPW, and utilizing UPW to remove HNO remained on the surface of the Cu plate3Washing clean with N2Drying the Cu plate;
step 4, as shown in fig. 2, a Cu plate is used as an electrolytic anode 5, a wafer is used as an electrolytic cathode 3, a methanol solution is used as an electrolyte 2, the electrolytic anode 5 and the electrolytic cathode 3 are inserted into the electrolyte 2, and in order to facilitate the precipitation of copper ions on the surface of the wafer, the side of the wafer provided with an oxide film faces the copper plate; applying a pulsed electrical signal, Cu, to the electrolytic anode 5 and to the electrolytic cathode 3 by means of a pulsed power supply 62+The ions are reduced at the COP defects, which can be determined by observing the amount of copper reduced.
In the present embodiment, the electric signals applied to the electrolytic anode 5 and the electrolytic cathode 3 are changed to be the direct current electric signals, as shown in fig. 3, Ton is the pulse current on-time, Toff is the pulse current off-time, so as to derive two parameters in the pulse electric signals, i.e. the pulse duty ratio D ═ Ton/(Ton + Toff) and the frequency f ═ 1/(Ton + Toff), and Ia is the average applied current density, and Ip is the peak current density, according to the formula:
Ip＝Ia/D
it can be seen that the peak current density in the pulse on period Ton is several tens of times that of the dc current, and the high current density enables Cu2+The deposition rate is greatly improved; in addition, the proper pulse current turn-off time can make the discharge ions near the electrolytic cathode restore to the initial concentration again, thereby eliminating concentration polarization and promoting the stable deposition.
Specifically, the duty ratio of the pulse electric signal may be 5-15%, preferably 10%, which may greatly improve Cu2+The reduction rate of the ions.
The embodiment of the invention also provides a wafer processing device, as shown in fig. 2, which includes a pulse power supply 6, an electrolytic anode 5, an electrolytic cathode 3, an electrolytic tank 1 and a detection module (not shown), wherein the electrolytic tank 1 contains an electrolyte 2, the electrolytic anode 5 and the electrolytic cathode 3 respectively extend into the electrolyte 2, the electrolytic cathode 3 is a wafer with an insulating film formed on the surface, part of the insulating film on the surface of the wafer is removed, the electrolytic anode 5 is a copper plate, the electrolytic anode 5 and the electrolytic cathode 3 are respectively electrically connected with the pulse power supply 6, and the detection module is used for detecting COP defects on the surface of the wafer according to copper reduced from the surface of the wafer.
After the pulse power supply 6 applies pulse electric signals to the electrolytic anode 5 and the electrolytic cathode 3, copper ions (Cu) exist in the electrolyte2+) The detection module can detect the COP defects on the surface of the wafer by detecting the copper reduced on the surface of the wafer, and particularly, the detection module can adopt a microscope.
In the embodiment, the pulse electrical signals are applied to the electrolytic anode and the electrolytic cathode, so that the power consumption in the copper decoration process is reduced, the adsorption capacity of the surface of the electrolytic cathode is improved, the concentration polarization phenomenon in the electrochemical reaction process is reduced, the deposition rate of copper ions is increased, the efficiency of the copper decoration method is improved, the number of COP defects on the surface of a wafer can be determined better, and the COP defects of the wafer can be determined accurately and efficiently.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (11)

1. A method of wafer processing, comprising:
placing the wafer with the insulating film formed on the surface in an electrolyte as an electrolytic cathode, and removing part of the insulating film on the surface of the wafer;
placing the copper plate in the electrolyte to be used as an electrolytic anode;
and applying pulse electric signals to the electrolytic anode and the electrolytic cathode, reducing copper ions to copper at the COP defect position of the wafer, and detecting the COP defect on the surface of the wafer according to the reduced copper.
2. The method as claimed in claim 1, wherein before the step of placing the wafer having the insulating film formed on the surface thereof in an electrolytic solution as an electrolytic cathode, the method further comprises
Carrying out heat treatment on the surface of the wafer, and preparing an oxide film on the surface of the wafer as the insulating film;
and removing the oxide film on the back surface of the wafer to enable the wafer to be conductive.
3. The wafer processing method as claimed in claim 2, wherein the thickness of the oxide film is 200 to 500 angstroms.
4. The method as claimed in claim 2, wherein the heat treatment temperature is 950 to 1050 ℃.
5. The wafer processing method as claimed in claim 2, wherein the removing the oxide film on the back surface of the wafer comprises:
and placing the wafer in HF acid with the concentration of 20-30%, and removing the oxide film on the back of the wafer through the HF acid.
6. The wafer processing method according to claim 5, wherein after the removing of the oxide film on the back surface of the wafer by the HF acid, the method further comprises:
and washing the HF acid remained on the surface of the wafer in ultrapure water.
7. The wafer processing method as claimed in claim 1, wherein before the placing the copper plate in the electrolyte as an electrolytic anode, the method further comprises:
the copper plate is placed in HNO3And cleaning in the solution to remove impurities on the surface of the copper plate.
8. The wafer processing method as claimed in claim 7, wherein the copper plate is subjected to HNO3After the washing in solution, the method further comprises:
HNO remaining on the surface of the copper plate in ultrapure water3And (5) washing the substrate.
9. The wafer processing method according to claim 8, wherein HNO remaining on the surface of the copper plate in the ultrapure water is3After rinsing, the method further comprises:
the copper plate was blow dried with nitrogen.
10. The wafer processing method as claimed in any one of claims 1 to 9, wherein the duty cycle of the pulsed electrical signal is 5-15%.
11. The wafer processing device is characterized by comprising a power supply, an electrolytic anode, an electrolytic cathode, an electrolytic tank and a detection module, wherein electrolyte is contained in the electrolytic tank, the electrolytic anode and the electrolytic cathode respectively extend into the electrolyte, the electrolytic cathode is a wafer with an insulating film formed on the surface, part of the insulating film on the surface of the wafer is removed, the electrolytic anode is a copper plate, the electrolytic anode and the electrolytic cathode are respectively and electrically connected with the power supply, the power supply is used for applying a pulse electrical signal to the electrolytic anode and the electrolytic cathode, and the detection module is used for detecting COP defects on the surface of the wafer according to copper reduced from the surface of the wafer.
CN201911316365.4A 2019-12-19 2019-12-19 Wafer processing method and apparatus Pending CN111074352A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112701072A (en) * 2021-03-25 2021-04-23 西安奕斯伟硅片技术有限公司 Wafer processing apparatus and wafer defect evaluation method

Citations (4)

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Publication number Priority date Publication date Assignee Title
TW341715B (en) * 1997-02-06 1998-10-01 Samsung Electronics Co Ltd Methods of analyzing wafer defects
JPH11195685A (en) * 1997-12-26 1999-07-21 Sumitomo Metal Ind Ltd Pattern defect inspection system and method of inspecting pattern defect
JP2002184830A (en) * 2000-12-11 2002-06-28 Hitachi Ltd Method of detecting defect in insulating film and device thereof
CN1406292A (en) * 2000-12-28 2003-03-26 信越半导体株式会社 Silicon single crystal wafer and method for producing silicon single crystal

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW341715B (en) * 1997-02-06 1998-10-01 Samsung Electronics Co Ltd Methods of analyzing wafer defects
JPH11195685A (en) * 1997-12-26 1999-07-21 Sumitomo Metal Ind Ltd Pattern defect inspection system and method of inspecting pattern defect
JP2002184830A (en) * 2000-12-11 2002-06-28 Hitachi Ltd Method of detecting defect in insulating film and device thereof
CN1406292A (en) * 2000-12-28 2003-03-26 信越半导体株式会社 Silicon single crystal wafer and method for producing silicon single crystal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112701072A (en) * 2021-03-25 2021-04-23 西安奕斯伟硅片技术有限公司 Wafer processing apparatus and wafer defect evaluation method
CN112701072B (en) * 2021-03-25 2021-10-22 西安奕斯伟硅片技术有限公司 Wafer processing apparatus and wafer defect evaluation method

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Application publication date: 20200428

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