CN110990229B - System information acquisition method and device - Google Patents

System information acquisition method and device Download PDF

Info

Publication number
CN110990229B
CN110990229B CN201911305477.XA CN201911305477A CN110990229B CN 110990229 B CN110990229 B CN 110990229B CN 201911305477 A CN201911305477 A CN 201911305477A CN 110990229 B CN110990229 B CN 110990229B
Authority
CN
China
Prior art keywords
variable
processing function
nmi
packet receiving
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201911305477.XA
Other languages
Chinese (zh)
Other versions
CN110990229A (en
Inventor
范鸿雷
李沛盈
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Topsec Technology Co Ltd
Beijing Topsec Network Security Technology Co Ltd
Beijing Topsec Software Co Ltd
Original Assignee
Beijing Topsec Technology Co Ltd
Beijing Topsec Network Security Technology Co Ltd
Beijing Topsec Software Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Topsec Technology Co Ltd, Beijing Topsec Network Security Technology Co Ltd, Beijing Topsec Software Co Ltd filed Critical Beijing Topsec Technology Co Ltd
Priority to CN201911305477.XA priority Critical patent/CN110990229B/en
Publication of CN110990229A publication Critical patent/CN110990229A/en
Application granted granted Critical
Publication of CN110990229B publication Critical patent/CN110990229B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The application provides a system information acquisition method and device. The method comprises the following steps: starting to count by an unmasked interrupt NMI timer; after the non-maskable interrupt NMI is triggered according to a preset period, counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate. According to the embodiment of the application, the NMI terminal processing function and the system soft interrupt processing function are utilized to periodically acquire the system information, and the NMI terminal processing function and the system soft interrupt processing function are not affected by faults of an operating system, so that the system information can be accurately acquired.

Description

System information acquisition method and device
Technical Field
The present application relates to the field of computer technologies, and in particular, to a system information acquisition method and apparatus.
Background
Network attacks are more and more developed and applied to actual environments, and due to the fact that the current application is rich and various and the popularization of networks, information visualization requirements on the network security devices are higher and higher, but due to the fact that information collection of the network devices is complex and software logic errors of a system possibly exist, real-time performance and accuracy of data collection are generally difficult to guarantee.
In the prior art, system information is periodically read by using a system process or a thread, but when a process scheduling error, a memory error or a thread deadlock and other systematic errors occur in an operating system, the problem that the system cannot record the system information is caused.
Disclosure of Invention
An embodiment of the present invention is to provide a system information acquisition method and apparatus, so as to solve the problem in the prior art that when a process scheduling error, a memory error or a thread deadlock occurs in an operating system, a system cannot record system information.
In a first aspect, an embodiment of the present application provides a system information acquisition method, including: starting to count by an unmasked interrupt NMI timer; after the non-maskable interrupt NMI is triggered according to a preset period, counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate.
According to the embodiment of the application, the NMI terminal processing function and the system soft interrupt processing function are utilized to periodically acquire the system information, and the NMI terminal processing function and the system soft interrupt processing function are not affected by faults of an operating system, so that the system information can be accurately acquired.
Further, before reading the system information by the NMI interrupt handling function and the system soft interrupt handling function, the method further comprises: when the security gateway is started, initializing a packet receiving start variable, a packet receiving end variable, a CPU statistical variable and a memory statistical variable, and registering the NMI interrupt processing function and the system soft interrupt processing function.
According to the embodiment of the application, the related variables are initialized and the functions are registered, so that preparation work is carried out for acquisition of subsequent system information, and accurate system information can be obtained.
Further, the statistics of the system information in one period through the NMI interrupt processing function and the system soft interrupt processing function includes: the read hardware network card data are assigned to a packet receiving end variable through an NMI interrupt processing function, the CPU utilization rate is assigned to a CPU statistical variable, and the memory utilization rate is assigned to a memory statistical variable; acquiring a packet receiving start variable through a system soft interrupt processing function, and acquiring network card packet receiving and transmitting data according to the packet receiving start variable and the packet receiving end variable; and obtaining the CPU utilization rate according to the CPU statistical variable and obtaining the memory utilization rate according to the memory statistical variable.
According to the embodiment of the application, the related information of the system is firstly acquired from the CPU through the NMI interrupt processing function, and then the final system information is obtained through the system soft interrupt processing function, so that the CPU is prevented from being brought with larger calculation pressure.
Further, the obtaining the network card receiving and transmitting packet data according to the receiving start variable and the receiving end variable includes: and taking the difference value of the packet receiving start variable and the packet receiving end variable as the packet receiving and transmitting data of the network card. And obtaining the network card transmitting and receiving packet data in one period through difference value calculation.
Further, after counting the system information in one period by the NMI interrupt handling function and the system soft interrupt handling function, the method further includes: and assigning the packet receiving end variable to the packet receiving start variable, and initializing the packet receiving end variable, the CPU statistical variable and the memory statistical variable.
The embodiment of the application initializes the packet receiving start variable, the packet receiving end face changing, the CPU statistical variable and the memory statistical variable so as to receive the system information of the next period.
In a second aspect, an embodiment of the present application provides a system information acquisition device, including:
the timing module is used for starting timing through the non-maskable interrupt NMI timer; the information statistics module is used for counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function after the non-maskable interrupt NMI is triggered according to a preset period; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate.
Further, the apparatus further comprises:
and the initialization module is used for initializing a packet receiving start variable, a packet receiving end variable, a CPU statistical variable and a memory statistical variable when the security gateway is started, and registering the NMI interrupt processing function and the system soft interrupt processing function.
In a third aspect, an embodiment of the present application provides a CPU, including the system information acquisition device described in the second aspect.
In a fourth aspect, embodiments of the present application provide an electronic device, including: a processor, a memory, and a bus, wherein,
the processor and the memory complete communication with each other through the bus;
the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of the first aspect.
In a fifth aspect, embodiments of the present application provide a non-transitory computer readable storage medium comprising:
the non-transitory computer-readable storage medium stores computer instructions that cause the computer to perform the method of the first aspect.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments of the application. The objectives and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a system information acquisition method provided in an embodiment of the present application;
fig. 2 is a schematic flow chart of a system information acquisition method provided in an embodiment of the present application;
fig. 3 is a schematic structural diagram of a device according to an embodiment of the present application;
fig. 4 is a schematic diagram of an entity structure of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
An unmasked interrupt (Non Maskable Interrupt, NMI for short) belongs to one type of interrupt request. The external non-maskable interrupt request informs the CPU via a special CPU pin NMI that a catastrophic event has occurred, such as a power loss, bus parity error, etc. The internal non-maskable interrupt requests are generated spontaneously within the CPU, such as memory read-write errors, overflow interrupts, divide error interrupts, and the like. The NMI on-line interrupt request is unmasked (neither disabled) and is immediately latched by the CPU. NMI is therefore edge triggered, requiring no level triggering. NMI also has a higher priority than INTR. The type of non-maskable interrupt is designated 2 and no interrupt type code has to be provided by the interrupt source when the CPU responds to NMI, so NMI response also does not require execution of bus cycle INTA.
Therefore, in order to solve the problem that when a systematic error such as a process scheduling error, a memory error or a thread deadlock occurs in an operating system, the system cannot record system information, the embodiment of the application also uses the non-shielding interrupt characteristic provided by the cpu to realize periodic reading of the system information, wherein the system information comprises the number of network card transceiving packets, the cpu utilization rate and the memory occupation. Because the unmasked interruption is not affected by the logic error of the system, the information can be accurately and periodically acquired, and the system information can be accurately acquired by taking the difference value.
Fig. 1 is a schematic flow chart of a system information acquisition method provided in an embodiment of the present application, as shown in fig. 1, including:
step 101: starting to count by an unmasked interrupt NMI timer;
step 102: after the non-maskable interrupt NMI is triggered according to a preset period, counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate.
The main body for executing the method is a collecting device, and the collecting device can be a Central Processing Unit (CPU) or a functional module running on the CPU. The preset period may be a default value, or may be set by itself according to actual situations, for example: may be 2 seconds, 4 seconds, etc. Because the NMI interrupt processing function can only process short tasks, system information is collected through the system soft interrupt function and the NMI interrupt processing function together. It should be noted that, the NMI interrupt processing function and the system interrupt processing function are both custom functions, so as to collect system information.
In addition, whether the triggered period of the NMI arrives or not can be judged through an NMI timer, when the system starts to start or after statistics of the information of the previous system is completed, the NMI timer starts to count, and when the preset period is reached, NMI interruption is triggered.
It can be understood that the network card packet data indicates the number of network card packets from the end of the last NMI interrupt to the triggered period of the current NMI interrupt, i.e. within a preset period. CPU usage represents the CPU occupancy when an NMI interrupt is triggered, which may be expressed in terms of a percentage. Memory usage represents the condition that memory is occupied when an NMI interrupt is triggered, and may also be expressed in terms of percentage. And, the system information may also include other parameters such as: the number of threads, the number of processes, etc., so that specific parameters in the system information may be set according to actual situations, which is not specifically limited in the embodiment of the present application.
According to the embodiment of the application, the NMI terminal processing function and the system soft interrupt processing function are utilized to periodically acquire the system information, and the NMI terminal processing function and the system soft interrupt processing function are not affected by faults of an operating system, so that the system information can be accurately acquired.
On the basis of the above embodiment, before the system information is read by the NMI interrupt handling function and the system soft interrupt handling function, the method further includes:
when the security gateway is started, initializing a packet receiving start variable, a packet receiving end variable, a CPU statistical variable and a memory statistical variable, and registering the NMI interrupt processing function and the system soft interrupt processing function.
In a specific implementation process, a packet receiving start variable may be denoted by a packetrcv_begin, a packet receiving end variable may be denoted by a packetrcv_end, a CPU statistic variable may be denoted by a cpu_stat, and a memory statistic variable may be denoted by a mem_stat. When the security gateway is started, the values of the four variables are initialized to 0, and data stored in the packetrcv_begin are data of a receiving and transmitting packet of the hardware network card from the time when the security gateway is started to the time when the NMI interrupt is triggered last time in the system operation process and after the NMI interrupt is triggered once; the data stored in the packetrcv_end is the data of the receiving and transmitting packet of the hardware network card in the period from the starting of the calculation of the security gateway to the triggering of the NMI interruption; the data stored in cpu_stat is the usage rate of CPU when the interrupt is triggered, and the data stored in mem_stat is the usage rate of memory when the interrupt is triggered.
Both the NMI interrupt handling function and the system soft interrupt handling function need to register before being called, and after the registration is successful, the NMI interrupt handling function and the system soft interrupt handling function can be called in subsequent operation. And the NMI interrupt processing function is used for acquiring the data of the hardware network card, the CPU utilization rate and the memory utilization rate, assigning the data of the hardware network card to a packetrcv_end variable, assigning the CPU utilization rate to a cpu_stat variable and assigning the memory utilization rate to a mem_stat variable. The system soft interrupt processing function is used for calculating according to the variables to obtain system information, namely, the system soft interrupt processing function obtains network card receiving and transmitting packet data according to the packet receiving starting variable and the packet receiving ending variable; obtaining CPU utilization rate according to the CPU statistical variable and obtaining memory utilization rate according to the memory statistical variable.
It should be noted that, in obtaining the network card receiving and transmitting packet data according to the receiving start variable and the receiving end variable, specifically, the receiving end variable may be subtracted from the receiving end variable, and the obtained difference is the network card receiving and transmitting packet data.
The NMI interrupt processing function does not occupy CPU for a long time, and after the data is acquired, the system soft interrupt processing function performs statistics to obtain the final data. Thus, the operating pressure of the CPU can be reduced.
On the basis of the above embodiment, after counting the system information in one period by the NMI interrupt handling function and the system soft interrupt handling function, the method further includes:
and assigning the packet receiving end variable to the packet receiving start variable, and initializing the packet receiving end variable, the CPU statistical variable and the memory statistical variable.
In a specific implementation process, after system information acquisition of one NMI interrupt is completed, a packet receiving end variable is required to be assigned to a packet receiving start variable, and then the values of the packet receiving end variable, a CPU statistics variable and a memory statistics variable are initialized to 0, and the period of the next NMI terminal is waited for.
The system information acquisition method provided by the embodiment of the application is described more clearly and completely below.
Fig. 2 is a schematic flow chart of a system information acquisition method provided in an embodiment of the present application, as shown in fig. 2, where the method includes:
step 201: initializing variables and registering functions; when the security gateway is started, initializing a packet receiving start variable, namely, packetrcv_begin, a packet receiving end variable, namely, packetrcv_end, a CPU statistical variable, namely, cpu_stat and a memory statistical variable, namely, mem_stat, and setting the four variables to 0, and registering an NMI interrupt processing function do_nmi and a system soft interrupt processing function nmi_stat;
step 202: an NMI interrupt is triggered; when the NMI interrupt is triggered, since the NMI is an unmasked interrupt provided by the CPU and is triggered periodically, the NMI interrupt processing function do_nmi is called even if the operating system has a software logic error;
step 203: assigning a value to the variable; reading data of the hardware network card through the called do_nmi, assigning the data to a variable packetrcv_end, assigning CPU utilization rate to CPU_stat, and assigning memory utilization rate to mem_stat;
step 204: counting variables; after the variable assignment is completed, triggering a system soft interrupt processing function nmi_stat, taking the difference value of a packetrcv_begin variable and a packetrcv_end variable as network card receiving and transmitting packet data, recording the data in statistics of a system network card receiving and transmitting packet, taking the value corresponding to the cpu_stat variable as CPU utilization rate, recording the data in CPU utilization rate statistics, taking the value corresponding to the mem_stat variable as memory utilization rate, recording the data in memory utilization rate statistics, and assigning the packetrcv_end to the packetrcv_begin variable;
step 205: initializing a variable; the three variables, packetrcv_end, cpu_stat and mem_stat, are set to 0 and wait for the next NMI interrupt to be triggered, step 202 is performed.
According to the embodiment of the application, the NMI terminal processing function and the system soft interrupt processing function are utilized to periodically acquire the system information, and the NMI terminal processing function and the system soft interrupt processing function are not affected by faults of an operating system, so that the system information can be accurately acquired.
Fig. 3 is a schematic structural diagram of an apparatus provided in an embodiment of the present application, where the apparatus may be a module, a program segment, or a code on an electronic device. It should be understood that the apparatus corresponds to the embodiment of the method of fig. 1 described above, and is capable of performing the steps involved in the embodiment of the method of fig. 1, and specific functions of the apparatus may be referred to in the foregoing description, and detailed descriptions thereof are omitted herein as appropriate to avoid redundancy. The device comprises: a timing module 301 and an information statistics module 302; wherein:
the timing module 301 is configured to start timing by using the non-maskable interrupt NMI timer;
the information statistics module 302 is configured to, after the non-maskable interrupt NMI is triggered according to a preset period, count system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate.
On the basis of the above embodiment, the apparatus further includes:
and the initialization module is used for initializing a packet receiving start variable, a packet receiving end variable, a CPU statistical variable and a memory statistical variable when the security gateway is started, and registering the NMI interrupt processing function and the system soft interrupt processing function.
Based on the above embodiment, the information statistics module 302 is specifically configured to:
the read hardware network card data are assigned to a packet receiving end variable through an NMI interrupt processing function, the CPU utilization rate is assigned to a CPU statistical variable, and the memory utilization rate is assigned to a memory statistical variable;
acquiring a packet receiving start variable through a system soft interrupt processing function, and acquiring network card packet receiving and transmitting data according to the packet receiving start variable and the packet receiving end variable; and obtaining the CPU utilization rate according to the CPU statistical variable and obtaining the memory utilization rate according to the memory statistical variable.
Based on the above embodiment, the information statistics module 302 is specifically configured to:
and taking the difference value of the packet receiving start variable and the packet receiving end variable as the packet receiving and transmitting data of the network card.
On the basis of the above embodiment, the apparatus further includes a variable initializing module configured to:
and assigning the packet receiving end variable to the packet receiving start variable, and initializing the packet receiving end variable, the CPU statistical variable and the memory statistical variable.
In summary, according to the embodiment of the present application, the NMI terminal processing function and the system soft interrupt processing function are used to periodically collect the system information, and the two functions are not affected by the operating system fault, so that the system information can be accurately obtained.
Fig. 4 is a schematic diagram of an entity structure of an electronic device according to an embodiment of the present application, as shown in fig. 4, where the electronic device includes: a processor (processor) 401, a memory (memory) 402, and a bus 403; wherein, the liquid crystal display device comprises a liquid crystal display device,
the processor 401 and the memory 402 complete communication with each other through the bus 403;
the processor 401 is configured to call the program instructions in the memory 402 to perform the methods provided in the above method embodiments, for example, including: starting to count by an unmasked interrupt NMI timer; after the NMI is triggered according to a preset period, counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate.
The processor 401 may be an integrated circuit chip having signal processing capabilities. The processor 401 may be a general-purpose processor including a central processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), etc.; but may also be a Digital Signal Processor (DSP), application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components. Which may implement or perform the various methods, steps, and logical blocks disclosed in embodiments of the present application. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
Memory 402 may include, but is not limited to, random access Memory (Random Access Memory, RAM), read Only Memory (ROM), programmable Read Only Memory (Programmable Read-Only Memory, PROM), erasable Read Only Memory (Erasable Programmable Read-Only Memory, EPROM), electrically erasable Read Only Memory (Electric Erasable Programmable Read-Only Memory, EEPROM), and the like.
The present embodiment discloses a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, are capable of performing the methods provided by the above-described method embodiments, for example comprising: starting to count by an unmasked interrupt NMI timer; after the NMI is triggered according to a preset period, counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate.
The present embodiment provides a non-transitory computer-readable storage medium storing computer instructions that cause a computer to perform the methods provided by the above-described method embodiments, for example, including: starting to count by an unmasked interrupt NMI timer; after the NMI is triggered according to a preset period, counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate.
In addition, the embodiment of the application also provides a CPU, which comprises the system information acquisition device provided by the embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Further, the units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Furthermore, functional modules in various embodiments of the present application may be integrated together to form a single portion, or each module may exist alone, or two or more modules may be integrated to form a single portion.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The foregoing is merely exemplary embodiments of the present application and is not intended to limit the scope of the present application, and various modifications and variations may be suggested to one skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims (9)

1. The system information acquisition method is characterized by comprising the following steps:
starting to count by an unmasked interrupt NMI timer;
after the NMI is triggered according to a preset period, counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate;
the statistics of the system information in one period through the NMI interrupt processing function and the system soft interrupt processing function comprises the following steps:
the read hardware network card data are assigned to a packet receiving end variable through an NMI interrupt processing function, the CPU utilization rate is assigned to a CPU statistical variable, and the memory utilization rate is assigned to a memory statistical variable;
acquiring a packet receiving start variable through a system soft interrupt processing function, and acquiring network card packet receiving and transmitting data according to the packet receiving start variable and the packet receiving end variable; and obtaining the CPU utilization rate according to the CPU statistical variable and obtaining the memory utilization rate according to the memory statistical variable.
2. The method of claim 1, wherein prior to reading the system information by the NMI interrupt handling function and the system soft interrupt handling function, the method further comprises:
when the security gateway is started, initializing a packet receiving start variable, a packet receiving end variable, a CPU statistical variable and a memory statistical variable, and registering the NMI interrupt processing function and the system soft interrupt processing function.
3. The method according to claim 1, wherein the obtaining network card packet data according to the packet start variable and the packet end variable includes:
and taking the difference value of the packet receiving start variable and the packet receiving end variable as the packet receiving and transmitting data of the network card.
4. The method of claim 1, wherein after counting system information for one period by the NMI interrupt handling function and the system soft interrupt handling function, the method further comprises:
and assigning the packet receiving end variable to the packet receiving start variable, and initializing the packet receiving end variable, the CPU statistical variable and the memory statistical variable.
5. A system information acquisition device, comprising:
the timing module is used for starting timing through the non-maskable interrupt NMI timer;
the information statistics module is used for counting system information in a period through an NMI interrupt processing function and a system soft interrupt processing function after the non-maskable interrupt NMI is triggered according to a preset period; the system information comprises network card receiving and transmitting packet data, CPU utilization rate and memory utilization rate;
the information statistics module is specifically used for:
the read hardware network card data are assigned to a packet receiving end variable through an NMI interrupt processing function, the CPU utilization rate is assigned to a CPU statistical variable, and the memory utilization rate is assigned to a memory statistical variable;
acquiring a packet receiving start variable through a system soft interrupt processing function, and acquiring network card packet receiving and transmitting data according to the packet receiving start variable and the packet receiving end variable; and obtaining the CPU utilization rate according to the CPU statistical variable and obtaining the memory utilization rate according to the memory statistical variable.
6. The apparatus of claim 5, wherein the apparatus further comprises:
and the initialization module is used for initializing a packet receiving start variable, a packet receiving end variable, a CPU statistical variable and a memory statistical variable when the security gateway is started, and registering the NMI interrupt processing function and the system soft interrupt processing function.
7. A CPU, comprising: the system information acquisition device of claim 5.
8. An electronic device, comprising: a processor, a memory, and a bus, wherein,
the processor and the memory complete communication with each other through the bus;
the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of any of claims 1-4.
9. A non-transitory computer readable storage medium storing computer instructions which, when executed by a computer, cause the computer to perform the method of any of claims 1-4.
CN201911305477.XA 2019-12-17 2019-12-17 System information acquisition method and device Active CN110990229B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911305477.XA CN110990229B (en) 2019-12-17 2019-12-17 System information acquisition method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911305477.XA CN110990229B (en) 2019-12-17 2019-12-17 System information acquisition method and device

Publications (2)

Publication Number Publication Date
CN110990229A CN110990229A (en) 2020-04-10
CN110990229B true CN110990229B (en) 2023-07-18

Family

ID=70094879

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911305477.XA Active CN110990229B (en) 2019-12-17 2019-12-17 System information acquisition method and device

Country Status (1)

Country Link
CN (1) CN110990229B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112383414B (en) * 2020-10-28 2023-09-29 北京中科网威信息技术有限公司 Dual-machine hot backup quick switching method and device
CN114518991A (en) * 2020-11-18 2022-05-20 中移物联网有限公司 Method and device for counting CPU utilization rate

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1632760A (en) * 2003-12-24 2005-06-29 华为技术有限公司 Method for preserving abnormal state information of control system
CN101895440A (en) * 2010-07-22 2010-11-24 北京天融信科技有限公司 Security gateway and failure detection method thereof
CN104899125A (en) * 2015-06-04 2015-09-09 杭州华三通信技术有限公司 Operation information acquisition method and operation information acquisition device for single-board system
CN109144873A (en) * 2018-08-22 2019-01-04 郑州云海信息技术有限公司 A kind of linux kernel processing method and processing device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105279021B (en) * 2015-10-16 2019-05-07 华为技术有限公司 The method and apparatus for executing not maskable interrupts

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1632760A (en) * 2003-12-24 2005-06-29 华为技术有限公司 Method for preserving abnormal state information of control system
CN101895440A (en) * 2010-07-22 2010-11-24 北京天融信科技有限公司 Security gateway and failure detection method thereof
CN104899125A (en) * 2015-06-04 2015-09-09 杭州华三通信技术有限公司 Operation information acquisition method and operation information acquisition device for single-board system
CN109144873A (en) * 2018-08-22 2019-01-04 郑州云海信息技术有限公司 A kind of linux kernel processing method and processing device

Also Published As

Publication number Publication date
CN110990229A (en) 2020-04-10

Similar Documents

Publication Publication Date Title
CN110990229B (en) System information acquisition method and device
CN109144873B (en) Linux kernel processing method and device
CN111092865B (en) Security event analysis method and system
RU2134446C1 (en) Method for controlling primitive program overflow by messages in multiprocessor control system (versions)
CN109189598B (en) Interrupt positioning method, processor and terminal equipment
WO2020098266A1 (en) Abnormal response method and device
CN114253679A (en) Interrupt event processing method and device, computer equipment and storage medium
CN114637656B (en) Redis-based monitoring method and device, storage medium and equipment
CN113849135A (en) Log access method and device and server
US10846162B2 (en) Secure forking of error telemetry data to independent processing units
JP6133614B2 (en) Fault log collection device, fault log collection method, and fault log collection program
CN110989333A (en) Redundancy control method based on multiple computing cores, computing cores and redundancy control system
CN111175573A (en) Method, device, equipment and medium for detecting alternating voltage frequency
CN117992126B (en) Processor cooperative work method and system based on software lockstep
CN110837537A (en) Order data synchronization method and device, computer readable storage medium and server
CN112463125B (en) Timing method and equipment of virtual timer
CN112559592B (en) Real-time data processing method, device and equipment
CN109981397B (en) Network performance acquisition method and system
CN110876852A (en) Network game data processing method and system of micro-service
CN112769889B (en) Service data pushing method and device, storage medium and electronic device
CN113486355B (en) Information storage device, information storage method, communication device, chip and module equipment thereof
CN116881050A (en) Interactive automatic restarting method, device and system
CN110716747B (en) Program operation efficiency optimization method based on function parameter statistics and terminal equipment
KR940007832B1 (en) Method of measuring process load on real time system
CN117234764A (en) Electronic system, exception handling method and device thereof and electronic equipment

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant