CN117234764A - Electronic system, exception handling method and device thereof and electronic equipment - Google Patents

Electronic system, exception handling method and device thereof and electronic equipment Download PDF

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Publication number
CN117234764A
CN117234764A CN202210644339.XA CN202210644339A CN117234764A CN 117234764 A CN117234764 A CN 117234764A CN 202210644339 A CN202210644339 A CN 202210644339A CN 117234764 A CN117234764 A CN 117234764A
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reset
mcu
electronic system
pin
reset signal
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王创乐
谢军
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Shenzhen Lan You Technology Co Ltd
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Shenzhen Lan You Technology Co Ltd
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Abstract

The application is suitable for the technical field of data processing, and provides an electronic system, an exception handling method and device thereof and electronic equipment. The electronic system comprises an MCU, a watchdog chip and a delay circuit; the MCU sends a dog feeding signal to the watchdog chip at intervals of a first preset time; the watchdog chip does not receive a next dog feeding signal within a second preset time, and sends a reset signal to the MCU; wherein, the reset signal directly reaches the interrupt pin of the MCU and reaches the reset pin of the MCU through the delay circuit; the MCU receives a reset signal through the interrupt pin, triggers interrupt operation to acquire current running information of an application program of the electronic system, and the second preset time is longer than or equal to the first preset time; the MCU receives a reset signal through the reset pin and responds to the reset signal to carry out reset operation. The embodiment of the application can acquire the abnormal information when the electronic system is abnormal in operation, and provide effective information capable of solving the problem for product research personnel.

Description

Electronic system, exception handling method and device thereof and electronic equipment
Technical Field
The present application relates to the field of data processing technologies, and in particular, to an electronic system, and an anomaly processing method, apparatus and electronic device thereof.
Background
Electronic and electrical products based on MCU (Micro Control Unit ) platforms (e.g. rissa RH850, semiconductor of law STM32, slush Traveo, etc.), in the case of product development based on non-commercial embedded operating systems (e.g. open source real time operating system RTOS or bare system Metal OS), because of the complexity of the chip platform configuration, there has been no provision in the open-source industry for an efficient and uniform system exception management mechanism (for freeRTOS, threadX, RT-Linux, RT-thread, etc.).
Based on the above, when common problems such as memory abnormality, timeout abnormality, stack abnormality and mode abnormality occur in the software execution process and cause system reset, the existing non-commercial operation system cannot provide an effective and rapid positioning assisting means, so that a product research and development team can rapidly solve the problems.
Disclosure of Invention
In order to overcome the problems in the related art, the application provides an electronic system, an abnormality processing method, an abnormality processing device and electronic equipment, which can acquire abnormal information when the electronic system operates abnormally, and provide effective information capable of solving the problems for product research personnel.
In a first aspect, an embodiment of the present application provides an electronic system, including an MCU, a watchdog chip, and a delay circuit; the MCU sends a dog feeding signal to the watchdog chip at intervals of a first preset time; the watchdog chip does not receive a next dog feeding signal within a second preset time, and sends a reset signal to the MCU; wherein, the reset signal directly reaches the interrupt pin of the MCU and reaches the reset pin of the MCU through the delay circuit; the MCU receives the reset signal through the interrupt pin, triggers interrupt operation to acquire current running information of the electronic system application program, and the second preset time is longer than or equal to the first preset time; the MCU receives the reset signal through the reset pin, and responds to the reset signal to carry out reset operation.
In the electronic system, the watchdog chip can send a reset signal to the MCU under the condition that the MCU fails to send the watchdog feeding signal to the watchdog chip according to the preset time due to the abnormality of the application program of the electronic system. Wherein, the reset signal directly reaches the interrupt pin of MCU and reaches the reset pin of MCU through delay circuit. After receiving the reset signal through the interrupt pin, the MCU triggers an interrupt operation to acquire the current running information of the application program of the electronic system; after receiving the reset signal through the reset pin, the MCU responds to the reset signal to carry out reset operation. Because the reset signal reaches the reset pin and needs to pass through the delay circuit, the MCU can trigger the interrupt operation to acquire the current running information of the application program of the electronic system and then reset. The current running information of the electronic system application program can represent abnormal information of the electronic system application program, and effective information is provided for product research and development personnel to solve the problem.
With reference to the first aspect, in some possible implementations, the delay circuit includes a capacitor unit, where one end of the capacitor unit is connected to the watchdog chip and the reset pin, and the other end of the capacitor unit is grounded.
With reference to the first aspect, in some possible implementations, the MCU sends the watchdog signal to the watchdog chip through a GPIO pin.
With reference to the first aspect, in some possible implementations, the MCU receives the reset signal through the interrupt pin, triggers an NMI interrupt operation, and captures current running information executed by the electronic system application program in the NMI interrupt operation, where the current running information includes abnormal running information of the application program; the MCU stores the abnormal operation information of the application program into a preset memory area, and generates a reset log carrying an abnormal identifier after reset starting.
In a second aspect, an embodiment of the present application provides a method for processing an anomaly of an electronic system, including: the MCU of the electronic system sends a dog feeding signal to a watchdog chip of the electronic system at intervals of a first preset time; the MCU receives the reset signal through an interrupt pin, executes interrupt operation and acquires current running information of the electronic system application program; if the watchdog chip does not receive a next dog feeding signal within a second preset time, a reset signal is sent to the MCU, the reset signal directly reaches the interrupt pin and reaches the reset pin of the MCU after delay processing, and the second preset time is greater than or equal to the first preset time; and the MCU receives the reset signal through the reset pin and executes reset operation.
With reference to the second aspect, in some possible implementations, the current running information of the electronic system application program includes abnormal running information of the application program, where the abnormal running information of the application program includes at least one of the following valid information: PC pointer, task identification, CPU mode, stack pointer set, and pointer data content.
With reference to the second aspect, in some possible implementations, the method further includes: the MCU stores effective information in abnormal operation information of the application program into a preset memory area; after the MCU is reset and started, the MCU generates a reset log carrying an abnormal identifier according to the effective information.
In a third aspect, an embodiment of the present application provides an electronic system exception handling apparatus, including: the sending unit is used for sending a dog feeding signal to a watchdog chip of the electronic system at intervals of preset time; the interrupt unit is used for receiving the reset signal through an interrupt pin, executing interrupt operation and acquiring current running information of the electronic system application program; if the watchdog chip does not receive a next watchdog feeding signal within the preset time, a reset signal is sent to the MCU, and the reset signal directly reaches the interrupt pin and reaches the reset pin of the MCU after delay processing; and the reset unit is used for receiving the reset signal through the reset pin and executing reset operation.
In a fourth aspect, an embodiment of the present application provides an electronic device, including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to implement the method according to any of the first aspects when executing the executable instructions.
In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement a method according to any of the first aspects.
In a sixth aspect, embodiments of the present application provide a computer program product comprising a computer readable storage medium having computer readable program instructions embodied thereon for causing a processor to implement aspects of the present application; the computer program product, when run on an electronic device, causes the electronic device to perform the method of any one of the above first aspects.
It will be appreciated that the advantages of the second to sixth aspects may be found in the relevant description of the first aspect, and are not described here again.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 shows a schematic architecture diagram of an electronic system according to an embodiment of the present application;
FIG. 2 shows a flowchart of an electronic system exception handling method provided by an embodiment of the present application;
FIG. 3 is a block diagram of an electronic system exception handling apparatus according to an embodiment of the present application;
fig. 4 shows a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The present application will be more clearly described with reference to the following examples. The following examples will assist those skilled in the art in further understanding the function of the present application, but are not intended to limit the application in any way. It should be noted that variations and modifications could be made by those skilled in the art without departing from the inventive concept. These are all within the scope of the present application.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
In the description of the present specification and the appended claims, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
Furthermore, references to "a plurality of" in embodiments of the present application should be interpreted as two or more. For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the following description will be made by way of specific embodiments with reference to the accompanying drawings.
In the case of electronic and electrical products based on MCU (Micro Control Unit ) platforms (e.g., rissa RH850, semiconductor of law STM32, slush trap, etc.), and product development based on non-commercial embedded operating systems (e.g., open source real time operating system RTOS or bare system Metal OS), there has been no provision in the open source industry for an efficient unified system exception management mechanism (for freeRTOS, threadX, RT-Linux, RT-thread, etc.) due to the complexity of the chip platform configuration.
In the worst case, because there is no effective exception log means, the test team and the development team need to pay a huge test effort or examination cost, or solve the related problems by stably reproducing the exception site, or identifying the execution logic exception in examination, or by conventional means such as various fishbone analysis tools, so that the project development period and the stable delivery of products are greatly affected.
Based on the above problems, in the embodiment of the present application, by combining the conventional external watchdog+the internal interrupt (e.g. NMI interrupt) policy of the IC chip, when an abnormality occurs in the system, the external watchdog will be directly or indirectly caused to trigger the reset operation. The NMI interrupt input is formed by escape of the reset operation, and the reset operation is reasonably delayed by using a hardware means. With this delay, information (including PC pointer, task ID, CPU mode, stack contents, etc.) valid in the exception scene of the current application execution is captured in the NMI interrupt routine and stored to a specific memory area. After the system is reset and restarted, a reset log with an abnormal mark is formed. After the system is successfully reset, the abnormal information before the system is reset (generated by an NMI interrupt routine) is formed into effective log information for a research and development team to read abnormal field information at any time so as to assist in analysis of abnormal problems.
The architecture of the electronic system according to the embodiment of the present application will be described first, referring to fig. 1, where the architecture of the electronic system may include an MCU10, a watchdog chip 20 and a delay circuit 30.
The MCU10 transmits a feeding signal to the watchdog chip 20 every a first preset time. The watchdog chip 20 does not receive the next feeding signal within the second preset time, and sends a reset signal to the MCU 10. Wherein the second preset time is greater than or equal to the first preset time, and the reset signal directly reaches the interrupt pin of the MCU10 and reaches the reset pin of the MCU10 through the delay circuit 30. The MCU10 receives the reset signal through the interrupt pin, and triggers the interrupt operation to acquire the current running information of the application program of the electronic system. The MCU10 receives a reset signal through a reset pin, and performs a reset operation in response to the reset signal.
In the case that the MCU10 fails to transmit the watchdog signal to the watchdog chip 20 according to the preset time due to the abnormality of the electronic system application, the watchdog chip 20 may transmit the reset signal to the MCU 10. Wherein the reset signal directly reaches the interrupt pin of the MCU10 and reaches the reset pin of the MCU10 through the delay circuit 30. After receiving the reset signal through the interrupt pin, the MCU10 triggers an interrupt operation to acquire the current running information of the application program of the electronic system; after receiving the reset signal through the reset pin, the MCU responds to the reset signal to carry out reset operation. Since the reset signal needs to pass through the delay circuit when reaching the reset pin, the MCU10 can trigger the interrupt operation to acquire the current running information of the application program of the electronic system, and then reset the application program. The current running information of the electronic system application program can represent abnormal information of the electronic system application program, and effective information is provided for product research and development personnel to solve the problem.
In some embodiments, delay circuit 30 may include a capacitive element having one end connected to watchdog chip 20 and a reset pin and the other end connected to ground. The reset signal sent by the watchdog chip 20 to the MCU10 is transmitted to the interrupt pin and the reset pin, respectively, and since no delay circuit is provided between the watchdog chip 20 and the interrupt pin, the reset signal can be directly sent to the interrupt pin. A delay circuit 30 is disposed between the watchdog chip 20 and the reset pin, so that the reset signal can reach the reset pin after a delay.
At this time, the MCU10 receives a reset signal through the interrupt pin to trigger an interrupt operation to obtain current running information of the electronic system application program, where the current running information of the electronic system application program includes abnormal running information of the application program. After the reset signal reaches the reset pin, the MCU10 performs a reset operation. After the MCU is reset and started, the MCU10 may generate a reset log carrying the abnormal identifier according to the abnormal operation information. After the electronic system is successfully reset, the reset log can be sent to a terminal of a research and development personnel for the research and development personnel to acquire the abnormal information of the application program of the electronic system so as to assist in analysis of the abnormal problems.
Illustratively, MCU10 may send a watchdog signal to watchdog chip 20 via a General-purpose Input/Output (GPIO) pin.
In some embodiments, the MCU10 receives a reset signal through an interrupt pin, triggers an NMI interrupt (Non Maskable Interrupt, non-maskable interrupt) operation in which current operating information of an electronic system application program is captured, the current operating information including abnormal operating information of the application program. The abnormal operation information may include at least one of the following valid information: PC pointers, task identification (e.g., task ID), CPU mode, stack pointer set, pointer data content, etc.
The MCU10 stores the abnormal operation information of the application program into a preset memory area, and generates a reset log carrying an abnormal identifier after reset starting. After the electronic system is successfully reset, the reset log can be sent to a terminal of a research and development personnel for the research and development personnel to acquire the abnormal information of the application program of the electronic system so as to assist in analysis of the abnormal problems.
The method for processing the abnormality of the electronic system according to the embodiment of the application is described below based on the above electronic system.
Fig. 2 is a flow chart illustrating an electronic system exception handling method according to an embodiment of the present application. Referring to fig. 2, the electronic system exception handling method may include the steps of:
step 201, the MCU of the electronic system sends a dog feeding signal to the watchdog chip of the electronic system at intervals of a first preset time.
Illustratively, during normal operation, the MCU will send a watchdog signal to the watchdog chip via the GPIO pin at regular time. When the dog feeding signals can reach the watchdog chip according to the set time, the watchdog chip considers that the electronic system operates normally, and a reset signal is not required to be sent to the MCU; when the dog feeding signal can not reach the watchdog chip according to the set time, the watchdog chip can consider that the electronic system operates abnormally, the MCU needs to be reset, and a reset signal is sent to the MCU.
Illustratively, the MCU may send a watchdog signal to the watchdog chip via the GPIO pin.
Step 202, the mcu receives the reset signal through the interrupt pin, executes the interrupt operation and obtains the current running information of the application program of the electronic system.
If the watchdog chip does not receive the next watchdog feeding signal within the second preset time, a reset signal is sent to the MCU, and the reset signal directly reaches the interrupt pin and reaches the reset pin of the MCU after delay processing.
For example, the MCU sends a feeding signal to the watchdog chip once every a first preset time T1, and the watchdog chip should receive the feeding signal once every the first preset time T1. If the watchdog chip receives the last feeding signal and still does not receive the next feeding signal after exceeding a second preset time T2 (T2 is more than T1), the electronic system is considered to have abnormal operation, the MCU needs to be reset, and a reset signal is sent to the MCU.
For example, the second preset time may be equal to the first preset time. For example, the MCU sets every preset time t 1 Sending a dog feeding signal to the watchdog chip once, wherein the watchdog chip should be at intervals of preset time t 1 A feeding signal is received.
For example, the second preset time may be greater than the first preset time. For example, the MCU sets every preset time t 1 If the watchdog chip sends a signal for feeding the watchdog once, the time interval between the watchdog chip and the receipt of the signal for feeding the watchdog twice can be longer than the preset time t in consideration of the possible time delay of communication and individual special conditions 1 And the value of the specific time interval can be set based on the actual situation. In general, the time interval between the watchdog chip receiving the two times of the feeding dog signals is consistent with the time interval between the MCU sending the feeding dog signals to the watchdog chip.
The reset signal sent to the MCU by the watchdog chip is transmitted to the interrupt pin and the reset pin respectively, and a delay circuit is not arranged between the watchdog chip and the interrupt pin, so that the reset signal can directly reach the interrupt pin. And a delay circuit is arranged between the watchdog chip and the reset pin, so that the reset signal can reach the reset pin after a period of delay.
The MCU receives a reset signal through the interrupt pin to trigger interrupt operation so as to acquire the current running information of the application program of the electronic system, wherein the current running information of the application program of the electronic system comprises abnormal running information of the application program. The abnormal operation information may include at least one of the following valid information: PC pointers, task identification (e.g., task ID), CPU mode, stack pointer set, pointer data content, etc.
In some embodiments, the MCU receives a reset signal through an interrupt pin, triggers an NMI interrupt operation, and captures current running information executed by an application program of the electronic system during the NMI interrupt operation, where the current running information includes abnormal running information of the application program. The abnormal operation information may include at least one of the following valid information: PC pointers, task identification (e.g., task ID), CPU mode, stack pointer set, pointer data content, etc.
In step 203, the mcu receives a reset signal through a reset pin, and performs a reset operation.
Because the delay circuit is arranged between the watchdog chip and the reset pin, the reset signal can reach the reset pin after a period of delay. Because no delay circuit is arranged between the watchdog chip and the interrupt pin, the reset signal can be directly transmitted to the interrupt pin. Based on this, it is possible to realize: and before the MCU performs the reset operation, acquiring abnormal operation information of the application program. The MCU can store the abnormal operation information of the application program into a preset memory area, and after reset starting, a reset log carrying an abnormal identifier is generated. After the electronic system is successfully reset, the reset log can be sent to a terminal of a research and development personnel for the research and development personnel to acquire the abnormal information of the application program of the electronic system so as to assist in analysis of the abnormal problems.
According to the electronic system abnormality processing method, due to the fact that the electronic system application program is abnormal, the watchdog chip can send a reset signal to the MCU under the condition that the MCU cannot send a watchdog feeding signal to the watchdog chip according to the preset time. Wherein, the reset signal directly reaches the interrupt pin of MCU and reaches the reset pin of MCU through delay circuit. After receiving the reset signal through the interrupt pin, the MCU triggers an interrupt operation to acquire the current running information of the application program of the electronic system; after receiving the reset signal through the reset pin, the MCU responds to the reset signal to carry out reset operation. Because the reset signal reaches the reset pin and needs to pass through the delay circuit, the MCU can trigger the interrupt operation to acquire the current running information of the application program of the electronic system and then reset. The current running information of the electronic system application program can represent abnormal information of the electronic system application program, and effective information is provided for product research and development personnel to solve the problem.
According to the application, the software exception site storage is realized through the assistance of external hardware conditions, and the exception site is effectively captured and stored on the premise that an OS (Operating System) does not provide effective exception site information based on a non-commercial embedded Operating System.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present application.
Corresponding to the method for processing an abnormality of an electronic system described in the foregoing embodiments, fig. 3 is a block diagram illustrating a structure of an apparatus for processing an abnormality of an electronic system according to an embodiment of the present application, and for convenience of explanation, only a portion related to the embodiment of the present application is shown.
Referring to fig. 3, the above-described electronic device abnormality processing apparatus may include a transmission unit 301, an interrupt unit 302, and a reset unit 303.
The transmitting unit 310 is configured to transmit a watchdog signal to a watchdog chip of the electronic system at intervals of a preset time.
The interrupt unit 302 is configured to receive the reset signal through the interrupt pin, perform an interrupt operation, and acquire current running information of the electronic system application program. If the watchdog chip does not receive the next watchdog feeding signal within the preset time, a reset signal is sent to the MCU, and the reset signal directly reaches an interrupt pin of the MCU and reaches a reset pin of the MCU after delay processing.
The reset unit 303 is configured to receive a reset signal through a reset pin and perform a reset operation.
Optionally, the current running information of the application program of the electronic system includes abnormal running information of the application program, and the abnormal running information of the application program includes at least one of the following effective information: PC pointers, stack pointer sets, and pointer data content.
In some embodiments, the above-mentioned electronic system exception handling apparatus may further include a storage unit and a reset log generation unit. The storage unit is used for storing effective information in abnormal operation information of the application program into a preset memory area. And the reset log generating unit is used for generating a reset log carrying the abnormal identifier according to the effective information after the MCU is reset and started.
It should be noted that, because the content of information interaction and execution process between the above devices/units is based on the same concept as the method embodiment of the present application, specific functions and technical effects thereof may be referred to in the method embodiment section, and will not be described herein.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
The embodiment of the present application also provides an electronic device, referring to fig. 4, the electronic device 400 may include: at least one processor 410 and a memory 420, the memory 420 having stored therein a computer program executable on the at least one processor 410, the processor 410 implementing the steps of any of the various method embodiments described above, such as steps 201 to 203 in the embodiment shown in fig. 2, when the computer program is executed. Alternatively, the processor 410 may implement the functions of the modules/units in the above-described embodiments of the apparatus, such as the functions of the modules 301 to 303 shown in fig. 3, when executing the computer program.
By way of example, a computer program may be partitioned into one or more modules/units that are stored in memory 420 and executed by processor 410 to perform the present application. The one or more modules/units may be a series of computer program segments capable of performing particular functions for describing the execution of the computer program in the electronic device 400.
It will be appreciated by those skilled in the art that fig. 4 is merely an example of an electronic device and is not limiting of an electronic device and may include more or fewer components than shown, or may combine certain components, or different components, such as input-output devices, network access devices, buses, etc.
The processor 410 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 420 may be an internal storage unit of the electronic device, or may be an external storage device of the electronic device, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash Card (Flash Card), or the like. The memory 420 is used to store the computer program as well as other programs and data required by the electronic device. The memory 420 may also be used to temporarily store data that has been output or is to be output.
The bus may be an industry standard architecture (Industry Standard Architecture, ISA) bus, an external device interconnect (Peripheral Component, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. The buses may be divided into address buses, data buses, control buses, etc. For ease of illustration, the buses in the drawings of the present application are not limited to only one bus or to one type of bus.
In the embodiment of the present application, the electronic device 400 may be the MCU, or may be other electronic devices, which is not limited thereto.
Embodiments of the present application also provide a computer readable storage medium storing a computer program that, when executed by a processor, implements steps in each embodiment of the method for processing an abnormality of an electronic device described above.
Embodiments of the present application provide a computer program product that, when executed on a mobile terminal, enables the mobile terminal to implement the steps in the embodiments of the method for exception handling of electronic devices described above.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application may implement all or part of the flow of the method of the above embodiments, and may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include at least: any entity or device capable of carrying computer program code to a camera device/electronic apparatus, a recording medium, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, and a software distribution medium. Such as a U-disk, removable hard disk, magnetic or optical disk, etc. In some jurisdictions, computer readable media may not be electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/network device and method may be implemented in other manners. For example, the apparatus/network device embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims (10)

1. An electronic system is characterized by comprising an MCU, a watchdog chip and a delay circuit;
the MCU sends a dog feeding signal to the watchdog chip at intervals of a first preset time;
the watchdog chip does not receive a next dog feeding signal within a second preset time, and sends a reset signal to the MCU; the reset signal directly reaches the interrupt pin of the MCU and reaches the reset pin of the MCU through the delay circuit, and the second preset time is longer than or equal to the first preset time;
the MCU receives the reset signal through the interrupt pin, and triggers an interrupt operation to acquire the current running information of the electronic system application program;
the MCU receives the reset signal through the reset pin, and responds to the reset signal to carry out reset operation.
2. The electronic system of claim 1, wherein the delay circuit comprises a capacitor unit having one end connected to the watchdog chip and the reset pin and the other end grounded.
3. The electronic system of claim 1, wherein the MCU sends the watchdog signal to the watchdog chip via a GPIO pin.
4. The electronic system according to claim 1, wherein the MCU receives the reset signal through the interrupt pin, triggers an NMI interrupt operation, and captures current running information executed by the electronic system application in the NMI interrupt operation, wherein the current running information includes abnormal running information of the application;
the MCU stores the abnormal operation information of the application program into a preset memory area, and generates a reset log carrying an abnormal identifier after reset starting.
5. An electronic system abnormality processing method, comprising:
the MCU of the electronic system sends a dog feeding signal to a watchdog chip of the electronic system at intervals of a first preset time;
the MCU receives the reset signal through an interrupt pin, executes interrupt operation and acquires current running information of the electronic system application program; if the watchdog chip does not receive a next dog feeding signal within a second preset time, a reset signal is sent to the MCU, the reset signal directly reaches the interrupt pin and reaches the reset pin of the MCU after delay processing, and the second preset time is greater than or equal to the first preset time;
and the MCU receives the reset signal through the reset pin and executes reset operation.
6. The system exception handling method of claim 5, wherein the current running information of the electronic system application includes an exception running information of the application, the exception running information of the application including at least one of the following valid information: PC pointer, task identification, CPU mode, stack pointer set, and pointer data content.
7. The system exception handling method of claim 6, further comprising:
the MCU stores effective information in abnormal operation information of the application program into a preset memory area;
after the MCU is reset and started, the MCU generates a reset log carrying an abnormal identifier according to the effective information.
8. An electronic system abnormality processing apparatus, comprising:
the sending unit is used for sending a dog feeding signal to a watchdog chip of the electronic system at intervals of preset time;
the interrupt unit is used for receiving the reset signal through an interrupt pin, executing interrupt operation and acquiring current running information of the electronic system application program; if the watchdog chip does not receive a next watchdog feeding signal within the preset time, a reset signal is sent to the MCU, and the reset signal directly reaches the interrupt pin and reaches the reset pin of the MCU after delay processing;
and the reset unit is used for receiving the reset signal through the reset pin and executing reset operation.
9. An electronic device comprising a memory and a processor, the memory having stored therein a computer program executable on the processor, wherein the processor implements the method of any of claims 5 to 7 when the computer program is executed.
10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the method according to any one of claims 5 to 7.
CN202210644339.XA 2022-06-08 2022-06-08 Electronic system, exception handling method and device thereof and electronic equipment Pending CN117234764A (en)

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CN202210644339.XA CN117234764A (en) 2022-06-08 2022-06-08 Electronic system, exception handling method and device thereof and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210644339.XA CN117234764A (en) 2022-06-08 2022-06-08 Electronic system, exception handling method and device thereof and electronic equipment

Publications (1)

Publication Number Publication Date
CN117234764A true CN117234764A (en) 2023-12-15

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Application Number Title Priority Date Filing Date
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Country Link
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