CN110767638A - Grid structure applied to crimping type MOSFET - Google Patents

Grid structure applied to crimping type MOSFET Download PDF

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Publication number
CN110767638A
CN110767638A CN201810829499.5A CN201810829499A CN110767638A CN 110767638 A CN110767638 A CN 110767638A CN 201810829499 A CN201810829499 A CN 201810829499A CN 110767638 A CN110767638 A CN 110767638A
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CN
China
Prior art keywords
grid
type mosfet
crimping type
connecting piece
copper block
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Pending
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CN201810829499.5A
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Chinese (zh)
Inventor
陈政宇
曾嵘
赵彪
余占清
刘佳鹏
周文鹏
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Tsinghua University
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Tsinghua University
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Filing date
Publication date
Application filed by Tsinghua University filed Critical Tsinghua University
Priority to CN201810829499.5A priority Critical patent/CN110767638A/en
Priority to EP18850023.5A priority patent/EP3678173A4/en
Priority to PCT/CN2018/103750 priority patent/WO2019042446A1/en
Publication of CN110767638A publication Critical patent/CN110767638A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The utility model provides a be applied to crimping type MOSFET's grid structure, includes first copper billet, crimping type MOSFET, grid connecting piece, receives the connection interface of external grid control signal, second copper billet, with the bar-shaped metal of crimping type MOSFET grid contact, be used for bar-shaped metal with the elastic construction that grid connecting piece is connected, grid connecting piece with insulating medium between the second copper billet. By using the grid structure without barrier effect on the MOSFET heat dissipation path, the heat dissipation capability can be improved, and the press mounting structure is simplified.

Description

Grid structure applied to crimping type MOSFET
Technical Field
The invention relates to a grid structure of a metal-oxide-semiconductor field effect transistor (MOSFET), in particular to a grid structure applied to a crimping type MOSFET or a crimping type MOSFET array, and belongs to the technical field of electrical engineering.
Background
A Metal-Oxide Semiconductor Field Effect Transistor (MOSFET) is a widely used Field Effect Transistor, which can be applied to digital signal processing such as microprocessors and microcontrollers, and is also implemented by a MOSFET for integrated circuits with more and more analog signal processing.
The traditional MOSFET is of a transverse through-current structure, a grid electrode, a drain electrode and a source electrode of the MOSFET are usually welded on a circuit board, heat generated by the device during working is mainly dissipated through the circuit board and is influenced by the packaging type, the heat dissipation capacity is poor, and the through-current capacity of the MOSFET is limited. The crimping type MOSFET, as shown in fig. 1, is a longitudinal through-flow structure, the drain is a top metal casing, during use, the bottom source and the gate can be respectively welded with the circuit board, the drains on the left and right sides are welded with the circuit board, and the top drain is crimped with the metal connection structure to increase the heat dissipation capability.
In some applications, direct crimping using a crimped MOSFET die is involved, without a package structure, as shown in fig. 2.
In high power applications, a large number of MOSFETs are usually used to connect in parallel to form an array, so as to implement the function of turning on and off a large current. For example, the turn-off module of a gate drive circuit integrated with gate commutated thyristors (IGCTs), as shown in FIG. 3(a), uses a large number of parallel MOSFET arrays QGAnd a pre-charged parallel capacitor bank CoffIn series, by triggering the MOSFET array Q during IGCT offGAnd the IGCT is switched on, so that the cathode current of the IGCT is converted to the gate electrode, and the IGCT is switched off. For another example, in a drive circuit using an emitter turn-off thyristor (ETO) of a GCT or GTO element, as shown in fig. 3(b), two sets of MOSFET arrays Q connected in parallel are usedGAnd QE. ETO on period QGOff, QEConducting; q at ETO OFFEOff, QGOn and current commutates from the cathode to the gate of the GCT or GTO element, turning it off.
For the above applications, to increase the commutation speed of the turn-off device current from cathode to gate, the stray inductance of the loop should be minimized, and for this reason, the MOSFET should be integrated in the device package. In the conventional press-fitting structure, a press-fit MOSFET is generally soldered on a multilayer circuit board, and a gate control signal of the MOSFET is conducted from the outside to an MSOFET gate through the multilayer circuit board. However, the introduction of the multilayer circuit board can generate a barrier effect on the process of heat transfer of the MOSFET to the outside.
In addition, when using GCT or GTO, it is necessary to crimp molybdenum sheets on both sides and apply a pressure of several tens KN or more, but a single crimp MOSFET can only withstand a pressure of 50-100N, and therefore, if the crimp MOSFET is integrated in a package, there are problems of pressure difference and fitting of different components.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a grid structure applied to a crimping type MOSFET, and the grid structure without the barrier effect on the heat dissipation path of the MOSFET is used, so that the heat dissipation capacity is improved.
The technical scheme is as follows:
a gate structure applied to a crimping type MOSFET is characterized in that: the device comprises a first copper block, a crimping type MOSFET, a grid connecting piece, a connecting interface for receiving an external grid control signal, a second copper block, an elastic structure, a rod-shaped metal in contact with a grid of the crimping type MOSFET, and an insulating medium between the grid connecting piece and the second copper block;
wherein the source of the crimp-type MOSFET is connected to the convex portion of the second copper block;
the grid connecting piece is arranged in the groove of the second copper block and is electrically insulated from the second copper block through the insulating medium;
the grid connecting piece is connected with the grid of the crimping type MOSFET through the elastic structure and the rod-shaped metal;
the grid connecting piece is connected with the connecting interface and receives an external grid control signal.
Further wherein the first copper blocks comprise one or more, each of the first copper blocks being equipotential with the drain of the crimp-type MOSFET, the second copper blocks comprise one or more, each of the second copper blocks being equipotential with the source of the crimp-type MOSFET; and a certain pressure is formed between the first copper block and the second copper block.
Further, wherein the crimp-type MOSFET includes a plurality, and forms a crimp-type MOSFET array; the shape of the grid connecting piece is correspondingly arranged according to the arrangement mode of the crimping type MOSFET array.
Further, the crimping type MOSFET array is in a ring shape or a matrix shape; when all the crimping type MSOFETs in the array are controlled by the same grid signal, one grid connecting piece is adopted to electrically connect all the crimping type MSOFETs, and when different grid signals are used to control the crimping type MSOFETs in the array, different grid connecting pieces are adopted to electrically connect the corresponding crimping type MSOFETs.
Further, the grid connecting piece is connected with the grid of the crimping type MOSFET through the elastic structure and the rod-shaped metal, and the elastic structure ensures that the rod-shaped metal is reliably connected with the grid of the crimping type MOSFET.
A gate structure applied to a crimping type MOSFET bare chip is characterized in that: the circuit comprises a first copper block, a crimping type MOSFET bare chip, a grid connecting piece, a connecting interface for receiving an external grid control signal, a second copper block, an elastic structure and a rod-shaped metal in contact with the grid of the crimping type MOSFET bare chip;
wherein the first copper block is connected with the drain of the crimping type MOSFET bare chip, and the second copper block is connected with the source of the crimping type MOSFET bare chip;
the grid connecting piece is arranged in the groove of the second copper block;
the grid connecting piece is connected with the grid of the crimping type MOSFET through the elastic structure and the rod-shaped metal;
the grid connecting piece is connected with the connecting interface and receives an external grid control signal.
Further wherein the first copper blocks comprise one or more, each of the first copper blocks being equipotential with the drain of the crimped MOSFET die, the second copper blocks comprise one or more, each of the second copper blocks being equipotential with the source of the crimped MOSFET die; and a certain pressure is formed between the first copper block and the second copper block.
Further wherein the crimp-type MOSFET die comprises a plurality and forms an array of crimp-type MOSFET dies; the shape of the grid connecting piece is correspondingly arranged according to the arrangement mode of the crimping type MOSFET bare chip array.
Further, the crimping type MOSFET bare chip array is in a ring shape or a matrix shape; when all the crimping type MSOFET dies in the array are controlled by the same gate signal, one gate connecting piece is adopted to electrically connect all the crimping type MSOFET dies; when different gate signals are used to control the crimped MSOFET dies in the array, then different gate connectors are used to electrically connect the respective crimped MSOFET dies.
Further, the grid connecting piece is connected with the grid of the crimping type MOSFET bare chip through the elastic structure and the rod-shaped metal, and the elastic structure ensures that the rod-shaped metal is reliably connected with the grid of the crimping type MOSFET.
Compared with the prior art, the press-fitting structure applied to the press-fitting type MOSFET array has the following beneficial effects:
(1) the grid structure is suitable for the crimping type MOSFET parallel array, and has a simple and compact structure.
(2) The annular or grid-shaped grid connecting piece does not influence the connection of the first copper block, the second copper block and the MOSFET, and certain pressure can be applied between the first copper block and the second copper block, so that the contact surface resistance and the thermal resistance are reduced.
(3) The grid connecting piece is connected with the MOSFET grid through the elastic structure and the rod-shaped metal, so that certain pressure can be guaranteed at the connecting part, reliable connection of the grid connecting piece is guaranteed, the grid connecting piece cannot be influenced by the pressure between the first copper block and the second copper block, and the MOSFET cannot be damaged due to overlarge pressure.
Drawings
FIG. 1: prior art crimp-type MOSFET structures;
FIG. 2: prior art MOSFET die no package structures;
FIG. 3 a: a turn-off module of a gate drive circuit of an Integrated Gate Commutated Thyristor (IGCT) in the prior art;
FIG. 3 b: a prior art drive circuit based on an emitter turn-off thyristor (ETO) of a GCT or GTO element;
FIG. 4: an embodiment structure of the gate structure of the present invention applied to a crimping type MOSFET array;
FIG. 5: the invention is applied to the structure of a grid electrode of a crimping type MOSFET array in yet another embodiment;
FIG. 6: the invention is applied to the annular crimping type MOSFET array of the crimping type MOSFET array;
FIG. 7: the invention relates to a grid connecting piece of an annular crimping type MOSFET array;
FIG. 8: the invention is applied to the matrix-shaped crimping MOSFET array of the crimping MOSFET array;
FIG. 9: the invention provides a grid connector of a matrix-shaped crimping MOSFET array.
Detailed Description
The invention is described in detail below with reference to the figures and the specific embodiments, but not as a limitation of the invention.
In one embodiment, a press-fitting overall structure of a gate structure-equipped crimp MOSFET is shown in fig. 4, and includes a first copper block 41, a crimp MOSFET42, a gate connecting member 43, a connecting interface 44 for receiving an external gate control signal, a second copper block 45, an elastic structure 46, a rod-shaped metal 47 in contact with a gate of the crimp MOSFET42, and an insulating medium 48 between the gate connecting member 43 and the second copper block 45; wherein the gate link 43 may be in the shape of a gate ring or a grid.
The first copper bump 41 is equipotential with the drain of the crimp MOSFET42, and the second copper bump 45 is equipotential with the source of the crimp MOSFET 42.
Wherein, a certain pressure is provided between the first copper block 41 and the second copper block 45, which is used to reduce the contact resistance and thermal resistance of the contact surface between the first copper block 41 and the crimp-type MOSFET 42.
The source of the crimp MOSFET42 is connected to the raised portion of the second copper block 45 by crimping or soldering.
The gate connector 43 is disposed in the groove of the second copper block 45 and is electrically insulated from the second copper block 45.
The gate connector 43 is connected with the gate of the crimp MOSFET42 through the elastic structure 46 and the rod-shaped metal 47, and the elastic structure 46 can ensure that the rod-shaped metal 47 is reliably contacted with the gate of the crimp MOSFET42, and meanwhile, the contact stress caused by the size matching problem can be avoided to be too large or too small.
The gate connector 43 is connected to a connection interface 44, such as a coaxial cable, to receive an external gate control signal.
The gate connector 43 may be a metal structure that requires electrical isolation using an insulating dielectric 48 because it is disposed in a recess in the second copper block 45. The gate connector 43 may be a circuit board having an electrical isolation function on its surface.
For the gate connection member 43 of the metal structure, the upper surface has a groove for position fixing of the bar-shaped metal 47. For the gate connecting member 43 of the circuit board, a cylindrical structure may be adopted to connect with the positioning hole of the circuit board, and then the rod-shaped metal 47 is placed in the cylindrical structure.
In one embodiment, the gate structure of the crimped MOSFET die is shown in fig. 5, and the first copper block may be the same as in fig. 4, using a separate copper block. Considering that the crimp-type MOSFET die is not affected by the package structure, the pressure is not limited to 50-100N, and therefore, as shown in fig. 5, it is also possible to use the integrated first copper block 51 and apply a large pressure, for example, several tens of kN.
Since the drain of the crimp MOSFET die 52 is above and below the crimp MOSFET die 52 with only the source and the gate, the second copper block 55 only needs to be grooved according to the shape of the gate connector 53, without any concern for electrical insulation from the drain. The connection structure of the gate connector 53 and the gate of the crimp-type MOSFET bare chip 52 is similar to that of fig. 4, and the gate connector 53 and the gate of the crimp-type MOSFET bare chip 52 are connected by the elastic structure 56 and the rod-shaped metal 57.
In fig. 5, since the first copper block 51 is directly connected to the drain of the crimp MOSFET die 52, the second copper block 55 is directly connected to the source of the crimp MOSFET die 52, and a certain pressure is applied between the first copper block 51 and the second copper block 55, the gate connecting member 53 can be configured in a ring shape or a grid shape, and only occupies a small space of the second copper block 55, so that good electrical contact can be ensured, and the thermal resistance of the MOSFET heat dissipation path to the upper and lower surfaces can be reduced.
In one embodiment, the shape of the gate connector may be designed according to the arrangement of the crimp-type MOSFET array. For a ring-type crimped MOSFET array, as shown in fig. 6, one design of the gate connection is shown in fig. 7. If the inner ring and the outer ring of the crimp type MSOFET are controlled using the same gate signal, the inner ring and the outer ring of the gate link have electrical connection, and if the control is performed using different gate signals, such as the intermediate ring, the connection is performed using different gate links. For a matrix-shaped crimp-type MOSFET array, as shown in fig. 8, if the same gate signal is used for control, one design of the gate connection is shown in fig. 9, where all crimp-type MSOFETs in the array are controlled using the same gate signal; if different grid signals are used for control, the design scheme is the same as the grid connecting piece of the annular crimping type MOSFET array.
The press-fitting structure applied to the crimping type MOSFET array has the following beneficial effects:
(1) the device is suitable for the crimping type MOSFET parallel array, and has simple and compact structure.
(2) The elastic structure provides pressure for the contact surface, reduces contact resistance, and utilizes the auxiliary elastic sheet to increase the flow area, thereby increasing the flow capacity of the whole structure.
(3) The elastic structure provides pressure for the contact surface, reduces the thermal resistance of the contact surface, and simultaneously, the copper-based circuit board is used, so that the heat dissipation capability of the whole structure is enhanced.
(4) The elastic structure can limit the upper limit value of the pressure applied to the surface of the MOSFET, so that the pressure applied between the first copper block and the second copper block is wider in range, and the application range is wider.
The above description is only a preferred embodiment of the present invention and should not be interpreted as limiting the scope of the present invention, it should be noted that those skilled in the art can make various changes and modifications without departing from the spirit of the present invention, and these changes and modifications should fall within the protection scope of the present invention.

Claims (10)

1. A gate structure applied to a crimping type MOSFET is characterized in that: the device comprises a first copper block, a crimping type MOSFET, a grid connecting piece, a connecting interface for receiving an external grid control signal, a second copper block, an elastic structure, a rod-shaped metal in contact with a grid of the crimping type MOSFET, and an insulating medium between the grid connecting piece and the second copper block;
wherein the source of the crimp-type MOSFET is connected to the convex portion of the second copper block;
the grid connecting piece is arranged in the groove of the second copper block and is electrically insulated and fixed with the second copper block through the insulating medium;
the grid connecting piece is connected with the grid of the crimping type MOSFET through the elastic structure and the rod-shaped metal;
the grid connecting piece is connected with the connecting interface, and the connecting interface receives an external grid control signal.
2. The gate structure of claim 1, wherein: wherein the first copper blocks comprise one or more, each of the first copper blocks is equipotential with a drain of the crimp-type MOSFET, the second copper blocks comprise one or more, each of the second copper blocks is equipotential with a source of the crimp-type MOSFET; and a certain pressure is formed between the first copper block and the second copper block.
3. The gate structure of claim 1, wherein: wherein the crimp-type MOSFET includes a plurality of and forms a crimp-type MOSFET array; the shape of the grid connecting piece is correspondingly arranged according to the arrangement mode of the crimping type MOSFET array.
4. The gate structure of claim 3, wherein: the crimping type MOSFET array is annular or matrix; when all the crimping type MSOFETs in the array are controlled by the same grid signal, one grid connecting piece is adopted to electrically connect all the crimping type MSOFETs; when different gate signals are used to control the crimp-type MSOFETs in the array, different gate connectors are used to electrically connect the respective crimp-type MSOFETs.
5. The gate structure of claim 1, wherein: the grid connecting piece is connected with the grid of the crimping type MOSFET through the elastic structure and the rod-shaped metal, and the elastic structure ensures that the rod-shaped metal is reliably connected with the grid of the crimping type MOSFET.
6. A gate structure applied to a crimping type MOSFET bare chip is characterized in that: the circuit comprises a first copper block, a crimping type MOSFET bare chip, a grid connecting piece, a connecting interface for receiving an external grid control signal, a second copper block, an elastic structure and a rod-shaped metal in contact with the grid of the crimping type MOSFET bare chip;
wherein the first copper block is connected with the drain of the crimping type MOSFET bare chip, and the second copper block is connected with the source of the crimping type MOSFET bare chip;
the grid connecting piece is arranged in the groove of the second copper block;
the grid connecting piece is connected with the grid of the press-connection type MOSFET bare chip through the elastic structure and the rod-shaped metal;
the grid connecting piece is connected with the connecting interface, and the connecting interface receives an external grid control signal.
7. The gate structure of claim 6, wherein: wherein the first copper blocks comprise one or more, each of the first copper blocks being equipotential with the drain of the crimp type MOSFET die, and the second copper blocks comprise one or more, each of the second copper blocks being equipotential with the source of the crimp type MOSFET die; and a certain pressure is formed between the first copper block and the second copper block.
8. The gate structure of claim 6, wherein: wherein the crimping type MOSFET bare chip comprises a plurality of bare chips and forms an array of the crimping type MOSFET bare chips; the shape of the grid connecting piece is correspondingly arranged according to the arrangement mode of the crimping type MOSFET bare chip array.
9. The gate structure of claim 8, wherein: the crimping type MOSFET bare chip array is annular or matrix-shaped; when all the crimping type MSOFET dies in the array are controlled by the same gate signal, one gate connecting piece is adopted to electrically connect all the crimping type MSOFET dies; when different gate signals are used to control the crimped MSOFET dies in the array, then different gate connectors are used to electrically connect the respective crimped MSOFET dies.
10. The gate structure of claim 6, wherein: the grid connecting piece is connected with the grid of the crimping type MOSFET bare chip through the elastic structure and the rod-shaped metal, and the elastic structure ensures that the rod-shaped metal is reliably connected with the grid of the crimping type MOSFET bare chip.
CN201810829499.5A 2017-09-01 2018-07-25 Grid structure applied to crimping type MOSFET Pending CN110767638A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201810829499.5A CN110767638A (en) 2018-07-25 2018-07-25 Grid structure applied to crimping type MOSFET
EP18850023.5A EP3678173A4 (en) 2017-09-01 2018-09-03 Electrical device and electrical apparatus
PCT/CN2018/103750 WO2019042446A1 (en) 2017-09-01 2018-09-03 Electrical device and electrical apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810829499.5A CN110767638A (en) 2018-07-25 2018-07-25 Grid structure applied to crimping type MOSFET

Publications (1)

Publication Number Publication Date
CN110767638A true CN110767638A (en) 2020-02-07

Family

ID=69328104

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810829499.5A Pending CN110767638A (en) 2017-09-01 2018-07-25 Grid structure applied to crimping type MOSFET

Country Status (1)

Country Link
CN (1) CN110767638A (en)

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