CN110545096A - Quick start circuit - Google Patents
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- CN110545096A CN110545096A CN201910821605.XA CN201910821605A CN110545096A CN 110545096 A CN110545096 A CN 110545096A CN 201910821605 A CN201910821605 A CN 201910821605A CN 110545096 A CN110545096 A CN 110545096A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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Abstract
The invention discloses a quick start circuit, and relates to the technical field of integrated circuits. The quick starting circuit comprises a level conversion module, a phase inverter module connected with the level conversion module, a first field effect transistor, a second field effect transistor and a resistor, wherein the level conversion module amplifies an input signal and outputs the amplified signal to the phase inverter module; the second field effect transistor is connected to a power supply voltage; one end of the resistor is connected to the second field effect transistor and connected to the starting voltage output end of the quick starting circuit, and the other end of the resistor is grounded; the starting voltage output end outputs starting voltage to the subsequent circuit to start the subsequent circuit, and the starting voltage output end is also connected to the input end of the level conversion module. According to the technical scheme, the starting voltage of the starting voltage output end is output to the level conversion module, so that the circuit is more reliable and is closed more timely.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a quick start circuit.
background
The power supply module is an indispensable part in the integrated circuit, and the starting speed of the power supply directly determines the response speed of the whole system. Particularly, in the case of advocating a low power consumption design, the response time of the system will be further prolonged, and the conventional starting circuit design can not meet the current design requirement.
The traditional starting circuit adopts a current-filling mode to enable the circuit to reach a normal working state, but the resistance value of the mode in low-power-consumption design is very large, the working current is very small, meanwhile, the parasitic capacitance in the circuit is larger than that of the conventional power-consumption design, the current-filling mode needs longer time to charge the parasitic capacitance in the circuit, and the current-filling mode needs longer time to complete the operation. Another problem is that the conventional start-up circuit is greatly affected by the process, and the start-up time is greatly different in different processes.
FIG. 1 is a schematic diagram of a circuit of a conventional starting circuit in the prior art, wherein the starting circuit is in a zero state before a power supply is powered on; the current IMp2 through the second PMOS transistor Mp2 after power-up is calculated by the following equation:
The voltage regulator comprises a first resistor R1, a second resistor R3936, a third resistor R5, a fourth resistor V, a;
The second PMOS transistor Mp2 and the third PMOS transistor Mp3 are in a mirror relationship, so that the currents are equal, the output voltage Vout of the start circuit charges the subsequent circuit, the zero state balance of the circuit is broken, and the circuit starts to start, and fig. 2 is a schematic diagram of the start time.
After the circuit is started, in normal operation, the feedback voltage Vb turns on the first PMOS transistor Mp1, and the current IMp1 of the first PMOS transistor Mp1 is calculated by the following equation:
Wherein, mu n is the electron mobility, Cox is the gate oxide capacitance of unit area, and Wp/Lp is the width-to-length ratio of the first PMOS tube Mp 1;
At this time, the gate voltages of the second PMOS transistor Mp2 and the third PMOS transistor Mp3 will be raised, the second PMOS transistor Mp2 and the third PMOS transistor Mp3 enter a cut-off region, and the output voltage Vout has no output current. However, the current of the first PMOS transistor Mp1 is always present, which is not suitable for low power consumption design, and the charging process time is different due to the process, which makes the individual difference of the product large.
Disclosure of Invention
The invention mainly aims to provide a quick start circuit, aiming at improving the current start speed and reducing the influence caused by the process.
in order to achieve the above object, the present invention provides a fast start circuit, which includes a level conversion module, a phase inverter module connected to the level conversion module, a first field effect transistor, a second field effect transistor, and a resistor; the level conversion module amplifies an input signal and outputs the amplified signal to the phase inverter module, and the phase inverter module sends the inverted signal to the first field effect transistor to turn on or turn off the first field effect transistor; the second field effect transistor is connected to a power supply voltage; one end of the resistor is connected to the second field effect transistor and the starting voltage output end of the quick starting circuit, and the other end of the resistor is grounded; the starting voltage output end outputs starting voltage to a subsequent circuit to start the subsequent circuit, and is also connected to the input end of the level conversion module to output the starting voltage to the level conversion module.
Preferably, the quick start circuit further comprises a third field effect transistor and a fourth field effect transistor which are connected with each other; the third field effect transistor is also connected to the second field effect transistor, so that the second field effect transistor mirrors the current of the second field effect transistor to the third field effect transistor; the third field effect transistor and the fourth field effect transistor are respectively connected with a first reference current output end and a second reference current output end and used for respectively outputting stable first reference current and stable second reference current.
Preferably, the first field effect transistor is an NMOS transistor, and the second field effect transistor, the third field effect transistor and the fourth field effect transistor are PMOS transistors.
Preferably, the source of the first field effect transistor is grounded, the drain of the first field effect transistor is connected to the gate of the second field effect transistor, and the gate of the first field effect transistor is connected to the output end of the inverter module; the output end of the level conversion module is connected with the input end of the phase inverter module; and the source electrode of the second field effect transistor is connected to a power supply voltage, the drain electrode of the second field effect transistor is connected to one end of the resistor and the starting voltage output end, and the other end of the resistor is grounded.
Preferably, the sources of the third field effect transistor and the fourth field effect transistor are connected to a power supply voltage, and the gates are connected with each other and the gate of the second field effect transistor; the drain electrode of the third field effect transistor is connected with the grid electrode of the third field effect transistor and the first reference current output end; and the drain electrode of the fourth field effect transistor is connected to the second reference current output end.
Preferably, a detection module is further connected between the starting voltage output end and the level conversion module, and the detection module outputs a detection result to the input end of the level conversion module according to the starting voltage.
preferably, the level conversion module includes a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, and a twelfth field effect transistor; the source electrodes of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor; the grid electrode of the seventh field effect transistor is connected with the grid electrode of the ninth field effect transistor and is connected to the first input end of the level conversion module, the drain electrode of the seventh field effect transistor is connected to the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected to the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded; the grid electrodes of the eighth field-effect tube and the tenth field-effect tube are connected with each other and the second input end of the level conversion module, the drain electrode of the eighth field-effect tube is connected with the drain electrode of the tenth field-effect tube, the drain electrode of the tenth field-effect tube is also connected with the grid electrode of the fifth field-effect tube, and the source electrode of the tenth field-effect tube is grounded; the grids of the eleventh field effect transistor and the twelfth field effect transistor are mutually connected and connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected to the power supply voltage, the drain electrode of the eleventh field effect transistor is connected to the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded; and the drain electrodes of the eleventh field effect transistor and the twelfth field effect transistor are connected to the output end of the level conversion module.
Preferably, the input of the first input end of the level shift module is 0, and the second input end of the level shift module is connected to the detection module.
Preferably, the level conversion module further includes a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor, a fifteenth field effect transistor, and a sixteenth field effect transistor; the source electrodes of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor; the grid electrode of the seventh field effect transistor is mutually connected with the grid electrode of the ninth field effect transistor and is connected with the drain electrodes of the thirteenth field effect transistor and the fourteenth field effect transistor and the grid electrodes of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the seventh field effect transistor is connected to the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected to the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded; the grid electrodes of the eighth field effect transistor and the tenth field effect transistor are mutually connected and are connected with the drain electrodes of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the eighth field effect transistor is connected to the drain electrode of the tenth field effect transistor, the drain electrode of the tenth field effect transistor is also connected to the gate electrode of the fifth field effect transistor, and the source electrode of the tenth field effect transistor is grounded; the grids of the eleventh field effect transistor and the twelfth field effect transistor are mutually connected and connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected to the power supply voltage, the drain electrode of the eleventh field effect transistor is connected to the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded; the drain electrodes of the eleventh field effect transistor and the twelfth field effect transistor are connected to the output end of the level conversion module; the source electrode and the grid electrode of the thirteenth field effect transistor are connected to the starting voltage output end, and the grid electrode of the thirteenth field effect transistor is also connected to the grid electrode of the fourteenth field effect transistor; the source electrode of the fourteenth field effect transistor is grounded; and the source electrode of the fifteenth field effect transistor is connected to the starting voltage output end, and the source electrode of the sixteenth field effect transistor is grounded.
preferably, the thirteenth field effect transistor, the fourteenth field effect transistor, the fifteenth field effect transistor and the sixteenth field effect transistor are all low-voltage transistors.
According to the technical scheme, the level conversion module is connected to the inverter module, and in the starting process, the outputs of the level conversion module and the inverter module only have logical relations of '0' and '1', so that the influence caused by the process can be effectively reduced; by outputting the starting voltage of the starting voltage output end to the level conversion module, the starting circuit can further determine that the output starting voltage reaches an expected output value, so that the circuit is more reliable and is closed more timely.
Drawings
FIG. 1 is a schematic diagram of a prior art start-up circuit;
FIG. 2 is a schematic diagram of the fast start circuit of the present invention;
FIG. 3 is a schematic diagram of a level shift module in the fast start circuit according to the present invention;
Fig. 4 is a schematic diagram of another embodiment of a level shifting module in a fast start circuit according to the present invention.
the implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The invention is further described below with reference to the accompanying drawings.
A fast start-up circuit, as shown in FIG. 2, comprises a level shift module, an inverter module INV connected to the level shift module, a first field effect transistor M1, a second field effect transistor M2 and a resistor R; the level conversion module amplifies an input signal and outputs the amplified signal to the inverter module INV, and the inverter module INV inverts the signal and then sends the inverted signal to the first field effect transistor M1 to turn on or off the first field effect transistor M1; the second field effect transistor M2 is connected to a power supply voltage VDD; one end of the resistor R is connected to the second field effect transistor M2 and is connected to a starting voltage output end V of the quick starting circuit, and the other end of the resistor R is grounded VSS; the starting voltage output end V outputs a starting voltage Vref to a subsequent circuit to start the subsequent circuit, and is also connected to the input end of the level conversion module to output the starting voltage Vref to the level conversion module.
The function of the level conversion module is to convert a low level into a high level voltage output. In a specific embodiment, the threshold of the input voltage (i.e. the low level voltage) of the level shift module may be set to the value of the start voltage required by the fast start circuit of the present invention, that is, when the start voltage Vref reaches the preset voltage value, the level shift module can only achieve the level shift function.
before power-on, the quick start circuit is in a zero state, and no voltage drop exists in the circuit. When the power is on, the starting voltage Vref is 0, the output of the level conversion module is 0, and 1 (namely, a high level) is output after passing through the inverter module INV, namely, the gate of the first field effect transistor M1 is a high level, the first field effect transistor M1 is turned on, so that the gate potential of the second field effect transistor M2 is 0, and is turned on and a large current is generated; when the starting voltage Vref reaches or exceeds a preset output value, the output of the level conversion module is 1, the gate of the first field effect transistor M1 is 0 after passing through the phase inverter, the second field effect transistor M2 is closed, and the circuit starts to work normally.
preferably, the quick start circuit further comprises a third field effect transistor M3 and a fourth field effect transistor M4 connected to each other; the third fet M3 is further connected to the second fet M2, so that the second fet M2 mirrors its current to the third fet M3; the third fet M3 and the fourth fet M4 are respectively connected to a first reference current output terminal and a second reference current output terminal, so as to respectively output a stable first reference current I1 and a stable second reference current I2.
After power-on, the third fet M3 and the fourth fet M4 stabilize the current of the second fet M2. When the starting voltage Vref reaches or exceeds the preset output value, the second fet M2 mirrors the current of the third fet M3, and the current of the second fet M2 is a temperature-independent current, so the starting voltage Vref is a temperature-independent voltage.
Preferably, the first fet M1 is an NMOS transistor, and the second fet M2, the third fet M3 and the fourth fet M4 are PMOS transistors.
preferably, the source of the first field effect transistor M1 is grounded VSS, the drain is connected to the gate of the second field effect transistor M2, and the gate is connected to the output end of the inverter module INV; the output end of the level conversion module is connected to the input end of the inverter module INV; the source electrode of the second field effect transistor M2 is connected to a power supply voltage VDD, the drain electrode is connected to one end of the resistor R and the starting voltage output end V, and the other end of the resistor R is grounded VSS.
Preferably, the sources of the third fet M3 and the fourth fet M4 are connected to the power supply voltage VDD, and the gates are connected to each other and to the gate of the second fet M2; the drain electrode of the third field effect transistor M3 is connected with the grid electrode thereof and the first reference current output end; the drain of the fourth field effect transistor M4 is connected to the second reference current output terminal.
Preferably, a detection module is further connected between the starting voltage output end V and the level conversion module, and the detection module outputs a detection result to an input end of the level conversion module according to the starting voltage. When the starting voltage Vref is 0 (i.e. when the circuit is not started), the output of the detection module is 0 and the output of the level conversion module is 0. When the detection module detects that the starting voltage output end V has stable output, the output of the detection module is 1, and the output of the level conversion module is 1. The detection result is output by the detection module, so that the level conversion module can more accurately convert and amplify the input signal, and the stability of the circuit is improved.
Preferably, as shown in fig. 3, the level shift module includes a fifth fet M5, a sixth fet M6, a seventh fet M7, an eighth fet M8, a ninth fet M9, a tenth fet M10, an eleventh fet M11, and a twelfth fet M12; the sources of the fifth field-effect transistor M5 and the sixth field-effect transistor M6 are connected to a power supply voltage VDD, the drain of the fifth field-effect transistor M5 is connected to the source of the seventh field-effect transistor M7, and the drain of the sixth field-effect transistor M6 is connected to the source of the eighth field-effect transistor M8; the gate of the seventh fet M7 and the gate of the ninth fet M9 are connected to each other and to the first input terminal N1 of the level shift module, the drain of the seventh fet M7 is connected to the drain of the ninth fet M9, the drain of the ninth fet M9 is further connected to the gate of the sixth fet M6, and the source of the ninth fet M9 is grounded VSS; the gates of the eighth fet M8 and the tenth fet M10 are connected to each other and to the second input terminal N2 of the level shifter module, the drain of the eighth fet M8 is connected to the drain of the tenth fet M10, the drain of the tenth fet M10 is further connected to the gate of the fifth fet M5, and the source of the tenth fet M10 is grounded VSS; the gates of the eleventh field effect transistor M11 and the twelfth field effect transistor M12 are connected to each other and to the drains of the eighth field effect transistor M8 and the tenth field effect transistor M10; the source of the eleventh fet M11 is connected to the power supply voltage VDD, the drain of the eleventh fet M11 is connected to the drain of the twelfth fet M12, and the source of the twelfth fet M12 is grounded VSS; the drains of the eleventh fet M11 and the twelfth fet M12 are connected to the output terminal Y of the level shifter module.
Preferably, the first input end N1 of the level shift module is 0, and the second input end N2 of the level shift module is connected to the detection module.
In another embodiment, as shown in fig. 3 and 4, the level shift module further includes a fifth fet M5, a sixth fet M6, a seventh fet M7, an eighth fet M8, a ninth fet M9, a tenth fet M10, an eleventh fet M11, a twelfth fet M12, a thirteenth fet M13, a fourteenth fet M14, a fifteenth fet M15, and a sixteenth fet M16; the sources of the fifth field-effect transistor M5 and the sixth field-effect transistor M6 are connected to a power supply voltage VDD, the drain of the fifth field-effect transistor M5 is connected to the source of the seventh field-effect transistor M7, and the drain of the sixth field-effect transistor M6 is connected to the source of the eighth field-effect transistor M8; the gate of the seventh fet M7 and the gate of the ninth fet M9 are connected to each other and to the drains of the thirteenth fet M13 and the fourteenth fet M14, and the gates of the fifteenth fet M15 and the sixteenth fet M16; the drain electrode of the seventh fet M7 is connected to the drain electrode of the ninth fet M9, the drain electrode of the ninth fet M9 is further connected to the gate electrode of the sixth fet M6, and the source electrode of the ninth fet M9 is grounded to VSS; the gates of the eighth fet M8 and the tenth fet M10 are connected to each other and to the drains of the fifteenth fet M15 and the sixteenth fet M16; the drain of the eighth fet M8 is connected to the drain of the tenth fet M10, the drain of the tenth fet M10 is further connected to the gate of the fifth fet M5, and the source of the tenth fet M10 is grounded to VSS; the gates of the eleventh field effect transistor M11 and the twelfth field effect transistor M12 are connected to each other and to the drains of the eighth field effect transistor M8 and the tenth field effect transistor M10; the source of the eleventh fet M11 is connected to the power supply voltage VDD, the drain of the eleventh fet M11 is connected to the drain of the twelfth fet M12, and the source of the twelfth fet M12 is grounded VSS; the drains of the eleventh field effect transistor M11 and the twelfth field effect transistor M12 are connected to the output terminal Y of the level shift module; the source and the gate of the thirteenth fet M13 are connected to the starting voltage output terminal V, and the gate of the thirteenth fet M13 is further connected to the gate of the fourteenth fet M14; a source electrode of the fourteenth field effect transistor M14 is grounded VSS; the source of the fifteenth fet M15 is connected to the start voltage output terminal V, and the source of the sixteenth fet M16 is grounded VSS.
Specifically, when the start voltage Vref gradually increases, the tenth fet M10 is turned on, and the level shift module output is 1.
preferably, the thirteenth fet M13, the fourteenth fet M14, the fifteenth fet M15 and the sixteenth fet M16 are all low-voltage tubes.
The specific working principle of the invention is as follows:
before power-on, the quick start circuit is in a zero state, and no voltage drop exists in the circuit.
When the power is on, the starting voltage Vref is 0, the output of the level conversion module is 0, the output of the inverter module INV is 1, the gate of the first field-effect transistor M1 is at a high level, the first field-effect transistor M1 is turned on, so that the gate potentials of the second field-effect transistor M2, the third field-effect transistor M3 and the fourth field-effect transistor M4 are 0, the second field-effect transistor M3, the third field-effect transistor M3 and the fourth field-effect transistor M4 are turned on, and a large current is generated, at:
(ii) a VDD is a power voltage, and Vsd is a drain-source voltage of the second fet M2.
When the starting voltage Vref rises to reach or exceed a preset output value, the output of the level conversion module is a high level, the gate of the first field effect transistor M1 is 0 after passing through the inverter module INV, the first field effect transistor M1 is turned off, the second field effect transistor M2 mirrors the first reference current I1 of the third field effect transistor M3, and the circuit starts to work normally.
according to the technical scheme, the level conversion module is connected to the inverter module, and in the starting process, the output of the level conversion module and the output of the inverter module INV have only logical relations of '0' and '1', so that the influence caused by the process can be effectively reduced; by outputting the starting voltage Vref of the starting voltage output end V to the level conversion module, the starting circuit can further determine that the output starting voltage Vref reaches an expected output value, so that the circuit is more reliable and is closed more timely.
It should be understood that the above is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures or equivalent flow transformations made by the present specification and drawings, or applied directly or indirectly to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A quick start circuit is characterized by comprising a level conversion module, an inverter module connected with the level conversion module, a first field effect transistor, a second field effect transistor and a resistor,
the level conversion module amplifies an input signal and outputs the amplified signal to the phase inverter module, and the phase inverter module sends the inverted signal to the first field effect transistor to turn on or turn off the first field effect transistor; the second field effect transistor is connected to a power supply voltage; one end of the resistor is connected to the second field effect transistor and the starting voltage output end of the quick starting circuit, and the other end of the resistor is grounded; the starting voltage output end outputs starting voltage to a subsequent circuit to start the subsequent circuit, and is also connected to the input end of the level conversion module to output the starting voltage to the level conversion module.
2. the fast start-up circuit of claim 1, further comprising a third fet and a fourth fet connected to each other; the third field effect transistor is also connected to the second field effect transistor, so that the second field effect transistor mirrors the current of the second field effect transistor to the third field effect transistor; the third field effect transistor and the fourth field effect transistor are respectively connected with a first reference current output end and a second reference current output end and used for respectively outputting stable first reference current and stable second reference current.
3. the fast start-up circuit of claim 2, wherein the first fet is an NMOS transistor, and the second fet, the third fet, and the fourth fet are PMOS transistors.
4. The fast start-up circuit of claim 3, wherein the source of the first FET is grounded, the drain of the first FET is connected to the gate of the second FET, and the gate of the first FET is connected to the output of the inverter module; the output end of the level conversion module is connected with the input end of the phase inverter module;
And the source electrode of the second field effect transistor is connected to a power supply voltage, the drain electrode of the second field effect transistor is connected to one end of the resistor and the starting voltage output end, and the other end of the resistor is grounded.
5. The fast start-up circuit of claim 4, wherein the sources of the third and fourth FETs are connected to a supply voltage, and the gates are connected to each other and to the gate of the second FET; the drain electrode of the third field effect transistor is connected with the grid electrode of the third field effect transistor and the first reference current output end; and the drain electrode of the fourth field effect transistor is connected to the second reference current output end.
6. the fast start circuit of claim 2, wherein a detection module is further connected between the start voltage output terminal and the level shift module, and the detection module outputs a detection result to the input terminal of the level shift module according to the start voltage.
7. The fast start-up circuit of claim 6, wherein the level shift module comprises a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, and a twelfth field effect transistor;
The source electrodes of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor;
The grid electrode of the seventh field effect transistor is connected with the grid electrode of the ninth field effect transistor and is connected to the first input end of the level conversion module, the drain electrode of the seventh field effect transistor is connected to the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected to the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded;
The grid electrodes of the eighth field-effect tube and the tenth field-effect tube are connected with each other and the second input end of the level conversion module, the drain electrode of the eighth field-effect tube is connected with the drain electrode of the tenth field-effect tube, the drain electrode of the tenth field-effect tube is also connected with the grid electrode of the fifth field-effect tube, and the source electrode of the tenth field-effect tube is grounded;
The grids of the eleventh field effect transistor and the twelfth field effect transistor are mutually connected and connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected to the power supply voltage, the drain electrode of the eleventh field effect transistor is connected to the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded;
And the drain electrodes of the eleventh field effect transistor and the twelfth field effect transistor are connected to the output end of the level conversion module.
8. the fast start circuit of claim 7, wherein the input of the first input terminal of the level shift module is 0, and the second input terminal of the level shift module is connected to the detection module.
9. the fast start-up circuit of claim 2, wherein the level shift module further comprises a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor, a fifteenth field effect transistor, and a sixteenth field effect transistor;
The source electrodes of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor;
The grid electrode of the seventh field effect transistor is mutually connected with the grid electrode of the ninth field effect transistor and is connected with the drain electrodes of the thirteenth field effect transistor and the fourteenth field effect transistor and the grid electrodes of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the seventh field effect transistor is connected to the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected to the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded;
The grid electrodes of the eighth field effect transistor and the tenth field effect transistor are mutually connected and are connected with the drain electrodes of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the eighth field effect transistor is connected to the drain electrode of the tenth field effect transistor, the drain electrode of the tenth field effect transistor is also connected to the gate electrode of the fifth field effect transistor, and the source electrode of the tenth field effect transistor is grounded;
The grids of the eleventh field effect transistor and the twelfth field effect transistor are mutually connected and connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected to the power supply voltage, the drain electrode of the eleventh field effect transistor is connected to the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded; the drain electrodes of the eleventh field effect transistor and the twelfth field effect transistor are connected to the output end of the level conversion module;
The source electrode and the grid electrode of the thirteenth field effect transistor are connected to the starting voltage output end, and the grid electrode of the thirteenth field effect transistor is also connected to the grid electrode of the fourteenth field effect transistor; the source electrode of the fourteenth field effect transistor is grounded; and the source electrode of the fifteenth field effect transistor is connected to the starting voltage output end, and the source electrode of the sixteenth field effect transistor is grounded.
10. The fast start-up circuit of claim 9, wherein the thirteenth fet, the fourteenth fet, the fifteenth fet, and the sixteenth fet are low voltage transistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910821605.XA CN110545096B (en) | 2019-09-02 | 2019-09-02 | Quick starting circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910821605.XA CN110545096B (en) | 2019-09-02 | 2019-09-02 | Quick starting circuit |
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| CN114487757A (en) * | 2022-04-14 | 2022-05-13 | 长沙丹芬瑞电气技术有限公司 | Detection apparatus for field effect transistor health status and power supply |
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| CN110545096B (en) | 2023-09-15 |
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