CN110399323A - A kind of high-speed information channel based on SRIO - Google Patents
A kind of high-speed information channel based on SRIO Download PDFInfo
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- CN110399323A CN110399323A CN201910701287.3A CN201910701287A CN110399323A CN 110399323 A CN110399323 A CN 110399323A CN 201910701287 A CN201910701287 A CN 201910701287A CN 110399323 A CN110399323 A CN 110399323A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0002—Serial port, e.g. RS232C
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Abstract
A kind of high-speed information channel based on SRIO is related to the monitoring field of the in-orbit health operation of satellite.Solve the problems, such as using CPU+FPGA framework realize high-speed information channel structure is complicated and transmission rate is low.Including information process unit board and data storage cell board;When high-speed information channel is in data storing work mode, information process unit board is for generating write request configuration parameter, and the data packet of SRIO agreement is converted by write request configuration parameter and according to the data to be stored that write request configuration parameter is extracted, the data packet of the SRIO agreement is stored to data storage cell board;When high-speed information channel is in reading data operating mode, for generating read request configuration parameter, and according to read request configuration parameter, reading and converting is the data packet of SRIO agreement to information process unit board from the corresponding position of data storage cell board.Present invention is mainly applied in satellite Orbital detection system.
Description
Technical field
The present invention relates to the monitoring fields of the in-orbit health operation of satellite.
Background technique
Moonlet long-term work is in space environment, a variety of skies such as high energy charged particles, earth magnetic field, solar electromagnetic radiation
Between environmental factor its health condition moment in orbit is had an impact.Therefore, satellite in orbit when, need by defending
Star Orbital detection system carries out Orbital detection to it, and to satellite, state is monitored in orbit, to be managed to satellite
Control.
Information process unit and data storage cell are the essential component parts of satellite Orbital detection system, and the two
High-speed information channel is constituted, information process unit collected data need to be carried out with fault diagnosis and system health manages correlometer
It calculates;Data storage cell then needs the memory space of building large capacity, stores initial data and diagnostic result.
With the raising of satellite system computing capability and the increase of design complexities, between the communication speed unit in system
Rate also require it is higher and higher, while also want in data transmission procedure the software resource of few as far as possible occupancy processing system and when
Between, to carry out more other tasks.Therefore, in satellite Orbital detection system, by information process unit and data storage cell structure
The high-speed information channel built realizes the zero access of data between unit, guarantee its satellite in orbit when, to what is monitored
Data are handled in real time.
In the design of some On-Star systems, it is all based on information process unit board and data storage cell board
The framework of CPU+FPGA is realized, and realizes data using cpci bus and SpaceWire bus between CPU and FPGA on each board
Communication, and cpci bus and SapceWire bus transfer rate are slower, cause the defeated rate of each unit board upload low, finally
Cause the high-speed information channel transmission rate being made of information process unit board and data storage cell board low.Another party
Face, the framework of this CPU+FPGA also brings along the problem that board structure is responsible for and system power is high, In on each unit board
If can not radiate in time in the vacuum environment of satellite operation, the potential hidden danger of manufacture in orbit of satellite may be given.Therefore,
Problem above urgent need to resolve.
Summary of the invention
The present invention is that structure is complicated and transmission rate in order to solve to use the framework realization high-speed information channel of CPU+FPGA
Low problem, the present invention provides a kind of high-speed information channels based on SRIO.
A kind of high-speed information channel based on SRIO, including information process unit board and data storage cell board, and
Data interaction is carried out between the two;
High-speed information channel includes two kinds of operating modes according to data transfer direction, is respectively as follows: data storing work mode
With data read work mode;
When high-speed information channel is in data storing work mode, information process unit board is matched for generating write request
Parameter is set, and is converted into SRIO agreement by write request configuration parameter and according to the data to be stored that write request configuration parameter is extracted
Data packet, the data packet of the SRIO agreement is stored to data storage cell board;
When high-speed information channel is in reading data operating mode, information process unit board is matched for generating read request
Parameter is set, and reading and converting is SRIO agreement from the corresponding position of data storage cell board according to read request configuration parameter
Data packet.
Preferably, information process unit board includes DDR memory modules, No. 1 main control unit and No. 1 mother daughter board connector,
Wherein, No. 1 main control unit includes processing module, dma module, No. 1 FIFO cache module, No. 2 FIFO cache modules and SRIO hair
Play end module;
Data storage cell board includes No. 2 mother daughter board connectors, No. 2 main control units and multiple FLASH modules, wherein No. 2
Main control unit includes SRIO target end module, No. 3 FIFO cache modules, No. 4 FIFO cache modules, FLASH Read-write Catrol module;
(1) when high-speed information channel is in data storing work mode, information process unit board is asked for generating to write
Configuration parameter is sought, and is converted into SRIO by write request configuration parameter and according to the data to be stored that write request configuration parameter is extracted
The data packet of agreement stores the data packet of the SRIO agreement to the detailed process of data storage cell board are as follows:
Processing module is configured for data volume size, storage address, the write request affairs to data to be stored, and
The write request configuration parameter of acquisition is sent to SRIO and initiates end module, is also used to according to write request configuration parameter from DDR memory
Data to be stored is read in module, and the data of reading are cached by dma module into No. 1 FIFO cache module;
SRIO initiates end module, and write request configuration parameter reads data from No. 1 FIFO cache module based on the received, and
After converting the data packet of SRIO agreement for the data of received write request configuration parameter and reading, passes sequentially through and connect between No. 1 plate
It connects device and No. 2 mother daughter board connectors is sent to SRIO target end module;
The data packet for the SRIO agreement that the docking of SRIO target end module is received is decoded, and obtains write request configuration parameter sum number
It is believed that breath, and write request configuration parameter is sent to FLASH Read-write Catrol module, data information caches to No. 3 FIFO and caches moulds
Block, FLASH Read-write Catrol module read data from No. 3 FIFO cache modules according to the write request configuration parameter received, and
The data of reading are stored into corresponding FLASH module according to write request configuration parameter, so as to complete high-speed information channel pair
The storage work of data;
(2) when high-speed information channel is in reading data operating mode, information process unit board is read to ask for generating
Configuration parameter is sought, and reading and converting is SRIO association from the corresponding position of data storage cell board according to read request configuration parameter
The detailed process of the data packet of view are as follows:
Processing module is configured for the data volume size to data to be read, reading address, read request transaction, and
The read request configuration parameter of acquisition is sent to SRIO and initiates end module, SRIO initiates end module and received read request is configured ginseng
After number is converted into the data packet of SRIO agreement, passes sequentially through No. 1 mother daughter board connector and No. 2 mother daughter board connectors are sent to SRIO target
End module;
The data packet for the SRIO agreement that the docking of SRIO target end module is received is decoded, and obtains read request configuration parameter, and
Read request configuration parameter is sent to FLASH Read-write Catrol module;
Read request configuration parameter reads data from corresponding FLASH module to FLASH Read-write Catrol module based on the received, and
By the data buffer storage of reading into No. 4 FIFO cache modules, SRIO target end module is according to read request configuration parameter from No. 4 FIFO
Data are read in cache module, and convert the data of reading to the data packet of SRIO agreement, pass sequentially through No. 2 mother daughter board connectors
SRIO, which is sent to, with No. 1 mother daughter board connector initiates end module;
The data packet that SRIO initiates the SRIO agreement that end module docking is received is decoded, and will according to read request configuration parameter
Decoded data buffer storage is into No. 2 FIFO cache modules;
Processing module passes through dma module according to read request configuration parameter and reads data from No. 2 FIFO cache modules, and will
The data of reading are stored into DDR memory modules, so as to complete high-speed information channel to the read work of data.
Preferably, it includes originating end control module and No. 1 SRIO protocol translation module that SRIO, which initiates end module,;
When high-speed information channel is in data storing work mode, originating end control module, for according to processing module
The write request configuration parameter of offer reads data from No. 1 FIFO cache module, and read data and write request are matched
It sets after parameter packages, is sent to No. 1 SRIO protocol translation module, No. 1 SRIO protocol translation module is by the data after group packet
It is converted into the data packet of SRIO agreement, and passes sequentially through No. 1 mother daughter board connector and No. 2 mother daughter board connectors are sent to SRIO target side
Module;
When high-speed information channel is in reading data operating mode, originating end control module is used to provide processing module
Read request configuration parameter package after, be sent to No. 1 SRIO protocol translation module, No. 1 SRIO protocol translation module is by group
Data after packet are converted into the data packet of SRIO agreement, and pass sequentially through No. 1 mother daughter board connector and No. 2 mother daughter board connectors are sent to
SRIO target end module;
When high-speed information channel is in reading data operating mode, No. 1 SRIO protocol translation module is also used to successively lead to
It crosses No. 2 mother daughter board connectors and No. 1 mother daughter board connector receives the data packet of the SRIO agreement issued from SRIO target end module, and is right
The data packet of the SRIO agreement is decoded, and decoded data are sent to originating end control module, and originating end controls mould
Root tuber according to read request configuration parameter by decoded data buffer storage into No. 2 FIFO cache modules.
Preferably, SRIO target end module includes target side control module and No. 2 SRIO protocol translation modules;
When high-speed information channel is in data storing work mode, No. 2 SRIO protocol translation modules pass sequentially through No. 2 plates
Between connector and No. 1 mother daughter board connector receive the data packet that SRIO initiates the SRIO agreement that end module issues, and to received
The data packet of SRIO agreement is decoded, and obtains write request configuration parameter and data information, and by the write request configuration parameter and
Data information is sent to target side control module, and target side control module is according to write request configuration parameter by received data information
It caches into No. 3 FIFO cache modules, meanwhile, write request configuration parameter is also sent to FLASH read-write by target side control module
Control module;
When high-speed information channel is in reading data operating mode, No. 2 SRIO protocol translation modules pass sequentially through No. 2 plates
Between connector and No. 1 mother daughter board connector receive the data packet that SRIO initiates the SRIO agreement that end module issues, and to received
The data packet of SRIO agreement is decoded, and obtains read request configuration parameter, and read request configuration parameter is controlled by target side
Module is sent to FLASH Read-write Catrol module;
When high-speed information channel is in reading data operating mode, target side control module is also used to be matched according to read request
It sets parameter and reads data from No. 4 FIFO cache modules, and be sent to No. 2 SRIO agreements after the data of reading are packaged and turn
Change module, No. 2 SRIO protocol translation modules are also used to the data organized after wrapping switching to the data packet of SRIO agreement, and pass sequentially through
No. 2 mother daughter board connectors and No. 1 mother daughter board connector are sent to SRIO and initiate end module.
Preferably, No. 2 mother daughter board connectors and No. 1 mother daughter board connector are0.8mm type connector.
The invention has the beneficial effects that
First, a kind of high-speed information channel based on SRIO proposed by the present invention be by two pieces of independent boards i.e.: information
What processing unit board and data storage cell board were realized, structure is simple.
Second, the information communication between information process unit board and data storage cell board is based on serial Rapid
IOSerial Rapid IO, SRIO agreement is designed, and SRIO agreement has packaging efficiency height, and software resource occupies few etc. excellent
Point, message transmission rate with higher, therefore, information process unit board and data storage cell board are by number to be transmitted
According to the data packet for being packaged into SRIO agreement so that data processing speed on each board is high, and between board data transmission speed
Rate is high;
Third, data storage cell board are to be individually present, therefore, can be by increasing data to the extension of memory space
The quantity of storage unit board is realized, to realize the extension to memory space, cut.
Detailed description of the invention
Fig. 1 is a kind of schematic illustration of the high-speed information channel based on SRIO of the present invention;
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art without making creative work it is obtained it is all its
Its embodiment, shall fall within the protection scope of the present invention.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The present invention will be further explained below with reference to the attached drawings and specific examples, but not as the limitation of the invention.
Illustrate present embodiment referring to Fig. 1, a kind of high-speed information channel based on SRIO described in present embodiment, including
Information process unit board 100 and data storage cell board 200, and data interaction is carried out between the two;
High-speed information channel includes two kinds of operating modes according to data transfer direction, is respectively as follows: data storing work mode
With data read work mode;
When high-speed information channel is in data storing work mode, information process unit board 100 is asked for generating to write
Configuration parameter is sought, and is converted into SRIO by write request configuration parameter and according to the data to be stored that write request configuration parameter is extracted
The data packet of agreement stores the data packet of the SRIO agreement to data storage cell board 200;
When high-speed information channel is in reading data operating mode, information process unit board 100 is read to ask for generating
Configuration parameter is sought, and reading and converting is from the corresponding position of data storage cell board 200 according to read request configuration parameter
The data packet of SRIO agreement.
The present invention proposes a kind of high-speed information channel based on SRIO, wherein information process unit board 100 and data are deposited
Information channel between storage unit board 200 is based on serial Rapid IO (Serial Rapid IO, SRIO) agreement and is designed,
SRIO agreement has many advantages, such as that packaging efficiency height, software resource occupy few, message transmission rate with higher, and data storage is single
First board 200 is to be individually present, and therefore, can pass through the number of increase data storage cell board 200 to the extension of memory space
Amount is to realize, to realize the extension to memory space, cut.
When the initial data obtained from house keeping computer and bus and treated result needs to store when, at information
Reason unit board 100 is responsible for sending instruction (configuration parameter) and data are stored to data storage cell board 200;Work as information
When processing unit board 100 needs to be handled from the reading of data storage cell board 200 data, information process unit board
100 send command adapted thereto (configuration parameter) to data storage cell board 200, and to the number in data storage cell board 200
According to being read out, data storage cell board 200 then need the information that information process unit board 100 is sent carry out parsing with
Corresponding storage and read functions are realized in interpretation.
Illustrate this preferred embodiment referring to Fig. 1, in this preferred embodiment,
Information process unit board 100 includes 110, No. 1 main control unit 120 and No. 1 mother daughter board connectors of DDR memory modules
130, wherein No. 1 main control unit 120 includes processing module 121, the FIFO cache module 123,2 of dma module 122,1 FIFO
Cache module 124 and SRIO initiate end module 125;
Data storage cell board 200 includes 210, No. 2 main control units 220 of No. 2 mother daughter board connectors and multiple FLASH modules
230, wherein No. 2 main control units 220 include that the FIFO of FIFO cache module 222,4 of SRIO target end module 221,3 caches mould
Block 223, FLASH Read-write Catrol module 224;
(1) when high-speed information channel is in data storing work mode, information process unit board 100 is for generating
Write request configuration parameter, and be converted by write request configuration parameter and according to the data to be stored that write request configuration parameter is extracted
The data packet of SRIO agreement stores the data packet of the SRIO agreement to the detailed process of data storage cell board 200 are as follows:
Processing module 121 is configured for data volume size, storage address, the write request affairs to data to be stored,
And the write request configuration parameter of acquisition is sent to SRIO and initiates end module 125, it is also used to according to write request configuration parameter from DDR
Data to be stored is read in memory modules 110, and the data of reading are cached by dma module 122 to No. 1 FIFO cache module
In 123;
SRIO initiates end module 125, and write request configuration parameter reads number from No. 1 FIFO cache module 123 based on the received
According to, and after converting the data packet of SRIO agreement for the data of received write request configuration parameter and reading, pass sequentially through No. 1 plate
Between connector 130 and No. 2 mother daughter board connector 210 be sent to SRIO target end module 221;
SRIO target end module 221 is decoded the data packet of received SRIO agreement, obtains write request configuration parameter
And data information, and write request configuration parameter is sent to FLASH Read-write Catrol module 224, data information is cached to No. 3 FIFO
Cache module 222, FLASH Read-write Catrol module 224 is according to the write request configuration parameter received from No. 3 FIFO cache modules
Data are read in 222, and are stored the data of reading into corresponding FLASH module 230 according to write request configuration parameter, thus complete
Storage work at high-speed information channel to data;
(2) when high-speed information channel is in reading data operating mode, information process unit board 100 is for generating
Read request configuration parameter, and according to read request configuration parameter from the corresponding position of data storage cell board 200 reading and converting
For the detailed process of the data packet of SRIO agreement are as follows:
Processing module 121 is configured for the data volume size to data to be read, reading address, read request transaction,
And the read request configuration parameter of acquisition is sent to SRIO and initiates end module 125, SRIO, which initiates end module 125, asks received reading
After asking configuration parameter to be converted into the data packet of SRIO agreement, No. 1 mother daughter board connector 130 and No. 2 mother daughter board connector 210 is passed sequentially through
It is sent to SRIO target end module 221;
SRIO target end module 221 is decoded the data packet of received SRIO agreement, obtains read request configuration parameter,
And read request configuration parameter is sent to FLASH Read-write Catrol module 224;
Read request configuration parameter is read FLASH Read-write Catrol module 224 from corresponding FLASH module 230 based on the received
Data, and by the data buffer storage of reading into No. 4 FIFO cache modules 223, SRIO target end module 221 is configured according to read request
Parameter reads data from No. 4 FIFO cache modules 223, and converts the data of reading to the data packet of SRIO agreement, successively
SRIO, which is sent to, by No. 2 mother daughter board connector 210 and No. 1 mother daughter board connectors 130 initiates end module 125;
SRIO initiates end module 125 and is decoded to the data packet of received SRIO agreement, and is configured and joined according to read request
Number is by decoded data buffer storage into No. 2 FIFO cache modules 124;
Processing module 121 is read from No. 2 FIFO cache modules 124 according to read request configuration parameter by dma module 122
Data, and the data of reading are stored into DDR memory modules 110, the reading so as to complete high-speed information channel to data
Work.
In this preferred embodiment, the specific of information process unit board 100 and data storage cell board 200 is given
Structure, and two board structures are simply easy to implement.When concrete application, since data storage cell board 200 is independent design
, connection type is connect using connector stack between plate, therefore, the quantity and increasing of increase data storage cell board 200 can be passed through
Add the number of FLASH module 230 on data storage cell board 200 to improve the memory space of system, realizes to memory space
Extension, cut.
In this preferred embodiment, when high-speed information channel is in data storing work mode, SRIO initiates end module
125 data packets for being converted into SRIO agreement include write request configuration parameter and data to be stored, wherein write request configuration parameter packet
The data volume size, storage address and write request affairs for including data to be stored, can accurately find wait store according to storage address
The storage address of data.
When high-speed information channel is in reading data operating mode, SRIO initiates end module 125 and is converted into SRIO agreement
Data packet only include read request configuration parameter, and read request configuration parameter includes the data volume size of data to be read, reads
Take address and read request transaction;
When high-speed information channel is in reading data operating mode, SRIO target end module 221 assists received SRIO
The data packet of view is decoded, and read request configuration parameter is obtained, at this point, read request configuration parameter includes the data of data to be read
It measures size, read address and read request transaction, can accurately find the address of data to be read according to address is read.
When high-speed information channel is in reading data operating mode, SRIO target end module 221 turns the data of reading
For the data packet of SRIO agreement, at this point, the only number comprising being read from corresponding FLASH module 230 in the data packet of SRIO agreement
According to.
The full name in English Flash memory of FLASH, translator of Chinese is flash memory;
The full name in English First Input First Output of FIFO, translator of Chinese are as follows: First Input First Output;
The full name in English Direct Memory Access of DMA, translator of Chinese are as follows: direct memory access;
Illustrate this preferred embodiment referring to Fig. 1, in this preferred embodiment, it includes initiating that SRIO, which initiates end module 125,
Hold control module 125-1 and No. 1 SRIO protocol translation module 125-2;
When high-speed information channel is in data storing work mode, originating end control module 125-1, for according to processing
The write request configuration parameter that module 121 provides reads data from No. 1 FIFO cache module 123, and by read data with
And after write request configuration parameter packages, it is sent to No. 1 SRIO protocol translation module 125-2, No. 1 SRIO protocol translation module
The data after group packet are converted the data packet of SRIO agreement by 125-2, and passes sequentially through between No. 1 mother daughter board connector 130 and No. 2 plate
Connector 210 is sent to SRIO target end module 221;
When high-speed information channel is in reading data operating mode, originating end control module 125-1 is used for processing mould
After the read request configuration parameter that block 121 provides packages, it is sent to No. 1 SRIO protocol translation module 125-2, No. 1 SRIO association
The data after group packet are converted the data packet of SRIO agreement by view conversion module 125-2, and passes sequentially through No. 1 mother daughter board connector
130 and No. 2 mother daughter board connectors 210 are sent to SRIO target end module 221;
When high-speed information channel is in reading data operating mode, No. 1 SRIO protocol translation module 125-2 be also used to according to
The secondary SRIO agreement for passing through No. 2 receptions of mother daughter board connector 210 and No. 1 mother daughter board connectors 130 and being issued from SRIO target end module 221
Data packet, and the data packet of the SRIO agreement is decoded, and decoded data are sent to originating end control module
Decoded data buffer storage to No. 2 FIFO is cached mould according to read request configuration parameter by 125-1, originating end control module 125-1
In block 124.
Illustrate this preferred embodiment referring to Fig. 1, in this preferred embodiment, SRIO target end module 221 includes target
Hold control module 221-1 and No. 2 SRIO protocol translation module 221-2;
When high-speed information channel is in data storing work mode, No. 2 SRIO protocol translation module 221-2 are passed sequentially through
No. 2 mother daughter board connector 210 and No. 1 mother daughter board connectors 130 receive the data that SRIO initiates the SRIO agreement that end module 125 issues
Packet, and the data packet of received SRIO agreement is decoded, write request configuration parameter and data information are obtained, and this is write and is asked
Configuration parameter and data information is asked to be sent to target side control module 221-1, target side control module 221-1 matches according to write request
Parameter is set to cache received data information into No. 3 FIFO cache modules 222, meanwhile, target side control module 221-1 will also
Write request configuration parameter is sent to FLASH Read-write Catrol module 224;
When high-speed information channel is in reading data operating mode, No. 2 SRIO protocol translation module 221-2 are passed sequentially through
No. 2 mother daughter board connector 210 and No. 1 mother daughter board connectors 130 receive the data that SRIO initiates the SRIO agreement that end module 125 issues
Packet, and the data packet of received SRIO agreement is decoded, read request configuration parameter is obtained, and read request configuration parameter is led to
It crosses target side control module 221-1 and is sent to FLASH Read-write Catrol module 224;
When high-speed information channel is in reading data operating mode, target side control module 221-1 is also used to according to reading
Request configuration parameter reads data from No. 4 FIFO cache modules 223, and No. 2 are sent to after the data of reading are packaged
SRIO protocol translation module 221-2, No. 2 SRIO protocol translation module 221-2 are also used to organize the data after wrapping and switch to SRIO association
The data packet of view, and pass sequentially through No. 2 mother daughter board connector 210 and No. 1 mother daughter board connectors 130 and be sent to SRIO initiation end module
125。
Illustrate this preferred embodiment referring to Fig. 1, in this preferred embodiment, No. 2 mother daughter board connectors 210 and 1
Number mother daughter board connector 130 is0.8mm type connector.
In this preferred embodiment, connector occupancy is small in size, and the transmission rate maximum of support is up to 12Gb/s.Arbitrarily
The transmitting of power supply and the transmission of high-rate information transmission channel data are realized between two plates by connector.
Although describing the present invention herein with reference to specific embodiment, it should be understood that, these realities
Apply the example that example is only principles and applications.It should therefore be understood that can be carried out to exemplary embodiment
Many modifications, and can be designed that other arrangements, without departing from spirit of the invention as defined in the appended claims
And range.It should be understood that different appurtenances can be combined by being different from mode described in original claim
Benefit requires and feature described herein.It will also be appreciated that the feature in conjunction with described in separate embodiments can be used
Other embodiments.
Claims (5)
1. a kind of high-speed information channel based on SRIO, which is characterized in that deposited including information process unit board (100) and data
Storage unit board (200), and data interaction is carried out between the two;
High-speed information channel includes two kinds of operating modes according to data transfer direction, is respectively as follows: data storing work mode sum number
According to read work mode;
When high-speed information channel is in data storing work mode, information process unit board (100) is for generating write request
Configuration parameter, and SRIO association is converted by write request configuration parameter and according to the data to be stored that write request configuration parameter is extracted
The data packet of view stores the data packet of the SRIO agreement to data storage cell board (200);
When high-speed information channel is in reading data operating mode, information process unit board (100) is for generating read request
Configuration parameter, and reading and converting is from the corresponding position of data storage cell board (200) according to read request configuration parameter
The data packet of SRIO agreement.
2. a kind of high-speed information channel based on SRIO according to claim 1, which is characterized in that
Information process unit board (100) includes DDR memory modules (110), No. 1 main control unit (120) and No. 1 mother daughter board connector
(130), wherein No. 1 main control unit (120) includes processing module (121), dma module (122), No. 1 FIFO cache module
(123), No. 2 FIFO cache modules (124) and SRIO initiate end module (125);
Data storage cell board (200) includes No. 2 mother daughter board connectors (210), No. 2 main control units (220) and multiple FLASH moulds
Block (230), wherein No. 2 main control units (220) include SRIO target end module (221), No. 3 FIFO cache modules (222), No. 4
FIFO cache module (223), FLASH Read-write Catrol module (224);
(1) when high-speed information channel is in data storing work mode, information process unit board (100) is write for generating
Configuration parameter is requested, and is converted by write request configuration parameter and according to the data to be stored that write request configuration parameter is extracted
The data packet of SRIO agreement stores the data packet of the SRIO agreement to the detailed process of data storage cell board (200) are as follows:
Processing module (121) is configured for data volume size, storage address, the write request affairs to data to be stored, and
The write request configuration parameter of acquisition is sent to SRIO and initiates end module (125), is also used to according to write request configuration parameter from DDR
Data to be stored is read in memory modules (110), and the data of reading are cached by dma module (122) to No. 1 FIFO and are cached
In module (123);
SRIO initiates end module (125), and write request configuration parameter reads number from No. 1 FIFO cache module (123) based on the received
According to, and after converting the data packet of SRIO agreement for the data of received write request configuration parameter and reading, pass sequentially through No. 1 plate
Between connector (130) and No. 2 mother daughter board connectors (210) be sent to SRIO target end module (221);
SRIO target end module (221) is decoded the data packet of received SRIO agreement, obtain write request configuration parameter and
Data information, and write request configuration parameter is sent to FLASH Read-write Catrol module (224), data information is cached to No. 3 FIFO
Cache module (222), FLASH Read-write Catrol module (224) cache mould from No. 3 FIFO according to the write request configuration parameter received
Data are read in block (222), and are stored the data of reading into corresponding FLASH module (230) according to write request configuration parameter,
Storage work so as to complete high-speed information channel to data;
(2) when high-speed information channel is in reading data operating mode, information process unit board (100) is read for generating
Request configuration parameter, and according to read request configuration parameter from the corresponding position of data storage cell board (200) reading and converting
For the detailed process of the data packet of SRIO agreement are as follows:
Processing module (121) is configured for the data volume size to data to be read, reading address, read request transaction, and
The read request configuration parameter of acquisition is sent to SRIO and initiates end module (125), SRIO initiates end module (125) for received reading
After request configuration parameter is converted into the data packet of SRIO agreement, passes sequentially through and connected between No. 1 mother daughter board connector (130) and No. 2 plates
Device (210) is sent to SRIO target end module (221);
SRIO target end module (221) is decoded the data packet of received SRIO agreement, obtains read request configuration parameter, and
Read request configuration parameter is sent to FLASH Read-write Catrol module (224);
Read request configuration parameter is read FLASH Read-write Catrol module (224) from corresponding FLASH module (230) based on the received
Data, and by the data buffer storage of reading into No. 4 FIFO cache modules (223), SRIO target end module (221) is according to read request
Configuration parameter reads data from No. 4 FIFO cache modules (223), and converts the data of reading to the data of SRIO agreement
Packet, passes sequentially through No. 2 mother daughter board connectors (210) and No. 1 mother daughter board connector (130) is sent to SRIO and initiates end module (125);
SRIO initiates end module (125) and is decoded to the data packet of received SRIO agreement, and according to read request configuration parameter
By decoded data buffer storage into No. 2 FIFO cache modules (124);
Processing module (121) is read from No. 2 FIFO cache modules (124) according to read request configuration parameter by dma module (122)
Access evidence, and the data of reading are stored into DDR memory modules (110), so as to complete high-speed information channel to data
Read work.
3. a kind of high-speed information channel based on SRIO according to claim 2, which is characterized in that SRIO initiates end module
It (125) include originating end control module (125-1) and No. 1 SRIO protocol translation module (125-2);
When high-speed information channel is in data storing work mode, originating end control module (125-1), for according to processing mould
The write request configuration parameter that block (121) provides reads data from No. 1 FIFO cache module (123), and by read data
And after write request configuration parameter packages, it is sent to No. 1 SRIO protocol translation module (125-2), No. 1 SRIO protocol translation
The data after group packet are converted the data packet of SRIO agreement by module (125-2), and passes sequentially through No. 1 mother daughter board connector (130)
SRIO target end module (221) is sent to No. 2 mother daughter board connectors (210);
When high-speed information channel is in reading data operating mode, originating end control module (125-1) is used for processing module
(121) after the read request configuration parameter provided packages, No. 1 SRIO protocol translation module (125-2), No. 1 SRIO are sent to
The data after group packet are converted the data packet of SRIO agreement by protocol translation module (125-2), and passes sequentially through and connect between No. 1 plate
Device (130) and No. 2 mother daughter board connectors (210) are sent to SRIO target end module (221);
When high-speed information channel is in reading data operating mode, No. 1 SRIO protocol translation module (125-2) is also used to successively
The SRIO issued from SRIO target end module (221) is received by No. 2 mother daughter board connectors (210) and No. 1 mother daughter board connector (130)
The data packet of agreement, and the data packet of the SRIO agreement is decoded, and decoded data are sent to originating end control
Module (125-1), originating end control module (125-1) is according to read request configuration parameter by decoded data buffer storage to No. 2
In FIFO cache module (124).
4. a kind of high-speed information channel based on SRIO according to claim 1, which is characterized in that SRIO target end module
It (221) include target side control module (221-1) and No. 2 SRIO protocol translation modules (221-2);
When high-speed information channel is in data storing work mode, No. 2 SRIO protocol translation modules (221-2) pass sequentially through 2
Number mother daughter board connector (210) and No. 1 mother daughter board connector (130) receive SRIO and initiate SRIO agreement that end module (125) issue
Data packet, and the data packet of received SRIO agreement is decoded, write request configuration parameter and data information are obtained, and should
Write request configuration parameter and data information are sent to target side control module (221-1), target side control module (221-1) basis
Write request configuration parameter caches received data information into No. 3 FIFO cache modules (222), meanwhile, target side controls mould
Write request configuration parameter is also sent to FLASH Read-write Catrol module (224) by block (221-1);
When high-speed information channel is in reading data operating mode, No. 2 SRIO protocol translation modules (221-2) pass sequentially through 2
Number mother daughter board connector (210) and No. 1 mother daughter board connector (130) receive SRIO and initiate SRIO agreement that end module (125) issue
Data packet, and the data packet of received SRIO agreement is decoded, read request configuration parameter is obtained, and read request is configured and is joined
Number is sent to FLASH Read-write Catrol module (224) by target side control module (221-1);
When high-speed information channel is in reading data operating mode, target side control module (221-1) is also used to be asked according to reading
It asks configuration parameter to read data from No. 4 FIFO cache modules (223), and is sent to No. 2 after the data of reading are packaged
SRIO protocol translation module (221-2), No. 2 SRIO protocol translation modules (221-2) are also used to switch to the data organized after wrapping
The data packet of SRIO agreement, and pass sequentially through No. 2 mother daughter board connectors (210) and No. 1 mother daughter board connector (130) is sent to SRIO hair
It rises end module (125).
5. a kind of high-speed information channel based on SRIO according to claim 2, which is characterized in that between No. 2 plates
Connector (210) and No. 1 mother daughter board connector (130) are0.8mm type connector.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111413561A (en) * | 2020-03-24 | 2020-07-14 | 哈尔滨工业大学 | Power supply ripple simulation system with state monitoring function |
CN114268676A (en) * | 2021-11-29 | 2022-04-01 | 北京中科晶上科技股份有限公司 | SRIO-based deframer and satellite communication system |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1538302A (en) * | 2003-04-08 | 2004-10-20 | ���µ�����ҵ��ʽ���� | Information processing device, memory information processing method and program |
CN101527662A (en) * | 2009-04-09 | 2009-09-09 | 中兴通讯股份有限公司 | Method for optimizing high-speed channel and device thereof |
CN106909525A (en) * | 2017-01-13 | 2017-06-30 | 电子科技大学 | A kind of control Switching Module based on VPX buses |
CN206876863U (en) * | 2017-06-08 | 2018-01-12 | 山东超越数控电子股份有限公司 | A kind of configurable high-speed record board |
CN108563607A (en) * | 2018-04-13 | 2018-09-21 | 成都赫尔墨斯科技股份有限公司 | A kind of device and method for improving communication and processing speed in avionics system |
CN109298403A (en) * | 2018-11-29 | 2019-02-01 | 中国电子科技集团公司第二十七研究所 | A kind of igh-speed wire-rod production line and beam control device and method |
CN209118265U (en) * | 2018-12-27 | 2019-07-16 | 中科院计算技术研究所南京移动通信与计算创新研究院 | A kind of high speed magnanimity Flash memory module based on VPX |
US20190220423A1 (en) * | 2018-01-18 | 2019-07-18 | Nxp Usa, Inc. | Method for Reordering Out of Order Responses from Decomposed Requests in Bridge IP |
-
2019
- 2019-07-31 CN CN201910701287.3A patent/CN110399323B/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1538302A (en) * | 2003-04-08 | 2004-10-20 | ���µ�����ҵ��ʽ���� | Information processing device, memory information processing method and program |
CN101527662A (en) * | 2009-04-09 | 2009-09-09 | 中兴通讯股份有限公司 | Method for optimizing high-speed channel and device thereof |
CN106909525A (en) * | 2017-01-13 | 2017-06-30 | 电子科技大学 | A kind of control Switching Module based on VPX buses |
CN206876863U (en) * | 2017-06-08 | 2018-01-12 | 山东超越数控电子股份有限公司 | A kind of configurable high-speed record board |
US20190220423A1 (en) * | 2018-01-18 | 2019-07-18 | Nxp Usa, Inc. | Method for Reordering Out of Order Responses from Decomposed Requests in Bridge IP |
CN108563607A (en) * | 2018-04-13 | 2018-09-21 | 成都赫尔墨斯科技股份有限公司 | A kind of device and method for improving communication and processing speed in avionics system |
CN109298403A (en) * | 2018-11-29 | 2019-02-01 | 中国电子科技集团公司第二十七研究所 | A kind of igh-speed wire-rod production line and beam control device and method |
CN209118265U (en) * | 2018-12-27 | 2019-07-16 | 中科院计算技术研究所南京移动通信与计算创新研究院 | A kind of high speed magnanimity Flash memory module based on VPX |
Non-Patent Citations (2)
Title |
---|
JIA QINGZHONG,WANG XINGDOU: "Research on high-speed communication technology between DSP and FPGA", 《2016 7TH IEEE CONTROL AND SYSTEM GRADUATE RESEARCH COLLOQUIUM (ICSGRC)》 * |
陈婷,岳强,汪洋: "FPGA和DSP间基于SRIO的高速通信***设计", 《单片机与嵌入式***应用》 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111413561A (en) * | 2020-03-24 | 2020-07-14 | 哈尔滨工业大学 | Power supply ripple simulation system with state monitoring function |
CN114268676A (en) * | 2021-11-29 | 2022-04-01 | 北京中科晶上科技股份有限公司 | SRIO-based deframer and satellite communication system |
CN114268676B (en) * | 2021-11-29 | 2023-04-25 | 北京中科晶上科技股份有限公司 | SRIO-based framing device and satellite communication system |
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