CN110137244A - GaN基自支撑衬底的垂直结构HEMT器件及制备方法 - Google Patents
GaN基自支撑衬底的垂直结构HEMT器件及制备方法 Download PDFInfo
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Abstract
本发明公开了一种GaN基自支撑衬底的垂直结构HEMT器件及制备方法。所述器件包括衬底、外延结构以及源极、栅极、漏极,所述外延结构包括依次在所述衬底正面形成的电流阻挡层、导通通孔、第二半导体层、第一半导体层以及钝化层,所述第一半导体层内分布有二维电子气沟道,所述源极与第一半导体层电连接,所述栅极位于所述钝化层上,所述漏极位于所述衬底背面。本发明中电流阻挡层为绝缘层,其栅下对应区域为Si掺杂的n型重掺杂电流导通通孔,且导通通孔的横截面呈倒梯形状,此结构有利于愈合,能够有效缓解空隙区漏电等问题。本发明提供的器件具有高耐压、低漏电等优点。
Description
技术领域
本发明涉及半导体制造技术领域,具体涉及一种GaN基自支撑衬底的垂直结构HEMT器件及制备方法。
背景技术
如今,人类的生产生活离不开电力,而随着人们节能意识的提高,高转换效率的功率半导体器件已经成为国内外研究的热点。功率半导体器件应用广泛,如家用电器、电源变换器和工业控制等,不同的额定电压和电流下采用不同的功率半导体器件。GaN基HEMT是国内外发展热点,且已经在诸多领域取得突破,尤其在高温、高功率以及高频等方面具有广阔应用前景。目前,考虑到GaN基HEMT的制造成本和稳定性,通常采用硅或者蓝宝石衬底外延生长异质结,而蓝宝石材料是绝热材料,无法满足GaN基HEMT需要的散热要求。另外,硅衬底上异质外延制备GaN基HEMT存在两大阻碍:第一,Si晶体材料和GaN之间存在着明显的晶格失配(17%)和非常大的热膨胀系数差异(56%);第二,硅衬底上异质外延生长的GaN缓冲层的泄漏电流较大,会得到较低的击穿电压。所以,寻求合适的衬底迫在眉睫,本发明即采取N型GaN自支撑衬底,有助于生长高质量的异质结,有效缓解缓冲层漏电等问题。除此之外,常规的水平结构GaN基HEMT存在着电流崩塌、高耐压以及可靠性等问题,为了缓解这些问题,本发明所述器件将设计为垂直电导结构。
GaN基HEMT器件外延结构通常包括衬底、缓冲层、沟道层以及势垒层,其中缓冲层和沟道层都为GaN,势垒层为AlGaN。由于氮化物材料极化效应的作用,AlGaN/GaN异质结处会形成高面密度的二维电子气。垂直电导结构GaN基HEMT器件工作状态时,电子从源极沿着二维电子气沟道流向栅下,随后被收集到漏极;关断状态与水平结构GaN基HEMT器件一样,即二维电子气被耗尽,GaN基HEMT是通过肖特基栅压控制沟道中的二维电子气实现工作。本发明采用低组分的AlGaN作缓冲层代替传统GaN缓冲层,AlxGa1-xN渐变层中可形成多异质结,增大沟道中的二维电子气浓度。
另外,电流阻挡层和导通通孔也是垂直电导结构GaN基HEMT发展中的难点。电流阻挡层一方面可通过Mg注入或Mg掺杂形成P-GaN,P-GaN具有较高势垒可抑制漏电从而起到电流阻挡层的作用,但是Mg具有较低的激活效率且存在记忆效应,有碍二次外延生长;另一方面可选择绝缘性较好的材料,如SiO2等材料,但是需要解决侧向外延生长带来的愈合过程中产生的空隙等问题。本发明采用SiO2作为电流阻挡层的材料,且导通通孔的横截面呈倒梯形状,此结构有利于愈合,能够有效缓解空隙区漏电等问题。
发明内容
本发明旨在提供一种GaN基自支撑衬底的垂直结构HEMT器件及制备方法,从而克服现有技术中的不足,获得高耐压、低漏电且工艺简单的HEMT器件。
本发明提供了一种基于GaN自支撑衬底的HEMT器件,其工作原理是:由于自发极化和压电极化的共同作用,AlxGa1-xN渐变层中可形成多异质结,异质结的上下表面和界面处会产生束缚面电荷,整体呈正性,且面密度极高,为了维持***电中性,就会吸引电子,因此在异质结界面附近会形成高面密度的二维电子气,补偿界面处的束缚正电荷。垂直电导结构GaN基HEMT器件工作状态时,电子从源极沿着二维电子气沟道流向栅下,随后被收集到漏极;关断状态与水平电导结构GaN基HEMT器件一样,即二维电子气被耗尽。
为解决以上所述问题,本发明提供如下技术方案。
本发明提供了GaN基自支撑衬底的垂直结构HEMT器件,所述器件包括衬底、电流阻挡层、导通通孔、第二半导体层、第一半导体层、N型GaN帽层、钝化层、源极、栅极和漏极,所述第一半导体层包括Al组分x自0.01至0.28依次增加的本征AlxGa1-xN渐变层和异质结中的二维电子气沟道;所述漏极位于衬底的背面;在衬底的正面依次自下往上排布电流阻挡层、第二半导体层、第一半导体层、N型GaN帽层和钝化层;所述第一半导体层中的本征AlxGa1-xN渐变层在第二半导体层上依次自下往上排布,本征AlxGa1-xN渐变层内分布有二维电子气沟道;所述源极包括在钝化层上表面的两侧分别制作的第一源极和第二源极,源极穿过钝化层与N型GaN帽层电连接;所述栅极位于第一源极和第二源极之间,与钝化层接触;所述导通通孔位于电流阻挡层的栅下对应区域,导通通孔的横截面呈倒梯形状,导通通孔的高度与电流阻挡层的厚度相同,导通通孔的下表面孔和衬底的正面接触,上表面孔和第二半导体层接触。
优选地,所述衬底为N型GaN自支撑衬底。
优选地,所述电流阻挡层为SiO2,厚度为d1,其中50nm<d1<1000nm。
优选地,所述导通通孔是Si掺杂的n型重掺杂电流导通通孔,载流子的浓度不小于1018cm-3。
优选地,第二半导体层为Mg和Si共掺GaN中和层,第二半导体层的厚度d3为1-10nm。
优选地,N型GaN帽层的厚度d4为2nm~8nm,其载流子浓度不小于1018cm-3;所述钝化层为氮化硅。
优选地,本征AlxGa1-xN渐变层中的x范围为0.01-0.28,并且x的值随本征AlxGa1-xN渐变层厚度的减小自0.01逐渐增加到0.28,即本征AlxGa1-xN渐变层的总厚度d2为1~3μm。
优选地,本征AlxGa1-xN渐变层由下至上共10层。
优选地,导通通孔的上表面孔孔径为R,500nm<R<100μm,下表面孔的孔径为r,10nm<r<500nm。
优选地,二维电子气沟道内形成有二维电子气。
本发明还提供了一种如上所述GaN基自支撑衬底的垂直结构HEMT器件的制备方法,包括如下步骤:
(1)在衬底正面沉积生长电流阻挡层,湿法刻蚀形成横截面呈倒梯形状的导通通孔区台面,得图形化衬底外延片;
(2)对形成的图形化衬底外延片进行预处理后,外延生长一层Si重掺杂GaN层,填充横截面呈倒梯形状的导通通孔,得经一次外延生长的外延片;
(3)对获得的经一次外延生长的外延片,进行二次外延,依次形成Mg和Si共掺GaN中和层、本征AlxGa1-xN渐变层,N型GaN帽层,得外延生长完的基于衬底的垂直电导HEMT外延片;
(4)对外延生长完的基于衬底的垂直电导HEMT外延片首先进行清洗,用去离子水冲洗并用高纯氮气吹扫干净,然后沉积氮化硅钝化层;
(5)对沉积完氮化硅钝化层的外延片进行光刻和刻蚀,形成源极,放入电子束沉积台沉积欧姆接触金属Ti/Al/Ni/Au,剥离清洗;
(6)利用电子束沉积源极欧姆接触后,在衬底背面沉积漏极,同样利用电子束沉积欧姆接触金属Ti/Al/Ni/Au,剥离清洗,并进行欧姆接触退火,得HEMT器件外延片;
(7)对欧姆接触退火后的HEMT器件外延片进行光刻和显影,利用光刻胶掩膜对有源区进行保护,氟离子注入形成器件隔离后进行清洗,光刻形成栅极,利用电子束沉积Ni/Au,剥离,在氮气气氛下退火形成肖特基接触电极。
通过对比现有技术,本发明具有以下优势:
第一,所述器件采用N型GaN自支撑衬底,其可以有效缓解外延生长中因晶格失配和热失配所导致的异质结质量不高等问题,为获得高质量异质结打下坚实基础,且有利于与衬底背面的漏极形成欧姆接触;
第二,所述器件为垂直电导结构,可有效解决常规水平电导结构HEMT存在着的电流崩塌、不耐高压以及可靠性差等问题;
第三,所述电流阻挡层采用SiO2,其栅下对应区域为高电子浓度的N型电流导通通孔,且导通通孔的横截面呈倒梯形状,此结构有利于愈合,能够有效缓解电流阻挡层漏电等问题;
第四,所述第一半导体层为本征AlxGa1-xN渐变层,且采用低Al组分AlGaN层替代传统结构中的GaN缓冲层,此结构可形成多异质结,增大沟道中的二维电子气浓度,提高电流密度。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其它的附图,其中:
图1是实施例提供的一种基于GaN基自支撑衬底的垂直结构HEMT器件的结构示意图;
图2是实施例提供的所述电流阻挡层上形成导通通孔的剖面图;
图3是实施例提供的所述第一半导体层的结构示意图;
图4是实施例提供的所述第一半导体层的组分和厚度变化曲线图;
图5是实施例提供的一种GaN基自支撑衬底的垂直结构HEMT器件的制作工艺流程图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
图1是本实施例提供的一种GaN基自支撑衬底的垂直结构HEMT器件的结构示意图,图2为本实施例提供的所述电流阻挡层3上形成导通通孔4的剖面图。所述一种GaN基自支撑衬底的垂直结构HEMT器件包括衬底2、电流阻挡层3、导通通孔4、Mg和Si共掺GaN中和层即第二半导体层5、第一半导体层、N型GaN帽层17、钝化层18、源极19、栅极20、漏极1。所述衬底2材料为N型GaN。栅极19位于第一源极1801和第二源极1802之间。所述电流阻挡层3采用SiO2,且厚度为d1=500nm。所述导通通孔4是Si掺杂的n型重掺杂电流导通通孔,且导通通孔的横截面呈倒梯形状,导通通孔上表面孔径R=2μm,导通通孔下表面孔径r=400nm,其中载流子浓度为1×1018cm-3。所述Mg和Si共掺GaN中和层即第二半导体层5的厚度为d3=5nm。所述N型GaN帽层17的载流子浓度为1×1018cm-3,且厚度d4=5nm。所述钝化层18的材料为氮化硅。所述源极19和漏极1通过电子束沉积法沉积欧姆接触金属Ti/Al/Ni/Au(20nm/130nm/50nm/150nm),随后剥离清洗,沉积完以后对金属进行合金化处理,以便获得欧姆接触,合金化温度为750℃,合金时间为50秒,其中漏极1位于衬底2的背面。
图3是本实施例提供的所述第一半导体层的本征AlxGa1-xN渐变层的结构示意图,所述第一半导体层包括Al组分自0.01至0.28依次增加的本征AlxGa1-xN渐变层6、8、9、10、11、12、13、14、15、16,异质结中的二维电子气沟道7,本征AlxGa1-xN渐变层共10层,中各层Al组分x由下至上依次为0.01、0.04、0.07、0.10、0.13、0.16、0.19、0.22、0.25、0.28,相应的各层厚度由下至上依次为500nm、400nm、300nm、200nm、150nm、100nm、50nm、30nm、15nm、6nm,即所述本征AlxGa1-xN渐变层的总厚度d2为1751nm,渐变层的组分和厚度变化见图4。
图5是本发明提供的一种GaN基自支撑衬底的垂直结构HEMT器件的制作工艺流程图。
本发明提供的一种GaN基自支撑衬底的垂直结构HEMT器件的制作方法,包括以下步骤:
S1、利用PECVD设备在N型GaN自支撑衬底2的正面沉积生长一层500nm厚的SiO2作为电流阻挡层3;
S2、经过预处理、旋涂粘附剂、涂胶、显影、湿法刻蚀形成横截面呈倒梯形状的导通通孔区台面,得图形化衬底外延片,见图2;
S3、对形成的图形化衬底外延片首先进行预处理,在进行MOCVD外延生长前放入200℃烘箱中烘2小时后除去表面水分以及杂质,为MOCVD外延生长做准备,将图形化衬底外延片传送到MOCVD***的反应腔室,外延生长一层Si重掺杂GaN,填充横截面呈倒梯形状的导通通孔4,得经一次外延生长的外延片;
S4、对经一次外延生长的外延片,首先进行预处理,在进行二次外延生长前放入200℃烘箱中烘2小时后除去表面水分以及杂质,在进行二次外延过程中,样品放入生长腔室,以三甲基镓TMGa、三甲基铝TMAl作为III族源,氨气作为V族源,二戊镁Cp2Mg和高纯硅烷SiH4分别作为P型和N型掺杂剂,高纯氢气作为载气,生长Mg和Si共掺GaN中和层5;
S5、随后通入氨气、三甲基铝和三甲基镓,MOCVD外延生长总厚度为1751nm本征AlxGa1-xN渐变层,渐变层的组分和厚度变化见图4;
S6、调节MOCVD各参数,在本征AlxGa1-xN渐变层上再外延生长一层N型GaN帽层17,便于后面其与源极形成欧姆接触,得外延生长完的基于GaN自支撑衬底的垂直电导HEMT外延片;
S7、对外延生长完的基于GaN自支撑衬底的垂直电导HEMT外延片首先进行有机溶液清洗,用去离子水冲洗并用高纯氮气吹扫干净,然后利用PECVD设备沉积氮化硅钝化层18;
S8、源极欧姆接触:对沉积完氮化硅钝化层18的外延片进行光刻和刻蚀,形成源极区,放入电子束沉积台沉积欧姆接触金属Ti/Al/Ni/Au(20nm/100nm/40nm/120nm)并进行剥离清洗;
S9、漏极欧姆接触:源极欧姆接触后,在衬底背面进行漏极欧姆接触,同样利用电子束沉积Ti/Al/Ni/Au(20nm/100nm/40nm/120nm)及剥离清洗,完成以后再对该金属进行合金化处理,以便获得欧姆接触,合金化温度为750℃,合金时间为50秒;
S10、样品合金化处理完毕以后,进行光刻和显影,利用光刻胶掩膜对有源区进行保护,氟离子注入形成器件隔离;
S11、栅极肖特基接触:台面隔离完成以后,进行清洗光刻形成栅极区,同样利用电子束沉积Ni/Au(20nm/150nm)并剥离清洗,在氮气气氛下,温度为400℃时间为10min的条件下退火形成肖特基接触完成整个器件的制作,见图5。
本发明采用新型垂直结构,利用自支撑GaN衬底,可有效解决常规水平结构GaN基HEMT器件存在着的电流崩塌、不耐高压以及可靠性差等问题。采用SiO2作为电流阻挡层,具有更高的能带、更高的击穿场强以及本身较好的绝缘性,能够减少垂直电导HEMT在高漏压条件下通过电流阻挡层漏电的问题,从而提高器件击穿电压至2kV。并且导通通孔的横截面呈倒梯形状,此结构有利于愈合,能够有效缓解电流阻挡层漏电等问题。采用低Al组分AlGaN层替代传统结构中的GaN缓冲层,本征AlxGa1-xN渐变层中可形成多异质结,增大沟道中的二维电子气浓度,提高电流密度至2.5kA/cm2。
以上所述,仅为本发明的较佳实施例而已,并非对本发明做任何形式上的限定。凡本领域的技术人员利用本发明的技术方案对上述实施例作出的任何等同的变动、修饰或演变等,均仍属于本发明技术方案的范围内。
Claims (10)
1.GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,所述器件包括衬底、电流阻挡层、导通通孔、第二半导体层、第一半导体层、N型GaN帽层、钝化层、源极、栅极和漏极,所述第一半导体层包括Al组分x自0.01至0.28依次增加的本征AlxGa1-xN渐变层和异质结中的二维电子气沟道;所述漏极位于衬底的背面;在衬底的正面依次自下往上排布电流阻挡层、第二半导体层、第一半导体层、N型GaN帽层和钝化层;所述第一半导体层中的本征AlxGa1-xN渐变层在第二半导体层上依次自下往上排布且相应的Al组分x自0.01至0.28依次增加,本征AlxGa1-xN渐变层内分布有二维电子气沟道;所述源极包括在钝化层上表面的两侧分别制作的第一源极和第二源极,源极穿过钝化层与N型GaN帽层电连接;所述栅极位于第一源极和第二源极之间,与钝化层接触;所述导通通孔位于电流阻挡层的栅下对应区域,导通通孔的横截面呈倒梯形状,导通通孔的高度与电流阻挡层的厚度相同,导通通孔的下表面孔和衬底的正面接触,上表面孔和第二半导体层接触。
2.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,所述衬底为N型GaN自支撑衬底。
3.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,所述电流阻挡层为SiO2,厚度为d1,其中50nm<d1<1000nm。
4.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,所述导通通孔是Si掺杂的n型重掺杂电流导通通孔,载流子的浓度不小于1018cm-3。
5.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,第二半导体层为Mg和Si共掺GaN中和层,第二半导体层的厚度d3为1-10nm。
6.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,N型GaN帽层的厚度d4为2nm~8nm,其载流子浓度不小于1018cm-3;所述钝化层为氮化硅。
7.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,本征AlxGa1-xN渐变层中的x范围为0.01-0.28,并且x的值随本征AlxGa1-xN渐变层厚度的减小自0.01逐渐增加到0.28,本征AlxGa1-xN渐变层的总厚度d2为1~3μm。
8.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,导通通孔的上表面孔孔径为R,500nm<R<100μm,下表面孔的孔径为r,10nm<r<500nm。
9.根据权利要求1所述的GaN基自支撑衬底的垂直结构HEMT器件,其特征在于,二维电子气沟道内形成有二维电子气。
10.一种制备权利要求1至9任一项所述GaN基自支撑衬底的垂直结构HEMT器件的方法,其特征在于,包括如下步骤:
(1)在衬底正面沉积生长电流阻挡层,湿法刻蚀形成横截面呈倒梯形状的导通通孔区台面,得图形化衬底外延片;
(2)对形成的图形化衬底外延片进行预处理后,外延生长一层Si重掺杂GaN层,填充横截面呈倒梯形状的导通通孔,得经一次外延生长的外延片;
(3)对获得的经一次外延生长的外延片,进行二次外延,依次形成Mg和Si共掺GaN中和层、本征AlxGa1-xN渐变层,N型GaN帽层,得外延生长完的基于衬底的垂直电导HEMT外延片;
(4)对外延生长完的基于衬底的垂直电导HEMT外延片首先进行清洗,用去离子水冲洗并用高纯氮气吹扫干净,然后沉积氮化硅钝化层;
(5)对沉积完氮化硅钝化层的外延片进行光刻和刻蚀,形成源极,放入电子束沉积台沉积欧姆接触金属Ti/Al/Ni/Au,剥离清洗;
(6)利用电子束沉积源极欧姆接触后,在衬底背面沉积漏极,同样利用电子束沉积欧姆接触金属Ti/Al/Ni/Au,剥离清洗,并进行欧姆接触退火,得HEMT器件外延片;
(7)对欧姆接触退火后的HEMT器件外延片进行光刻和显影,利用光刻胶掩膜对有源区进行保护,氟离子注入形成器件隔离后进行清洗,光刻形成栅极,利用电子束沉积Ni/Au,剥离,在氮气气氛下退火形成肖特基接触电极。
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NIRAJ MAN SHRESTHA ET AL: "A novel AlGaN/GaN multiple aperture vertical high electron mobility transistor with silicon oxide current blocking layer", 《VACUUM》 * |
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WO2021143080A1 (zh) * | 2020-01-16 | 2021-07-22 | 华为技术有限公司 | 一种氮化物半导体晶体管及电子设备 |
WO2023141749A1 (en) * | 2022-01-25 | 2023-08-03 | Innoscience (suzhou) Semiconductor Co., Ltd. | GaN-BASED SEMICONDUCTOR DEVICE WITH REDUCED LEAKAGE CURRENT AND METHOD FOR MANUFACTURING THE SAME |
CN115117150A (zh) * | 2022-08-24 | 2022-09-27 | 成都功成半导体有限公司 | 一种GaN HEMT功率器件及其制备方法 |
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