CN109634011B - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN109634011B CN109634011B CN201910016585.9A CN201910016585A CN109634011B CN 109634011 B CN109634011 B CN 109634011B CN 201910016585 A CN201910016585 A CN 201910016585A CN 109634011 B CN109634011 B CN 109634011B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses an array substrate, a display panel and a display device, wherein the array substrate comprises: the pixel regions are distributed in an array in 2M rows and N columns, wherein M, N is an integer, and M, N is more than or equal to 1; a plurality of data lines for supplying data voltage signals to the pixel regions; a plurality of scan lines for supplying scan voltage signals to the pixel regions; a plurality of minimal repeating units, distributed in an array of M rows and N columns, each minimal repeating unit comprising: and the first pixel circuit and the second pixel circuit are distributed in two adjacent pixel areas on the same column, the first pixel circuit comprises a first switching element, the second pixel circuit comprises a second switching element, and the first switching element and the second switching element are integrated together. By the embodiment of the invention, the distribution of the pixel circuit is more compact, and the compression of the pixel Pitch is realized, so that the PPI of the screen body is improved, and the display effect of the screen body is improved.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to an array substrate, a display panel and a display device.
Background
Red (Red, R), Green (G), and Blue (B) are three primary colors, and various colors are obtained by changing the three colors of Red, Green, and Blue and superimposing them on each other. As shown in fig. 1, red and green are superimposed to obtain yellow, green and blue are superimposed to obtain cyan, and red and blue are superimposed to obtain magenta, or magenta. The Organic Light-Emitting Diode (OLED) screen has red, green and blue sub-pixels, and colorization of the OLED screen is achieved. There are many colorization methods for the OLED panel, and the OLED colorization technology that is mature and has been successfully mass-produced is mainly the OLED evaporation technology.
Fig. 2 is a schematic diagram showing the arrangement of sub-pixels of a pixel unit in the prior art, wherein each sub-pixel is designed independently, and the pixel circuits of each sub-pixel are also independent. On the premise that the size of the screen body is fixed, the higher the pixel density (Pixels Per inc, PPI), the higher the resolution, and the more detailed the screen body displays. PPI denotes the number of pixels per inch, which can be obtained by calculating the ratio of the unit inch dimension to the distance of the repeating pixel unit (Pitch). Since high PPI display has been the development direction of display technology, how to improve the PPI of the screen is a technical problem to be solved urgently at present.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a display panel and a display device, which can improve PPI of a screen body, thereby improving the display effect of the screen body.
In one aspect, an embodiment of the present invention provides an array substrate, including:
the pixel regions are distributed in an array in 2M rows and N columns, wherein M, N is an integer, and M, N is more than or equal to 1;
a plurality of data lines for supplying data voltage signals to the pixel regions;
a plurality of scan lines for supplying scan voltage signals to the pixel regions;
a plurality of minimal repeating units, distributed in an array of M rows and N columns, each minimal repeating unit comprising: and the first pixel circuit and the second pixel circuit are distributed in two adjacent pixel areas on the same column, the first pixel circuit comprises a first switching element, the second pixel circuit comprises a second switching element, and the first switching element and the second switching element are integrated together.
In one embodiment of the present invention, each of the minimal repeating units further comprises: and control elements distributed in two adjacent pixel regions on the same column, wherein the control elements are used for controlling the switching states of the first switching element and the second switching element.
In one embodiment of the present invention, the first switching element, the second switching element, and the control element are all TFT devices;
the grid electrode of the control element of each minimum repeating unit is connected with one scanning line corresponding to the corresponding minimum repeating unit;
the grid electrode of the first switch element is connected with the source electrode of the control element, and the grid electrode of the second switch element is respectively connected with the drain electrode of the control element and the other scanning line corresponding to the minimum repeating unit; or, the gate of the first switching element is connected to the drain of the control element, and the gate of the second switching element is connected to the source of the control element and another scan line corresponding to the minimum repeating unit.
In one embodiment of the present invention, the first pixel circuit and the second pixel circuit are each a 2T1C pixel circuit.
In one embodiment of the present invention, the first pixel circuit and the second pixel circuit are each a 6T1C pixel circuit or a 7T1C pixel circuit.
In one embodiment of the present invention, the array substrate further includes:
a plurality of reference signal lines, each of the reference signal lines for supplying a reference electric signal to the first switching element and the second switching element in the corresponding minimal repeating unit.
In one embodiment of the present invention, the first pixel circuit further includes a first light emitting device connected to the first switching element, and the second pixel circuit further includes a second light emitting device connected to the second switching element;
the first switch element is used for controlling the first light-emitting device to emit light;
the second switch element is used for controlling the second light-emitting device to emit light.
In one embodiment of the present invention, the first light emitting device and the second light emitting device each include a driving TFT and a storage capacitor.
In another aspect, an embodiment of the present invention provides a display panel, including the array substrate as described above.
In still another aspect, an embodiment of the present invention provides a display device, including the display panel as described above.
According to the array substrate, the display panel and the display device provided by the embodiment of the invention, the switching elements in two adjacent pixel circuits on the same column are integrated together, so that the gap between the two pixel circuits is reduced, the arrangement of the two pixel circuits is more compact, the total space occupied by the two pixel circuits is reduced, the compression of pixels Pitch is realized, the PPI of a screen body is improved, and the display effect of the screen body is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments of the present invention will be briefly described below, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of the principle of three primary colors in the prior art;
FIG. 2 is a schematic diagram of a sub-pixel arrangement of a pixel unit in the prior art;
fig. 3 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
FIG. 4 is a distribution diagram of pixel circuits of an embodiment of the present invention and a comparative example;
FIG. 5 is a schematic diagram of a minimal repeating unit provided by one embodiment of the present invention;
fig. 6 is a schematic structural diagram of an array substrate according to another embodiment of the present invention;
fig. 7 is a schematic structural diagram of a minimal repeating unit provided by another embodiment of the present invention.
The reference numerals of fig. 3 to 7 are as follows:
10 minimal repeating unit, 11 first pixel circuit, 111 first switching element, 112 first light emitting device, 12 second pixel circuit, 121 second switching element, 122 second light emitting device, 13 control element.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In order to solve the problems in the prior art, embodiments of the present invention provide an array substrate, a display panel and a display device. First, the array substrate provided by the embodiment of the invention is described below.
Fig. 3 is a schematic structural diagram of an array substrate according to an embodiment of the present invention. As shown in fig. 3, the array substrate includes: a pixel region, a plurality of data lines, a plurality of scan lines, and a plurality of minimum repeating units 10.
The pixel regions are distributed in an array in 2M rows and N columns, wherein M, N is an integer and M, N is more than or equal to 1. For example, M, N ≧ 2.
And a plurality of data lines for supplying data voltage signals to the respective pixel regions.
And a plurality of scan lines for supplying scan voltage signals to the pixel regions.
A plurality of minimal repeating units 10, distributed in an array of M rows and N columns, each minimal repeating unit 10 comprising: and a first pixel circuit 11 and a second pixel circuit 12 distributed in two adjacent pixel regions on the same column, wherein the first pixel circuit 11 includes a first switch element 111, the second pixel circuit 12 includes a second switch element 121, and the first switch element 111 and the second switch element 121 are integrated.
It should be noted that the odd-even scanning lines drive the odd-even pixel circuits, for example, the scanning line of the first row drives the pixel circuit of the first row, the scanning line of the second row drives the pixel circuit of the second row, and so on.
According to the array substrate of the embodiment of the invention, the first switch element 111 and the second switch element 121 are integrated together, so that the gap between the first Pixel circuit 11 and the second Pixel circuit 12 is reduced, the arrangement of the two Pixel circuits is more compact, and the total space occupied by the two Pixel circuits is reduced, thereby realizing the compression of the Pixel Pitch (Pixel Pitch), improving the PPI of the screen body, and realizing the improvement of the display effect of the screen body.
The technical effect of the embodiment of the present invention is further explained by fig. 4.
The right side of fig. 4 is a distribution diagram of pixel circuits in a comparative example in which two pixel circuits adjacent up and down on the same column are independent of each other. For two pixel circuits on the same column, the distance between the switching element of the upper pixel circuit and the switching element of the lower pixel circuit is relatively long, and a certain gap exists between the upper pixel circuit and the lower pixel circuit, which results in that the two pixel circuits occupy relatively large space.
The left side of fig. 4 is a distribution diagram of pixel circuits according to an embodiment of the present invention, in which the switching elements of two pixel circuits adjacent to each other in the same column are arranged adjacent to each other in the upper and lower direction and integrated together, so that the gap between the two pixel circuits is small or there is no gap between the two pixel circuits.
The technical effect that the present embodiment can achieve a more compact distribution of pixel circuits is more intuitively shown by comparing the embodiment with the comparative example in fig. 4.
In one embodiment of the present invention, the first pixel circuit 11 further includes a first light emitting device 112 connected to the first switching element 111, and the second pixel circuit 12 further includes a second light emitting device 122 connected to the second switching element 121; the first switching element 111 is used to control the first light emitting device 112 to emit light; the second switching element 121 is used to control the second light emitting device 122 to emit light.
In one embodiment of the present invention, each of the first and second light emitting devices 112 and 122 includes a driving Thin Film Transistor (TFT) and a storage capacitor.
As an example, fig. 5 is a schematic structural diagram of a minimal repeating unit provided by an embodiment of the present invention. As shown in fig. 5, the first switching element 111 is a switching thin film transistor T21, and the first light emitting device 112 includes: a driving thin film transistor T22, a storage capacitor C21, and an Organic Light-Emitting Diode (OLED) 1. The second switching element 121 is a switching thin film transistor T11, and the second light emitting device 122 includes: the driving thin film transistor T12, the storage capacitor C11, and the OLED 2.
The switching thin film transistor T21 of the minimum repeating unit 10 is connected to one scan line 1 corresponding to the minimum repeating unit 10, and the switching thin film transistor T11 is connected to the other scan line 2 corresponding to the minimum repeating unit 10.
In one embodiment of the present invention, as shown in fig. 6, each minimal repeating unit 10 further includes: and the control elements 13 are distributed in two adjacent pixel regions on the same column, the control elements 13 are respectively connected with the first switch element 111 and the second switch element 121, and the control elements 13 are used for controlling the switching states of the first switch element 111 and the second switch element 121.
As an example, fig. 7 is a schematic structural diagram of a minimal repeating unit provided in another embodiment of the present invention. Fig. 7 differs from fig. 5 in that in fig. 7 each minimal repeating unit 10 further comprises a control element 13. The control element 13 is a thin film transistor T3.
The gate of the control element 13 is connected to one scanning line 1 corresponding to the minimum repeating unit 10.
The source and the drain of the control element 13 are connected to the gate of the first switch element 111 and the gate of the second switch element 121 in the following two ways, which may be specifically determined according to whether the first switch element 111 and the second switch element 121 belong to an N-Metal-Oxide-Semiconductor (NMOS) or a P-Metal-Oxide-Semiconductor (PMOS).
The first connection mode is as follows: the gate of the first switching element 111 is connected to the source of the control element 13, and the gate of the second switching element 121 is connected to the drain of the control element 13 and another scanning line 2 corresponding to the minimum repeating unit 10, respectively.
And a second connection mode: the gate of the first switching element 111 is connected to the drain of the control element 13, and the gate of the second switching element 121 is connected to the source of the control element 13 and another scanning line 2 corresponding to the minimum repeating unit 10, respectively.
Note that, according to the scan voltage signal on the scan line 1, the on/off of the thin film transistor T3 is controlled, so that the on/off of the thin film transistor T21 is controlled by the on/off of the thin film transistor T3.
In one embodiment of the present invention, the first pixel circuit 11 and the second pixel circuit 12 are each a 2T1C pixel circuit.
In one embodiment of the present invention, the first pixel circuit 11 and the second pixel circuit 12 are each a 6T1C pixel circuit or a 7T1C pixel circuit.
It should be noted that the first pixel circuit 11 and the second pixel circuit 12 are not limited to the 2T1C pixel circuit, the 6T1C pixel circuit, and the 7T1C pixel circuit, and may be other types of pixel circuits.
In an embodiment of the present invention, if the first pixel circuit 11 and the second pixel circuit 12 are both a 6T1C pixel circuit or a 7T1C pixel circuit, referring to fig. 3 or fig. 6, the array substrate further includes: a plurality of reference signal lines.
Each reference signal line for supplying a reference electric signal to the first switching element and the second switching element in the corresponding minimal repeating unit.
The reference signal lines in fig. 3 or fig. 6 are arranged in multiple columns, which is an arrangement manner of the reference signal lines, and of course, the reference signal lines may also be arranged in other manners, such as a transverse arrangement, which is not limited in this respect.
According to the embodiment of the present invention, each minimum repeating unit 10 corresponds to one reference signal line, the upper and lower rows of pixel circuits in the same minimum repeating unit may share one reference signal line, and the reference signal line may simultaneously perform gate initialization on the driving TFTs of the upper and lower rows of pixel circuits adjacent to each other in the minimum repeating unit 10, and may also perform OLED initialization on the upper and lower rows of pixel circuits adjacent to each other in the minimum repeating unit 10.
The embodiment of the invention also provides a display panel which comprises the array substrate.
The embodiment of the invention also provides a display device which comprises the display panel.
The display panel may be a liquid crystal display panel, and the display panel further includes: a color film substrate and a liquid crystal layer. The liquid crystal display panel, the backlight source and the integrated circuit board for providing control signals for the liquid crystal display panel can form a liquid crystal display device. In the liquid crystal display device, except that the array substrate provided by the invention is adopted, the structures of the rest parts can be the same as the prior art, and are not described again.
As described above, only the specific embodiments of the present invention are provided, and it can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the system, the module and the unit described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present invention, and these modifications or substitutions should be covered within the scope of the present invention.
Claims (10)
1. An array substrate, comprising:
the pixel regions are distributed in an array in 2M rows and N columns, wherein M, N is an integer, and M, N is more than or equal to 1;
a plurality of data lines for supplying data voltage signals to the pixel regions;
a plurality of scan lines for supplying scan voltage signals to the pixel regions;
a plurality of minimal repeating units, distributed in an array of M rows and N columns, each minimal repeating unit comprising: a first pixel circuit and a second pixel circuit distributed in two adjacent pixel regions on the same column, wherein the first pixel circuit includes a first switch element, the second pixel circuit includes a second switch element, the first switch element and the second switch element are integrated together, the first switch element and the second switch element are both used for controlling the light emitting device to emit light, and the first switch element and the second switch element are respectively connected with different scanning lines; the minimum repeating unit is arranged between the adjacent two projections of the scanning lines along the direction perpendicular to the array substrate.
2. The array substrate of claim 1, wherein each of the minimal repeating units further comprises: and control elements distributed in two adjacent pixel regions on the same column, wherein the control elements are used for controlling the switching states of the first switching element and the second switching element.
3. The array substrate of claim 2, wherein the first switching element, the second switching element and the control element are all TFT devices;
the grid electrode of the control element of each minimum repeating unit is connected with one scanning line corresponding to the corresponding minimum repeating unit;
the grid electrode of the first switch element is connected with the source electrode of the control element, and the grid electrode of the second switch element is respectively connected with the drain electrode of the control element and the other scanning line corresponding to the minimum repeating unit; alternatively, the first and second electrodes may be,
the grid electrode of the first switch element is connected with the drain electrode of the control element, and the grid electrode of the second switch element is respectively connected with the source electrode of the control element and the other scanning line corresponding to the minimum repeating unit.
4. The array substrate of claim 1, wherein the first pixel circuit and the second pixel circuit are each a 2T1C pixel circuit.
5. The array substrate of claim 1, wherein the first pixel circuit and the second pixel circuit are each a 6T1C pixel circuit or a 7T1C pixel circuit.
6. The array substrate of claim 5, further comprising: a plurality of reference signal lines;
each of the reference signal lines is configured to provide a reference electrical signal to the first switching element and the second switching element in the corresponding minimum repeating unit.
7. The array substrate of claim 1, wherein the first pixel circuit further comprises a first light emitting device connected to the first switching element, and the second pixel circuit further comprises a second light emitting device connected to the second switching element;
the first switch element is used for controlling the first light-emitting device to emit light;
the second switch element is used for controlling the second light-emitting device to emit light.
8. The array substrate of claim 7, wherein the first light emitting device and the second light emitting device each comprise a drive TFT and a storage capacitor.
9. A display panel comprising the array substrate according to any one of claims 1 to 8.
10. A display device characterized by comprising the display panel according to claim 9.
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