CN104538433A - Active-matrix organic light emission display substrate and manufacturing method thereof - Google Patents

Active-matrix organic light emission display substrate and manufacturing method thereof Download PDF

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Publication number
CN104538433A
CN104538433A CN201510012726.1A CN201510012726A CN104538433A CN 104538433 A CN104538433 A CN 104538433A CN 201510012726 A CN201510012726 A CN 201510012726A CN 104538433 A CN104538433 A CN 104538433A
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layer
organic light
insulating barrier
single crystal
display substrate
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CN201510012726.1A
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刘雪洲
林立
刘胜芳
蔡世星
平山秀雄
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Kunshan New Flat Panel Display Technology Center Co Ltd
Kunshan Govisionox Optoelectronics Co Ltd
Kunshan Guoxian Photoelectric Co Ltd
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Kunshan New Flat Panel Display Technology Center Co Ltd
Kunshan Guoxian Photoelectric Co Ltd
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Priority to CN201510012726.1A priority Critical patent/CN104538433A/en
Publication of CN104538433A publication Critical patent/CN104538433A/en
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Abstract

The invention discloses an active-matrix organic light emission display substrate and a manufacturing method of the active-matrix organic light emission display substrate. The method comprises the steps: placing a monocrystalline silicon chip on a substrate; depositing a planarization layer on the substrate, wherein the thickness of the planarization layer is larger than that of the monocrystalline silicon chip; depositing an insulating layer on the planarization layer; carrying out photoetching on the insulating layer and the planarization layer through the mask process to form contact holes so as to expose lead regions of the monocrystalline silicon chip; depositing an anode layer on the insulating layer and patterning the anode layer to form electrodes, wherein the electrodes make electrical contact with the lead regions of the monocrystalline silicon chip. Because the contact holes of a small feature size can be formed in the active-matrix organic light emission display substrate obtained through the method, many electrodes can be led out from the monocrystalline silicon chip, and the integration level of the electrodes can be increased. Being applied to a display, the active-matrix organic light emission display substrate can increase the resolution ratio of the display.

Description

Active matrix/organic light emitting display substrate and manufacture method thereof
Technical field
The invention belongs to technical field of flat panel display, particularly a kind of based on silica-based active matrix/organic light emitting display and manufacture method thereof.
Background technology
Active matrix/organic light emitting display (Active Matrix/Organic Light Emitting Display, AMOLED) is a kind of novel flat-panel display device.Traditional liquid crystal display (Liquid CrystalDisplay, LCD), self can not be luminous, needs backlight.And AMOLED itself has lighting function, be a kind of self-emitting display, therefore, AMOLED more can do frivolous than LCD, and more power saving.In addition, AMOLED has the features such as reaction speed is very fast, contrast is higher, visual angle is wider.
General AMOLED adopts low temperature polycrystalline silicon (Low Temperature Poly Silicon, LTPS) thin-film transistor (Thin Film Transistor, TFT) array backboard technology, feature due to LTPS array processes self often brings the problem of TFT threshold voltage instability, thus causes the uneven of display further.
Because silicon single crystal wafer has, mobility is high, integrated level is high, reliability is high, homogeneity is good and the advantage of low cost, silicon single crystal wafer replaces LTPS tft array to carry out Direct driver Organic Light Emitting Diode (OrganicLight-Emitting Diode, OLED) pixel, can reduce volume and the cost of AMOLED greatly.
But, in the manufacture process of the AMOLED of existing based single crystal silicon substrate, the characteristic size of the contact hole formed is comparatively large, and the integrated level of the electrode causing the lead areas of based single crystal silicon substrate to be drawn is not high, thus this substrate can not be applied to the display screen of high-resolution.
Summary of the invention
Based on this, be necessary active matrix/organic light emitting display substrate and manufacture method that a kind of extraction electrode integrated level improved on single silicon is provided.
A manufacture method for active matrix/organic light emitting display substrate, it comprises the following steps: be placed in by silicon single crystal wafer on substrate; Deposited planarization layer on the substrate, the thickness of described planarization layer is greater than the thickness of described silicon single crystal wafer; Depositing insulating layer on described planarization layer; By masking process, photoetching is carried out to described insulating barrier and planarization layer, form contact hole, to expose the lead areas of described silicon single crystal wafer; Deposition anode layer on described insulating barrier, and anode layer described in patterning, form electrode, the lead areas electrical contact of described electrode and described silicon single crystal wafer.
Wherein in an embodiment, deposition anode layer on described insulating barrier, and anode layer described in patterning, form electrode, before the step of the lead areas electrical contact of described electrode and described silicon single crystal wafer, also comprise: deposit and the step of pattern metal routing layer.
Wherein in an embodiment, described insulating barrier is by SiN xor SiO xmiddle at least one material is formed.
Wherein in an embodiment, described masking process comprises the following steps: at insulating barrier coating photoresist; By mask plate, expose photoresist, the transmission region of described mask plate is corresponding with the position of described contact hole; To described photoresist developing; First time etching is carried out to described insulating barrier; Remove photoresist; With described insulating barrier for etching barrier layer, carry out second time etching, form contact hole.
Wherein in an embodiment, the material of described flatness layer is polyimide-based composite material.
Wherein in an embodiment, the pore size of described contact hole is 3 microns to 4 microns.
A kind of active matrix/organic light emitting display substrate, it comprises: substrate; Silicon single crystal wafer, is arranged on the substrate; Planarization layer, on the substrate, the thickness of described planarization layer is greater than the thickness of described silicon single crystal wafer to deposition; Insulating barrier, is deposited on described planarization layer; Contact hole, through described planarization layer and described insulating barrier, to expose the lead areas of described silicon single crystal wafer; Electrode, with the lead areas electrical contact of described silicon single crystal wafer.
Wherein in an embodiment, also comprise metal routing layer, described electrode deposition is on described metal routing layer.
Wherein in an embodiment, described insulating barrier is SiN xlayer, SiO xlayer or SiN xsiO xcomposite bed.
Wherein in an embodiment, the pore size of described contact hole is 3 microns to 4 microns.
The active matrix/organic light emitting display substrate obtained by said method, substrate is formed thicker planarization layer, depositing insulating layer on planarization layer, and utilize this insulating barrier to etch planarization layer as mask plate, by the contact hole that twice etching technique morphogenesis characters size is less, thus more electrode can be drawn from silicon single crystal wafer, improve the integrated level of electrode.When being applied on display by this active matrix/organic light emitting display substrate, the resolution of display can be improved.
Accompanying drawing explanation
Fig. 1-5 is the sectional view of the method and structure of manufacture active matrix organic light-emitting diode device array substrate according to the embodiment of the present invention.
Embodiment
Please refer to Fig. 1-5, Fig. 1-4 is in order according to the sectional view of the manufacture method of the manufacture active matrix/organic light emitting display substrate of the embodiment of the present invention, and Fig. 5 is the sectional view of the active matrix/organic light emitting display substrate schematically showing the embodiment of the present invention.The size of the building block shown in accompanying drawing and thickness be convenience in order to better understand and describe and provide arbitrarily, and the present invention is not limited to shown size and thickness.
The manufacture method of this active matrix/organic light emitting display substrate comprises the following steps:
S10: silicon single crystal wafer is placed on substrate.Concrete, please refer to Fig. 1, substrate 110 is provided with silicon single crystal wafer 120.In the present embodiment, substrate 110 can by SiO 2transparent glass material as main component is made.Alternative, substrate 110 can have other material of opaque material or plastics and so on to make, but for the organic light emitting display that image is embodied in the bottom emission of substrate 110, substrate 110 must be made up of transparent material.In the present embodiment, silicon single crystal wafer 120 is formed on substrate 110 by transfer printing process, and the thickness of this silicon single crystal wafer 120 is at 5-20 micron.Certainly, silicon single crystal wafer 120 can also be arranged on substrate 110 by adhesive.
S30: deposited planarization layer on substrate, the thickness of planarization layer is greater than the thickness of silicon single crystal wafer.Concrete, refer to Fig. 2, planarization layer 130 is deposited on substrate 110 upper surface, to promote the levelness of substrate 110.And the thickness of planarization layer 130 is greater than the thickness of silicon single crystal wafer 120, thickness can, as resilient coating, prevent impurity from invading silicon single crystal wafer 120 higher than the part of the planarization layer 130 of silicon single crystal wafer 120.Planarization layer 130 is formed by spin coating or slit coating process.In the present embodiment, the material of flatness layer can be polyimides (Polyimide, PI) based composites, this composite material is main material with PI, because PI has higher viscosity, utilize PI based composites to form planarization layer 130, thicker planarization layer 130 can be obtained.And PI has resistant to elevated temperatures performance, in the photoetching process be described below, PI based composites is not vulnerable to the impact of temperature and causes the precision of photoetching to reduce.In the present embodiment, the thickness of planarization layer 130 is 7-22 micron, the thickness of corresponding silicon single crystal wafer 120 is 5-20 micron, makes the thickness difference between planarization layer 130 and silicon single crystal wafer 120 with 2 microns all the time, and the flatness layer 130 of this part can as resilient coating.
S50: depositing insulating layer on planarization layer.Concrete, refer to Fig. 3, depositing insulating layer 140 on planarization layer 130.Insulating barrier 140 can by using any one the deposition techniques SiN in chemical vapour deposition (CVD) (Chemical VaporDeposition, CVD) technology or spin coating technique xor SiO xmiddle at least one material, this insulating barrier 140 can be SiN xlayer or SiO xlayer or SiN xsiO xcomposite bed.
S70: by masking process, carries out photoetching to insulating barrier and planarization layer, forms contact hole, to expose the lead areas of described silicon single crystal wafer.Concrete, refer to Fig. 4, contact hole 150 runs through insulating barrier 140 and planarization layer 130, and the lead areas of silicon single crystal wafer 120 is come out.In this step, first etching is carried out to insulating barrier 140 and form corresponding hole, then for barrier layer, planarization layer 130 is etched with insulating barrier 140, form corresponding contact hole.In above-mentioned steps, the object that planarization layer 130 is formed insulating barrier 140 is, when etching planarization layer 130, insulating barrier 140 can as hard mask (hardmask).Hard mask is compared with the soft mask be made up of polymer, not easily there is deformation in hard mask in the process of etching, thus make the characteristic size of contact hole almost identical with the pore size of the etched hole that insulating barrier 140 is formed, the size of contact hole substantially not easily changes, and the characteristic size of contact hole can be made to remain in smaller size range.In the present embodiment, the characteristic size of contact hole 150 enough remains on 3-4 micron.The characteristic size of contact hole 150 is less, in unit are, can form more contact hole 150, thus expose the lead areas of more silicon single crystal wafer 120, therefore, it is possible to promote the integrated level of lead-in wire, improves pixel resolution.
S90: deposition anode layer on the insulating layer, and patterned anode layer, forms electrode, the lead areas electrical contact of described electrode and described silicon single crystal wafer.Please refer to Fig. 5 now, deposition anode layer on the pattern that Fig. 4 is formed, anode layer can comprise from such as tin indium oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO) or indium oxide (In 2o 3) and so on transparent material at least one material with high work function selected, also can be comprise the metal that some have good reflectivity, as the composite electrode layers that Ag or Al and oxide semiconductor are formed.And patterned anode layer, forms electrode 160.This electrode 160 can use as the anode of OLED.
In the present embodiment, before step S90, can also comprise:
S80: deposition is pattern metal routing layer also.When resolution requirement is higher, picture element density is large, one or more layers metal routing layer can be increased again before the anode making OLED, and by above-mentioned metal routing pattern layers, then anode layer is deposited on above-mentioned metal routing layer, improves integrated level further.Above-mentioned metal routing layer can comprise the various low resistivity metal materials such as such as titanium (Ti), molybdenum (Mo), aluminium (Al), aluminium copper (AlCu)
In the present embodiment, step S70 specifically comprises the following steps:
S71: at insulating barrier coating photoresist.Please refer to Fig. 3, insulating barrier 140 is coated with photoresist uniformly.
S72: by mask plate, exposes photoresist, and the transmission region of mask plate is corresponding with the position of described contact hole.Mask plate comprises light transmission part and to be in the light part, and light transmission part can the light of transmission predetermined wavelength, and be in the light part obstructs incident light.Mask plate aims at photoresist, and the position of the light transmission part of mask plate is corresponding with the position of the contact hole 150 describing (referring to Fig. 4) above.Then, the illumination of predetermined wavelength is mapped on mask plate, and light can be irradiated on photoresist through the light transmission part of mask plate, and be in the light part can not transmitted light.
S73: to photoresist developing.The photoresist that illumination is emitted through is removed by developer solution, and the not illuminated photoresist of light is still stayed on insulating barrier 140.Do not have the position of the insulating barrier of photoresist corresponding with the position of the lead areas of silicon single crystal wafer 120.
S74: first time etching is carried out to insulating barrier.Etch insulating barrier 140 using the photoresist after development as barrier layer, in the present embodiment, the size in the aperture of etching at 3-4 micron, and controls etch period, makes insulating barrier 140 need the partial etching of etching clean
S75: remove photoresist.
S76: take insulating barrier as etching barrier layer, carries out second time etching, forms contact hole.Contact holes exposing goes out the lead areas of silicon single crystal wafer 120.Because be hard mask with insulating barrier 140, the pore size of the etched hole that the characteristic size of the contact hole 150 that etching is in this step formed and step S73 are formed on the insulating layer is suitable, and the characteristic size of contact hole 150 can also remain on 3-4 micron.
Can be completed by dry carving technology by above-mentioned twice etching, the contact hole that twice etching is formed can keep less characteristic size, and in contact hole, etching is very clean, can not remain other materials, thus electrode can be made to form good electrical contact with silicon single crystal wafer.
Fig. 5 schematically represents the structure of active matrix/organic light emitting display substrate, and it comprises substrate 110, silicon single crystal wafer 120, planarization layer 130, insulating barrier 140, contact hole 150 and electrode 160.Silicon single crystal wafer 120 is arranged on substrate 110; Planarization layer 130 is deposited on substrate 110, and the thickness of planarization layer 130 is greater than the thickness of silicon single crystal wafer 120; Insulating barrier 140 is deposited on flatness layer 130; Contact hole 150 is through flatness layer 130 and insulating barrier 140, and with the lead areas of exposed single-crystal silicon 120, the pore size of contact hole 150 is 3 microns to 4 microns; Electrode 160 forms the electrical contact with described lead areas.The characteristic size of contact hole 150 is less, in unit are, can form more contact hole 150, thus expose the lead areas of more silicon single crystal wafer 120, therefore, it is possible to promote the integrated level of lead-in wire, improves pixel resolution.
The structure of active matrix organic light-emitting diode device array substrate disclosed here also may comprise metal routing layer, above-mentioned metal routing layer can be one deck or multiple layer metal routing layer, metal routing is deposited upon on insulating barrier, and be deposited in contact hole, electrode 160 is deposited on this metal routing layer, and electrode 160 is by metal routing layer and lead areas electrical contact.
The above embodiment only have expressed several execution mode of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.

Claims (10)

1. a manufacture method for active matrix/organic light emitting display substrate, is characterized in that, comprises the following steps:
Silicon single crystal wafer is placed on substrate;
Deposited planarization layer on the substrate, the thickness of described planarization layer is greater than the thickness of described silicon single crystal wafer;
Depositing insulating layer on described planarization layer;
By masking process, photoetching is carried out to described insulating barrier and planarization layer, form contact hole, to expose the lead areas of described silicon single crystal wafer;
Deposition anode layer on described insulating barrier, and anode layer described in patterning, form electrode, the lead areas electrical contact of described electrode and described silicon single crystal wafer.
2. the manufacture method of active matrix/organic light emitting display substrate according to claim 1, it is characterized in that, deposition anode layer on described insulating barrier, and anode layer described in patterning, form electrode, before the step of the lead areas electrical contact of described electrode and described silicon single crystal wafer, also comprise: deposit and the step of pattern metal routing layer.
3. the manufacture method of active matrix/organic light emitting display substrate according to claim 1, is characterized in that, described insulating barrier is by SiN xor SiO xmiddle at least one material is formed.
4. the manufacture method of active matrix/organic light emitting display substrate according to claim 1, is characterized in that, described masking process comprises the following steps:
At insulating barrier coating photoresist;
By mask plate, expose photoresist, the transmission region of described mask plate is corresponding with the position of described contact hole;
To described photoresist developing;
First time etching is carried out to described insulating barrier;
Remove photoresist;
With described insulating barrier for etching barrier layer, carry out second time etching, form contact hole.
5. the manufacture method of active matrix/organic light emitting display substrate according to claim 1, is characterized in that, the material of described flatness layer is polyimide-based composite material.
6. the manufacture method of active matrix/organic light emitting display substrate according to claim 1, is characterized in that, the pore size of described contact hole is 3 microns to 4 microns.
7. an active matrix/organic light emitting display substrate, is characterized in that, comprising:
Substrate;
Silicon single crystal wafer, is arranged on the substrate;
Planarization layer, on the substrate, the thickness of described planarization layer is greater than the thickness of described silicon single crystal wafer to deposition;
Insulating barrier, is deposited on described planarization layer;
Contact hole, through described planarization layer and described insulating barrier, to expose the lead areas of described silicon single crystal wafer;
Electrode, with the lead areas electrical contact of described silicon single crystal wafer.
8. active matrix/organic light emitting display substrate according to claim 8, is characterized in that, also comprises metal routing layer, and described electrode deposition is on described metal routing layer.
9. active matrix/organic light emitting display substrate according to claim 8, is characterized in that, described insulating barrier is SiN xlayer, SiO xlayer or SiN xsiO xcomposite bed.
10. active matrix/organic light emitting display substrate according to claim 8, is characterized in that, the pore size of described contact hole is 3 microns to 4 microns.
CN201510012726.1A 2015-01-09 2015-01-09 Active-matrix organic light emission display substrate and manufacturing method thereof Pending CN104538433A (en)

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Cited By (2)

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CN109634011A (en) * 2019-01-08 2019-04-16 昆山国显光电有限公司 Array substrate, display panel and display device
CN111192900A (en) * 2018-11-14 2020-05-22 创王光电股份有限公司 Light emitting device and method for manufacturing the same

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Publication number Priority date Publication date Assignee Title
CN111192900A (en) * 2018-11-14 2020-05-22 创王光电股份有限公司 Light emitting device and method for manufacturing the same
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