CN109581204A - A kind of built-in test design method and system - Google Patents
A kind of built-in test design method and system Download PDFInfo
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- CN109581204A CN109581204A CN201910001923.1A CN201910001923A CN109581204A CN 109581204 A CN109581204 A CN 109581204A CN 201910001923 A CN201910001923 A CN 201910001923A CN 109581204 A CN109581204 A CN 109581204A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
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Abstract
The embodiment of the present application discloses a kind of built-in test design method and system；Above-mentioned built-in test design method, comprising: calculate the current value of the bucking current of at least one branch in analogue signal circuit to be measured, and the voltage calculated value of the test node in bucking current excitation Imitating signal circuit；Establish the fault dictionary of analogue signal circuit；During BIT, according to the current value of the bucking current of any bar branch of fault dictionary storage, apply bucking current, the test voltage value of collecting test node in analogue signal circuit；According to the comparison result of the test node stored in fault dictionary the voltage calculated value under the bucking current excitation of this branch and test voltage value, to determine whether this branch is fault branch.The diagnosis of the soft fault of analogue signal circuit may be implemented in the application.
Description
Technical field
This application involves but be not limited to the field of test technology, espespecially a kind of built-in test (BIT, Built In Test) sets
Count method and system.
Background technique
Fault dictionary diagnostic method, due to (linear and nonlinear circuit can be diagnosed) applied widely, in engineering just
In implementation, therefore it is widely applied.However, classical fault dictionary diagnostic mode is generally only used for diagnosis hard fault,
This makes its diagnosis effect have a greatly reduced quality.
Summary of the invention
The embodiment of the present application provides a kind of built-in test design method, can realize examining for soft fault based on fault dictionary
It is disconnected.
On the one hand, the embodiment of the present application provides a kind of built-in test design method, comprising: calculates analog signal to be measured
The current value of the bucking current of at least one branch in circuit, and the analogue signal circuit under bucking current excitation
The voltage calculated value of interior test node；The fault dictionary of the analogue signal circuit is established, institute is stored in the fault dictionary
State the identification information of branch described in analogue signal circuit, the current value of the bucking current of every branch and in any branch
The voltage calculated value of the test node under bucking current excitation；During BIT, according to any of fault dictionary storage
The current value of the bucking current of branch applies the bucking current in the analogue signal circuit, acquires the test node
Test voltage value；According to the test node stored in the fault dictionary under the bucking current excitation of the branch
The comparison result of voltage calculated value and the test voltage value, to determine whether the branch is fault branch.
On the other hand, the embodiment of the present application provides a kind of built-in test designing system, comprising: computing module is suitable for calculating
The current value of the bucking current of at least one branch in analogue signal circuit to be measured, and the institute under bucking current excitation
State the voltage calculated value of the test node in analogue signal circuit；Fault dictionary establishes module, is adapted to set up the analog signal
The fault dictionary of circuit stores the identification information of branch described in the analogue signal circuit, every branch in the fault dictionary
The current value of the bucking current on road and any branch bucking current excitation under the test node voltage calculated value；
BIT designs module, is suitable for during BIT, according to the electric current of the bucking current of any bar branch of fault dictionary storage
Value applies the bucking current in the analogue signal circuit, acquires the test voltage value of the test node；According to the event
Voltage calculated value and test electricity of the test node stored in barrier dictionary under the bucking current excitation of the branch
The comparison result of pressure value, to determine whether the branch is fault branch.
On the other hand, the embodiment of the present application provides a kind of computer-readable medium, is stored with built-in test design program, institute
It states built-in test design program and is performed the step of realizing above-mentioned built-in test design method.
In the embodiment of the present application, by finding specific incentives electric current (i.e. at least one branch in analogue signal circuit
Bucking current), and the voltage calculated value of the current value based on bucking current and test node under bucking current excitation is established
Fault dictionary；Design carries out branch trouble detection based on fault dictionary during BIT, to realize the soft of analogue signal circuit
The diagnosis of failure.
Other features and advantage will illustrate in the following description, also, partly become from specification
It obtains it is clear that being understood and implementing the application.The purpose of the application and other advantages can be by specifications, right
Specifically noted structure is achieved and obtained in claim and attached drawing.
Detailed description of the invention
Attached drawing is used to provide to further understand technical scheme, and constitutes part of specification, with this
The embodiment of application is used to explain the technical solution of the application together, does not constitute the limitation to technical scheme.
Fig. 1 is the flow chart of built-in test method provided by the embodiments of the present application；
Fig. 2 is the schematic illustration of built-in test method provided by the embodiments of the present application；
Fig. 3 is a kind of example flow diagram of built-in test method provided by the embodiments of the present application；
Fig. 4 is the schematic diagram of built-in test system provided by the embodiments of the present application.
Specific embodiment
Embodiments herein is described in detail below in conjunction with attached drawing.It should be noted that in the feelings not conflicted
Under condition, the features in the embodiments and the embodiments of the present application can mutual any combination.
Step shown in the flowchart of the accompanying drawings can be in a computer system such as a set of computer executable instructions
It executes.Also, although logical order is shown in flow charts, and it in some cases, can be to be different from herein suitable
Sequence executes shown or described step.
Fig. 1 is the flow chart of built-in test design method provided by the embodiments of the present application.As shown in Figure 1, the present embodiment mentions
The built-in test design method of confession, comprising the following steps:
Step 101, the current value for calculating the bucking current of at least one branch in analogue signal circuit to be measured, Yi Ji
The bucking current motivates the voltage calculated value of the test node in Imitating signal circuit；
Step 102, the fault dictionary for establishing analogue signal circuit, branch in stored analog signals circuit in fault dictionary
Identification information, every branch bucking current current value and under the bucking current excitation of any branch test node electricity
Press calculated value；
Step 103, during BIT, according to fault dictionary storage any bar branch bucking current current value,
Analogue signal circuit applies the bucking current, the test voltage value of collecting test node；According to the test stored in fault dictionary
The comparison result of voltage calculated value and test voltage value of the node under the bucking current excitation of the branch, to determine that the branch is
No is fault branch.
In the present embodiment, any bar branch in analogue signal circuit can refer to a component between two nodes.
In one exemplary embodiment, during BIT, the branch detection ordering of analogue signal circuit can be according to user
Demand is configured.For example, fixed test one or multiple branches can be configured during BIT whether according to user demand
There are failures；Alternatively, can according to user demand, configure during BIT according to preset sequence detection all branches whether
There are failures.However, the application does not limit this.
In one exemplary embodiment, it can store in the fault dictionary that step 102 is established every in analogue signal circuit
The identification information of one branch, the current value of the bucking current of each branch and the bucking current in any bar branch motivate
The voltage calculated value of lower test node.However, the application does not limit this.It, can be according to user in other implementations
Demand, in fault dictionary in the identification information, these branches on stored analog signals circuit central branch road every branch screen
The current value and corresponding bucking current for covering electric current motivate the voltage calculated value of lower test node.
In one exemplary embodiment, the BIT design method of the present embodiment can also include: during BIT, according to event
The corresponding sequence of identification information for hindering the branch stored in dictionary successively detects every branch with the presence or absence of failure.Wherein, branch
Identification information may include branch number.For example, can be ascending according to the number of the branch stored in fault dictionary
Sequence, successively detect every branch with the presence or absence of failure；Alternatively, can according to the branch stored in fault dictionary number by
Small sequence is arrived greatly, successively detects every branch with the presence or absence of failure.However, the application does not limit this.
In one exemplary embodiment, in a step 101, at least one branch in analogue signal circuit to be measured is calculated
The current value of bucking current may include:
For any bar branch l in analogue signal circuit, following nonlinear circuit is solved using Newton-Raphson method
The current value of the bucking current of branch l is calculated in equation:
Vl=Vn1-Vn2=f (I1,I2)=0；
Wherein, VlIndicate the voltage value of branch l, Vn1And Vn2Respectively indicate the two end node n of branch l1And n2Voltage value,
I1And I2Indicate the current value of the bucking current of branch l.
In the present exemplary embodiment, a branch refers to a component in analogue signal circuit between two nodes.Mould
A certain branch of quasi- signal circuit is shielded the voltage and current for referring to this branch while being zero.It is shielded in this branch
Afterwards, influence of the failure of this branch to entire analogue signal circuit just disappears.After being shielded due to any bar branch, this
Voltage, the electric current of branch are simultaneously zero, are equivalent to the node that this branch becomes analogue signal circuit, therefore to mould
Quasi- signal circuit no longer has an impact.
Wherein, the response of circuit is the function of circuit topological structure, component parameters and pumping signal.The original knot of circuit
Structure, component parameters and pumping signal be it is given in advance and known, to shield certain branch of circuit, it is necessary in addition
Apply new pumping signal.Wherein, single branch is shielded, needs in addition to apply two exciting current signals (that is, shielding electricity
Stream).It is assumed that two end nodes of certain branch l are n1And n2, node voltage is expressed as Vn1And Vn2, (referred to as using Newton-Raphson
Ox-daraf(reciprocal of farad)) algorithm, following nonlinear circuit non trivial solution, the i.e. electric current of exciting current (i.e. bucking current) can be acquired with iteration
Value I1And I2:
Vl=Vn1-Vn2=f (I1,I2)=0；
Wherein, VlIndicate the voltage value of branch l.
In one exemplary embodiment, in step 103, according to the test node stored in fault dictionary branch screen
The comparison result of the voltage calculated value and test voltage value under current excitation is covered, it, can to determine whether the branch is fault branch
To include: under the bucking current excitation of the branch, when the test voltage value of test node is identical as voltage calculated value, it is determined that
The branch is fault branch；When the test voltage value of test node is different from voltage calculated value, it is determined that the branch does not have failure.
However, the application does not limit this.In other implementations, under the bucking current excitation of any branch, when test saves
Error between the test voltage value and voltage calculated value of point is less than setting value, it is determined that this branch is fault branch；Work as survey
The error tried between the test voltage value and voltage calculated value of node is greater than or equal to setting value, it is determined that this branch is without event
Barrier.
In one exemplary embodiment, in step 103, apply bucking current, collecting test section in analogue signal circuit
Point test voltage value, may include: analogue signal circuit select two can and node, pass through control exciting current apply electricity
Road to it is above-mentioned two can and node apply bucking current, pass through control voltage automatic acquisition circuit collecting test node test electricity
Pressure value.Wherein, in the collection process of the voltage calculated value determination process of test node and test voltage value, bucking current is in mould
The application node (i.e. two of selection can and node) of quasi- signal circuit needs consistent.Wherein, can and node can reach
Node, in other words, to can detecte the node of component parameter.
The embodiment of the present application passes through the specific incentives electric current (i.e. bucking current) for finding branch, and in the specific incentives electric current
Excitation under so that this branch of analogue signal circuit will be shielded, after this branch is shielded, the failure of this branch
Influence to analogue signal circuit just disappears, and the response of faulty circuit and faultless circuit is exactly identical at this time.This implementation
Example is based on the above principles and combination failure dictionary designs built-in test system, realizes the fault diagnosis to analogue signal circuit, from
And realize the diagnosis to any soft fault of branch.The BIT process of the present embodiment design is equally applicable to linear and nonlinear electricity
The diagnosis on road has extensive adaptability, and the real-time diagnosed is preferable.
Fig. 2 is the schematic illustration of BIT design method provided by the embodiments of the present application.Fig. 3 provides for the embodiment of the present application
BIT design method a kind of example schematic diagram.As shown in Figures 2 and 3, the BIT design method that the present exemplary embodiment provides
Including following procedure.
Step 301, the current value for calculating the bucking current of every branch in simultaneously stored analog signals circuit.
For given nonlinear circuit (practical application circuit is all nonlinear circuit), it is assumed that the analogue signal circuit is deposited
In single spur track failure, shield this single fault by non-zero exciting current, then fault network and nominal network are at identical end
Under mouth current excitation, there is identical port voltage, i.e., should meet following nonlinear equation:
Wherein, V1 fAnd V2 fIndicate the port voltage of fault network, V1 0And V2 0Indicate the port voltage of nominal network, I1With
I2For the current value of the exciting current of port.
Above formula is rewritten as the following formula below:
Vl=Vn1(I1,I2)-Vn2(I1,I2)=0；
Wherein, VlIndicate the voltage value of any branch l, it is assumed that two end nodes of branch l are n1, n2, node voltage value can
To be expressed as Vn1, Vn2.By the formula it is found that aranch voltage value is its exciting current value I1And I2Function.It can first fix wherein
One current value I1ForWith I2For variable, I is solved using string position method (Newton-Raphson approach)2。
The solution procedure of the current value of the bucking current of branch is illustrated below.
Step 1: selected two can and application node of the node as exciting current (i.e. bucking current), and will wherein one
A exciting current value I1It is fixed as some definite value, another first provides two estimated value I21, I22, calculate nominal network N0In electricity
StreamWithUnder motivating respectively, the branch circuit voltage value V of branch is specifiedb1And Vb2If Vb1、Vb2It is all larger than
Assigned error ε ' then goes to step 2, otherwise goes to step 5.
Step 2: once obtaining new exciting current value I according to the following formula iteration23, withExcitation is nominal
Network N0, calculate the voltage value V of the branchb3:
I23=I22-[(I22-I21)/(Vb2-Vb1)]×Vb2。
Step 3: judging Vb3Whether ε ' is less than, if Vb3< ε ' goes to step 5, otherwise goes to step 4；Wherein, ε ' is
It is given close to zero small real number.
Step 4: judging whether the number of iterations is more than preset value, if the number of iterations is greater than preset value, then it is assumed that it does not restrain,
It is reconfigurableI21Initial value, iteration again；Otherwise with (I22, Vb2), (I23, Vb3) replace (I21, Vb1), (I22, Vb2),
It goes to step 2 and continues iteration.
Step 5: iteration terminates, exciting current value is stored(i.e. the current value of the bucking current of branch),
In, I2jThe current value as finally acquired.
According to above-mentioned steps one to step 5, the current value that can find out the specific incentives electric current of each branch (i.e. should
The current value of the bucking current of branch), which is mapped with the number of this branch, storage is in the database.
Wherein, the calculating of the current value of the bucking current of above-mentioned branch can use circuit simulating software and realize automatically, nothing
Need to manually be established an equation resolving.
Step 302, the test voltage value for calculating test node under bucking current excitation, and store the test voltage value.
In this step, using the aforementioned bucking current found out as pumping signal, according to ascending suitable of branch number
Sequence successively applies the bucking current to given analogue signal circuit respectively (the original excitation of circuit applies together).It is every to apply one
Group exciting current, will calculate separately out the test voltage value of the test node in analogue signal circuit, and by the test voltage value
It is mapped with the current value of branch number, bucking current, storage is in the database.
Wherein, test node be analog circuitry system in can and node, for example, can be meet the following conditions can and
Node: node voltage value is not zero relative to the sensitivity of component parameters all in analog circuitry system (or sensitivity pole
It is low).The number of test node can be one or more.The application does not limit this.
Step 303 establishes fault dictionary.
In this step, according to the current value of the aforementioned bucking current for each branch found out, and in the electricity
Stream motivates the voltage calculated value of lower test node, together with the number of corresponding branch, according to ascending sequence, corresponding branch
The voltage calculated value of road number, the current value of bucking current and test node, as one group of data, storage is in the database.
In other words, the dictionary information element stored in fault dictionary includes following three: the branch of analogue signal circuit is compiled
Number, the current value of bucking current corresponding with branch, under the bucking current excitation test node voltage calculated value.For example,
The data format of fault dictionary can be with are as follows:
【l1, I11, I12, V1】
【l2, I21, I22, V2】
【l3, I31, I32, V3】
……
【ln, In1, In2, Vn】
Wherein, liIt indicates branch number (i=1,2,3 ..., n), Ii1, Ii2Indicate the electric current of the bucking current of corresponding branch i
Value, ViIndicate the voltage calculated value of one test node when corresponding branch i is shielded.
The use when fault dictionary that this step obtains can be for subsequent built-in test system fault diagnosis.
Step 304, built-in test process carry out fault diagnosis.
In the present exemplary embodiment, the design of BIT process is carried out according to the data element in aforementioned fault dictionary；Its
In, it can be based on the current value of bucking current therein, and general general automatic testing circuit is combined to realize.
During BIT, as shown in Fig. 2, selected two can and application node of the node as specific incentives electric current, at this
Apply and design electronic switch between node and excitation current source, when the systems are operating normally, which may be at turning off
State does not influence the normal work of analogue signal circuit system.When needing to carry out built-in test to analogue signal circuit system,
Programmable current source is connected by the above-mentioned electronic switch of software control；The programmable current source can automatically generate and store number in fault dictionary
It is worth the exciting current of size, the application sequence of exciting current is exactly the number order of branch in fault dictionary, such as ascending,
First apply the corresponding bucking current I of branch that branch number is 11, I2, the then test section in automatic test simulation signal circuit
The test voltage value of point continues to the corresponding bucking current of branch 2, and survey if determining 1 fault-free of branch through fault diagnosis
Measure the test voltage value of test node；So until orienting fault branch.
Wherein, the test voltage value of the test node in analogue signal circuit can be acquired by voltage automatic acquisition circuit,
Voltage automatic acquisition circuit can be a general automatic data acquisition system, for example, may include electronic switch, modulus
(A/D) conversion circuit and corresponding digital memory circuit.However, the application does not limit this.
It in the present example embodiment, can be by test node after the test voltage value for obtaining above-mentioned test node
The voltage calculated value of test voltage value the stored test node corresponding with respective branch in fault dictionary be compared, if
The two is identical (or both between error be less than setting value), then proves that this branch is fault branch, diagnosis process terminates.If
The potentiometer of the corresponding test node stored of this branch in the test voltage value and fault dictionary of the test node measured
Calculation value is different (or both between error be greater than or equal to setting value), then proves that this branch does not have failure.At this point it is possible to from
Fault dictionary relaying, which is resumed studies, removes the current value of the specific incentives electric current an of branch, and by applying automatically in analogue signal circuit
Add the specific incentives electric current, continue acquisition can and test node test voltage value, and with the test that is stored in fault dictionary
The voltage calculated value of node is compared, and is diagnosed fault according to comparison result；If this branch does not have failure, continue to test down
One branch, until finding fault branch.
It should be noted that switch, the voltage that can control exciting current access by software are automatic after the completion of BIT
The switch of Acquisition Circuit access is in off-state, to restore the normal operating conditions of analogue signal circuit.
The embodiment of the present application passes through the specific incentives electric current for finding branch, under the excitation of the specific incentives electric current, so that
This branch of analogue signal circuit will be shielded, and after this branch is shielded, the failure of this branch is to analog signal electricity
The influence on road just disappears, and the response of faulty circuit and faultless circuit is exactly identical at this time.It is former that the present embodiment is based on this
It manages combination failure dictionary and designs built-in test system, so that realizing can be with the faulty word of any variate soft fault of diagnostic element parameter
Allusion quotation diagnostic method improves the real-time and adaptability of BIT diagnosis.
Fig. 4 is the schematic diagram of BIT designing system provided by the embodiments of the present application.As shown in figure 4, provided in this embodiment
BIT designing system, comprising: computing module 401, fault dictionary establish module 402 and BIT design module 403；Wherein, it calculates
Module 401, suitable for the current value of the bucking current of at least one branch in calculating analogue signal circuit to be measured, and in the screen
Cover the voltage calculated value of the test node in current excitation Imitating signal circuit；Fault dictionary establishes module 402, is adapted to set up
The fault dictionary of analogue signal circuit, wherein the identification information of branch, every branch in stored analog signals circuit in fault dictionary
The current value of the bucking current on road and any branch bucking current excitation under test node voltage calculated value；BIT is set
Module 403 is counted, is suitable for during BIT, according to the current value of the bucking current of any bar branch of fault dictionary storage, in mould
Quasi- signal circuit applies the bucking current, the test voltage value of collecting test node；According to the test stored in fault dictionary
The comparison result of voltage calculated value and test voltage value of the node under the bucking current excitation of the branch, to determine that the branch is
No is fault branch.
In one exemplary embodiment, BIT designs module 403, can be adapted to during BIT, according to fault dictionary
The corresponding sequence of the identification information of the branch of interior storage successively detects every branch with the presence or absence of failure.
In one exemplary embodiment, it may include: BIT control unit, exciting current application electricity that BIT, which designs module 403,
Road and voltage automatic acquisition circuit；Wherein, BIT control unit be suitable for analogue signal circuit select two can and node, lead to
Cross control exciting current apply circuit to two can and node apply bucking current, pass through control voltage automatic acquisition circuit acquisition
The test voltage value of test node.
In addition, the related description about BIT designing system provided in this embodiment is referred to above method embodiment
Description, therefore repeated no more in this.
In addition, the embodiment of the present application also provides a kind of computer-readable medium, it is stored with BIT design program, BIT design
Program is performed the step of realizing BIT design program as described above, such as Fig. 1 or step shown in Fig. 3.
It will appreciated by the skilled person that whole or certain steps, system, dress in method disclosed hereinabove
Functional module/unit in setting may be implemented as software, firmware, hardware and its combination appropriate.In hardware embodiment,
Division between the functional module/unit referred in the above description not necessarily corresponds to the division of physical assemblies；For example, one
Physical assemblies can have multiple functions or a function or step and can be executed by several physical assemblies cooperations.Certain groups
Part or all components may be implemented as by processor, such as the software that digital signal processor or microprocessor execute, or by
It is embodied as hardware, or is implemented as integrated circuit, such as specific integrated circuit.Such software can be distributed in computer-readable
On medium, computer-readable medium may include computer storage medium (or non-transitory medium) and communication media (or temporarily
Property medium).As known to a person of ordinary skill in the art, term computer storage medium is included in for storing information (such as
Computer readable instructions, data structure, program module or other data) any method or technique in the volatibility implemented and non-
Volatibility, removable and nonremovable medium.Computer storage medium include but is not limited to RAM, ROM, EEPROM, flash memory or its
His memory technology, CD-ROM, digital versatile disc (DVD) or other optical disc storages, magnetic holder, tape, disk storage or other
Magnetic memory apparatus or any other medium that can be used for storing desired information and can be accessed by a computer.This
Outside, known to a person of ordinary skill in the art to be, communication media generally comprises computer readable instructions, data structure, program mould
Other data in the modulated data signal of block or such as carrier wave or other transmission mechanisms etc, and may include any information
Delivery media.
Claims (9)
1. a kind of built-in test BIT design method characterized by comprising
The current value of the bucking current of at least one branch in analogue signal circuit to be measured is calculated, and in the bucking current
The voltage calculated value of test node under excitation in the analogue signal circuit；
The fault dictionary of the analogue signal circuit is established, branch described in the analogue signal circuit is stored in the fault dictionary
The identification information on road, every branch bucking current current value and the test under the bucking current excitation of any branch
The voltage calculated value of node；
During BIT, according to the current value of the bucking current of any bar branch of fault dictionary storage, in the simulation
Signal circuit applies the bucking current, acquires the test voltage value of the test node；It is stored according in the fault dictionary
The test node the branch bucking current excitation under voltage calculated value compared with the test voltage value knot
Fruit, to determine whether the branch is fault branch.
2. the method according to claim 1, wherein the method also includes:
During BIT, according to the corresponding sequence of identification information of the branch stored in the fault dictionary, every is successively detected
Branch whether there is failure.
3. the method according to claim 1, wherein described calculate at least one in analogue signal circuit to be measured
The current value of the bucking current of branch, comprising:
For any bar branch l in the analogue signal circuit, following nonlinear circuit is solved using Newton-Raphson method
The current value of the bucking current of the branch l is calculated in equation:
Vl=Vn1-Vn2=f (I1,I2)=0；
Wherein, VlIndicate the voltage value of the branch l, Vn1And Vn2Respectively indicate the two end node n of the branch l1And n2Voltage
Value, I1And I2Indicate the current value of the bucking current of the branch l.
4. the method according to claim 1, wherein described according to the test stored in the fault dictionary
The comparison result of voltage calculated value and the test voltage value of the node under the bucking current excitation of the branch, to determine
State whether branch is fault branch, comprising:
Under the bucking current excitation of the branch, when the test voltage value of the test node is identical as voltage calculated value, then
Determine that the branch is fault branch；When the test voltage value of the test node is different from voltage calculated value, it is determined that described
Branch does not have failure.
5. the method according to claim 1, wherein described apply the shielding electricity in the analogue signal circuit
Stream, acquires the test voltage value of the test node, comprising:
The analogue signal circuit select two can and node, by control exciting current apply circuit to it is described two can and
Node applies the bucking current, and the test voltage value of the test node is acquired by controlling voltage automatic acquisition circuit.
6. a kind of built-in test BIT designing system characterized by comprising
Computing module, suitable for the current value of the bucking current of at least one branch in calculating analogue signal circuit to be measured, and
The voltage calculated value of test node under bucking current excitation in the analogue signal circuit；
Fault dictionary establishes module, is adapted to set up the fault dictionary of the analogue signal circuit, institute is stored in the fault dictionary
State the identification information of branch described in analogue signal circuit, the current value of the bucking current of every branch and in any branch
The voltage calculated value of the test node under bucking current excitation；
BIT designs module, is suitable for during BIT, according to the bucking current of any bar branch of fault dictionary storage
Current value applies the bucking current in the analogue signal circuit, acquires the test voltage value of the test node；According to institute
State voltage calculated value and the survey of the test node stored in fault dictionary under the bucking current excitation of the branch
The comparison result of voltage value is tried, to determine whether the branch is fault branch.
7. system according to claim 6, which is characterized in that BIT designs module, is further adapted for during BIT, according to institute
The corresponding sequence of identification information for stating the branch stored in fault dictionary successively detects every branch with the presence or absence of failure.
8. system according to claim 6, which is characterized in that the BIT designs module, comprising: BIT control unit swashs
It encourages electric current and applies circuit and voltage automatic acquisition circuit；The BIT control unit is suitable for selecting in the analogue signal circuit
Two can and node, by control the exciting current apply circuit to it is described two can and node apply the bucking current,
The test voltage value of the test node is acquired by controlling the voltage automatic acquisition circuit.
9. a kind of computer-readable medium, which is characterized in that be stored with built-in test BIT design program, the built-in test is set
Sequence of having the records of distance by the log is performed the step of realizing the built-in test design method as described in any one of claims 1 to 5.
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Cited By (2)
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Application publication date: 20190405 |