CN110531251A - A kind of fault dictionary built-in test design method and system for Circuit with tolerance - Google Patents

A kind of fault dictionary built-in test design method and system for Circuit with tolerance Download PDF

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Publication number
CN110531251A
CN110531251A CN201910857560.1A CN201910857560A CN110531251A CN 110531251 A CN110531251 A CN 110531251A CN 201910857560 A CN201910857560 A CN 201910857560A CN 110531251 A CN110531251 A CN 110531251A
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branch
value
circuit
tolerance
test
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陈圣俭
李焕
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Beijing Watertek Information Technology Co Ltd
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Beijing Watertek Information Technology Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2846Fault-finding or characterising using hard- or software simulation or using knowledge-based systems, e.g. expert systems, artificial intelligence or interactive algorithms

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Abstract

A kind of fault dictionary built-in test design method for Circuit with tolerance, comprising: calculate the current value of the bucking current of at least one branch in Circuit with tolerance to be measured, and the voltage calculated value section of the test node under bucking current excitation in Circuit with tolerance;Establish the fault dictionary of Circuit with tolerance;During BIT, according to the current value of the bucking current of any bar branch of fault dictionary storage, apply bucking current, the test voltage value of collecting test node in Circuit with tolerance;According to the comparison result in voltage calculated value section and test voltage value of the test node stored in fault dictionary under the bucking current excitation of the branch, to determine whether the branch is fault branch.The application can realize the diagnosis of soft fault when considering component parameter tolerance based on fault dictionary.

Description

A kind of fault dictionary built-in test design method and system for Circuit with tolerance
Technical field
This application involves but be not limited to the field of test technology, espespecially a kind of fault dictionary built-in test for Circuit with tolerance (BIT, Built In Test) design method and system.
Background technique
Fault dictionary diagnostic method, due to (linear and nonlinear circuit can be diagnosed) applied widely, in engineering just In implementation, therefore it is widely applied.However, classical fault dictionary diagnostic mode is generally only used for diagnosis hard fault, This makes its diagnosis effect have a greatly reduced quality.Particularly, has fault dictionary diagnosis side there are when tolerance in consideration component parameter The application complexity of formula increases sharply, and greatly affected diagnosis effect.
Summary of the invention
The embodiment of the present application provides a kind of fault dictionary built-in test design method and system for Circuit with tolerance, energy Enough efficient diagnosis for realizing soft fault based on fault dictionary when considering component parameter tolerance.
On the one hand, the embodiment of the present application provides a kind of fault dictionary built-in test design method for Circuit with tolerance, It include: to calculate the current value of the bucking current of at least one branch in Circuit with tolerance to be measured, and swash in the bucking current Encourage the voltage calculated value section of the test node in the lower Circuit with tolerance;The fault dictionary of the Circuit with tolerance is established, it is described Stored in fault dictionary the identification information of branch described in the Circuit with tolerance, the bucking current of every branch current value and The voltage calculated value section of the test node under the bucking current excitation of any branch;During built-in test, according to The current value of the bucking current of any bar branch of the fault dictionary storage applies the shielding electricity in the Circuit with tolerance Stream, acquires the test voltage value of the test node;According to the test node stored in the fault dictionary in the branch The comparison result in the bucking current excitation on road lower voltage calculated value section and the test voltage value, to determine that the branch is No is fault branch.
On the other hand, the embodiment of the present application provides a kind of fault dictionary built-in test designing system for Circuit with tolerance, It include: computing module, suitable for the current value of the bucking current of at least one branch in calculating Circuit with tolerance to be measured, and in institute State the voltage calculated value section of the test node under bucking current excitation in the Circuit with tolerance;Fault dictionary establishes module, fits The mark letter of branch described in the Circuit with tolerance is stored in the fault dictionary for establishing the Circuit with tolerance, the fault dictionary Breath, every branch bucking current current value and under the bucking current excitation of any branch the test node voltage Calculated value section;Built-in test designs module, is suitable for during built-in test, any bar stored according to the fault dictionary The current value of the bucking current of branch applies the bucking current in the Circuit with tolerance, acquires the test of the test node Voltage value;According to potentiometer of the test node stored in the fault dictionary under the bucking current excitation of the branch The comparison result in calculation value section and the test voltage value, to determine whether the branch is fault branch.
On the other hand, the embodiment of the present application provides a kind of computer-readable medium, is stored with the failure for Circuit with tolerance Dictionary built-in test designs program, and it is above-mentioned for Circuit with tolerance that the fault dictionary built-in test design program is performed realization Fault dictionary built-in test design method the step of.
It in the embodiment of the present application, can be by being found at least one branch in Circuit with tolerance for Circuit with tolerance Specific incentives electric current (i.e. bucking current), and the current value based on bucking current and test node are under bucking current excitation Fault dictionary is established in voltage calculated value section;Design carries out branch trouble detection based on fault dictionary during built-in test, Troubleshooting issue when component parameter tolerance is considered so as to be effectively treated, and realizes that the soft fault of Circuit with tolerance is examined It is disconnected.The embodiment of the present application carries out built-in test design for the tolerance analog circuit system of practical engineering, has preferably real With property and extensive adaptability, it is convenient for engineering construction.
Other features and advantage will illustrate in the following description, also, partly become from specification It obtains it is clear that being understood and implementing the application.Other advantages of the application can be by specification, claims And scheme described in attached drawing is achieved and obtained.
Detailed description of the invention
Attached drawing is used to provide the understanding to technical scheme, and constitutes part of specification, with the application's Embodiment is used to explain the technical solution of the application together, does not constitute the limitation to technical scheme.
Fig. 1 is the flow chart of fault dictionary built-in test design method provided by the embodiments of the present application;
Fig. 2 is the schematic illustration of fault dictionary built-in test design method provided by the embodiments of the present application;
Fig. 3 is a kind of example flow diagram of fault dictionary built-in test design method provided by the embodiments of the present application;
Fig. 4 is the schematic diagram of fault dictionary built-in test designing system provided by the embodiments of the present application.
Specific embodiment
This application describes multiple embodiments, but the description is exemplary, rather than restrictive, and for this It is readily apparent that can have more in the range of embodiments described herein includes for the those of ordinary skill in field More embodiments and implementation.Although many possible feature combinations are shown in the attached drawings, and in a specific embodiment It is discussed, but many other combinations of disclosed feature are also possible.Unless the feelings specially limited Other than condition, any feature or element of any embodiment can be with any other features or element knot in any other embodiment It closes and uses, or any other feature or the element in any other embodiment can be substituted.
The application includes and contemplates the combination with feature known to persons of ordinary skill in the art and element.The application is It can also combine with any general characteristics or element through disclosed embodiment, feature and element, be defined by the claims with being formed Unique scheme of the invention.Any feature or element of any embodiment can also be with features or member from other scheme of the invention Part combination, to form the unique scheme of the invention that another is defined by the claims.It will thus be appreciated that showing in this application Out and/or any feature of discussion can be realized individually or in any suitable combination.Therefore, in addition to according to appended right It is required that and its other than the limitation done of equivalent replacement, embodiment is not limited.Furthermore, it is possible in the guarantor of appended claims It carry out various modifications and changes in shield range.
In addition, method and/or process may be rendered as spy by specification when describing representative embodiment Fixed step sequence.However, in the degree of this method or process independent of the particular order of step described herein, this method Or process should not necessarily be limited by the step of particular order.As one of ordinary skill in the art will appreciate, other steps is suitable Sequence is also possible.Therefore, the particular order of step described in specification is not necessarily to be construed as limitations on claims.This Outside, the claim for this method and/or process should not necessarily be limited by the step of executing them in the order written, art technology Personnel are it can be readily appreciated that these can sequentially change, and still remain in the spirit and scope of the embodiment of the present application.
Fig. 1 is the process of the fault dictionary built-in test design method provided by the embodiments of the present application for Circuit with tolerance Figure.As shown in Figure 1, it is contemplated that circuit components parameter is provided in this embodiment to be directed to Circuit with tolerance there are in the case where tolerance Fault dictionary built-in test design method, comprising the following steps:
Step 101, the current value for calculating the bucking current of at least one branch in Circuit with tolerance to be measured, and in the screen Cover the voltage calculated value section of the test node under current excitation in Circuit with tolerance;
Step 102, the fault dictionary for establishing Circuit with tolerance store the mark letter of branch in Circuit with tolerance in fault dictionary Breath, every branch bucking current current value and the voltage of test node calculates under the bucking current excitation of any branch It is worth section;
Step 103, during built-in test (BIT), according to fault dictionary storage any bar branch bucking current Current value, apply the bucking current, the test voltage value of collecting test node in Circuit with tolerance;It is stored according in fault dictionary Voltage calculated value section and test voltage value of the test node under the bucking current excitation of the branch comparison result, come true Whether the fixed branch is fault branch.
Wherein, Circuit with tolerance is that there are the analogue signal circuits of component parameter tolerance.Any in analogue signal circuit Branch can refer to a component between two nodes, or refer to the connection circuit between two ports of a device.
In one exemplary embodiment, during BIT, the branch detection ordering of Circuit with tolerance can be according to user demand It is configured.For example, can be according to user demand, configuring fixed test one or multiple branches during BIT whether there is Failure;Alternatively, can be according to user demand, configuring whether there is during BIT according to preset sequence detection all branches Failure.However, the application does not limit this.
In one exemplary embodiment, it can store each in Circuit with tolerance in the fault dictionary that step 102 is established The identification information of branch, the current value of the bucking current of each branch and the bucking current in any bar branch are surveyed under motivating Try the voltage calculated value section of node.However, the application does not limit this.It, can be according to user in other implementations Demand, the shielding of every branch is electric in the identification information, these branches on storage Circuit with tolerance central branch road in fault dictionary The current value of stream and corresponding bucking current motivate the voltage calculated value section of lower test node.
In one exemplary embodiment, the fault dictionary BIT design method of the present embodiment can also include: in BIT process In, according to the corresponding sequence of the identification information of the branch stored in fault dictionary, every branch is successively detected with the presence or absence of failure. Wherein, the identification information of branch may include the number of branch.For example, can be according to the number of the branch stored in fault dictionary Ascending sequence successively detects every branch with the presence or absence of failure;Alternatively, can be according to the branch stored in fault dictionary The descending sequence of number, successively detect every branch with the presence or absence of failure.However, the application does not limit this.
In one exemplary embodiment, in a step 101, the shielding of at least one branch in Circuit with tolerance to be measured is calculated The current value of electric current may include:
It is utilized based on the nominal value of component parameter each in Circuit with tolerance for any bar branch l in Circuit with tolerance Newton-Raphson method solves following nonlinear circuit equation, and the current value of the bucking current of branch l is calculated:
Vl=Vn1-Vn2=f (I1,I2)=0;
Wherein, VlIndicate the voltage value of branch l, Vn1And Vn2Respectively indicate the two end node n of branch l1And n2Voltage value, I1And I2Indicate the current value of the bucking current of branch l.
In the present exemplary embodiment, a branch refers to a component in tolerance analogue signal circuit between two nodes Or the connection circuit between two ports of a device.A certain branch of analogue signal circuit, which is shielded, refers to this branch Voltage and current is simultaneously zero.After this branch is shielded, influence of the failure of this branch to entire analogue signal circuit Just disappear.After being shielded due to any bar branch, voltage, the electric current of this branch are simultaneously zero, are equivalent to this branch Become a node of analogue signal circuit, therefore no longer has an impact to analogue signal circuit.
Wherein, the response of circuit is the function of circuit topological structure, component parameters and pumping signal.The original knot of circuit Structure, component parameters and pumping signal be it is given in advance and known, to shield certain branch of circuit, it is necessary in addition Apply new pumping signal.Wherein, single branch is shielded, needs in addition to apply two exciting current signals (that is, shielding electricity Stream).It is assumed that two end nodes of certain branch l are n1And n2, node voltage is expressed as Vn1And Vn2, (referred to as using Newton-Raphson Ox-daraf(reciprocal of farad)) algorithm, following nonlinear circuit non trivial solution, the i.e. electric current of exciting current (i.e. bucking current) can be acquired with iteration Value I1And I2:
Vl=Vn1-Vn2=f (I1,I2)=0;
Wherein, VlIndicate the voltage value of branch l.
In one exemplary embodiment, in a step 101, it calculates under bucking current excitation in the Circuit with tolerance Test node voltage calculated value section, may include:
It carries out the random assignment in range of tolerable variance respectively to each of Circuit with tolerance to be measured component parameter, obtains M parameter value of each component parameter, M are positive integer;
By combining the parameter value of all component parameters in the Circuit with tolerance, N group parameter value is formed, N is positive integer;
Simulation calculation is carried out to N group parameter value respectively under bucking current excitation, obtains N number of voltage of test node Calculated value;
Minimum value V is determined from obtained N number of voltage calculated valueminWith maximum value Vmax, and by section [Vmin, Vmax] really It is set to the voltage calculated value section of the test node.
In an illustrative embodiments, range of tolerable variance is carried out to each of Circuit with tolerance to be measured component parameter Interior random assignment obtains M parameter value of each component parameter, may include:
Each component parameter is pressed in range of tolerable variance using the nominal value of the component parameter as symmetrical centre Assignment is carried out according to normal distribution law, obtains M parameter value of each component parameter.
In one exemplary embodiment, in step 103, according to the test node stored in fault dictionary branch screen The voltage calculated value section under current excitation and the comparison result of test voltage value are covered, to determine whether the branch is failure branch Road may include: under the bucking current excitation of the branch, when the test voltage value of test node falls in voltage calculated value section Within, it is determined that the branch is fault branch;When the test voltage value of test node is not fallen within voltage calculated value section, Then determine that the branch does not have failure.
In one exemplary embodiment, in step 103, apply bucking current in Circuit with tolerance, collecting test node Test voltage value, may include: Circuit with tolerance select two can and node, circuit is applied to above-mentioned by control exciting current Two can and node apply bucking current, pass through control voltage automatic acquisition circuit collecting test node test voltage value.Its In, in the voltage calculated value determination process of test node and the collection process of test voltage value, bucking current is in analog signal The application node (i.e. two of selection can and node) of circuit needs consistent.Wherein, can and node be the node that can be reached, change Yan Zhi as can detecte the node of component parameter.
The embodiment of the present application passes through the specific incentives electric current (i.e. bucking current) for finding branch, and in the specific incentives electric current Excitation under so that this branch of tolerance analogue signal circuit will be shielded, after this branch is shielded, this branch Influence of the failure to tolerance analogue signal circuit just disappears, and the response of faulty circuit and faultless circuit is exactly identical at this time 's.The present embodiment is based on the above principles and combination failure dictionary designs built-in test system, realizes to tolerance analogue signal circuit Fault diagnosis, to realize the diagnosis to any soft fault of branch.
Fig. 2 is the schematic illustration of the fault dictionary BIT design method provided by the embodiments of the present application for Circuit with tolerance. Fig. 3 is a kind of example schematic diagram of the fault dictionary BIT design method provided by the embodiments of the present application for Circuit with tolerance.Such as figure Shown in 2 and Fig. 3, the fault dictionary BIT design method for Circuit with tolerance that the present exemplary embodiment provides includes following procedure.
Step 301, the current value for calculating and storing the bucking current of every branch in tolerance analogue signal circuit.
In the present embodiment, each component is really when considering component parameter tolerance, in fault-free network circuit Cut parameter value be also it is unknown, only know its value be nominal value ± tolerance limit within, therefore, component is used in simulation process When parameter value, due to the design parameter value of each component at this time be it is unknown, need to each component in circuit Parameter carries out multiple random assignment within its nominal value ± tolerance limit, according to normal distribution law, then again all first devices Part parameter value carries out random combine, forms the N group parameter value of entire circuit (usual N should take 300 or more).Then, for each Branch, solves the current value of bucking current, finds out the current value of N number of bucking current of certain branch of shielding respectively (if N takes 300, then for same branch, just corresponding there are 300 bucking currents).
In fact, being proved by sensitivity analysis and simulating, verifying: when the tolerance of component parameter it is smaller (be less than ± 5%, Or ± 3%, this is coincident circuit actual conditions) when, N number of bucking current of a certain branch of shielding is not much different, can be with Optional bucking current of the one as the branch.Based on this, the solution of the bucking current of certain branch is shielded, it can be directly using each The nominal value calculating of component parameter acquires.
For given nonlinear circuit (practical application circuit is all nonlinear circuit), it is assumed that the tolerance analog signal electricity There are single spur track failures on road, shield this single fault by non-zero exciting current, then fault network is with nominal network identical Port current excitation under, have identical port voltage, i.e., should meet following nonlinear equation:
Wherein, V1 fWithIndicate the port voltage of fault network, V1 0WithIndicate the port voltage of nominal network, I1With I2For the current value of the exciting current of port.
Above formula is rewritten as the following formula below:
Vl=Vn1(I1,I2)-Vn2(I1,I2)=0;
Wherein, VlIndicate the voltage value of any branch l, it is assumed that two end nodes of branch l are n1, n2, node voltage value can To be expressed as Vn1, Vn2.By the formula it is found that aranch voltage value is its exciting current value I1And I2Function.It can first fix wherein One current value I1ForWith I2For variable, I is solved using string position method (Newton-Raphson approach)2
The solution procedure of the current value of the bucking current of branch is illustrated below.
Step 1: selected two can and application node of the node as exciting current (i.e. bucking current), and will wherein one A exciting current value I1It is fixed as some definite value, another first provides two estimated value I21, I22, calculate nominal network N0In electricity StreamWithUnder motivating respectively, the branch circuit voltage value V of branch is specifiedb1And Vb2If Vb1、Vb2It is big In assigned error ε ', then step 2 is gone to, step 5 is otherwise gone to.
Step 2: once obtaining new exciting current value I according to the following formula iteration23, withExcitation is nominal Network N0, calculate the voltage value V of the branchb3:
I23=I22-[(I22-I21)/(Vb2-Vb1)]×Vb2
Step 3: judging Vb3Whether ε ' is less than, if Vb3< ε ' goes to step 5, otherwise goes to step 4;Wherein, ε ' is It is given close to zero small real number.
Step 4: judging whether the number of iterations is more than preset value, if the number of iterations is greater than preset value, then it is assumed that it does not restrain, It is reconfigurableI21Initial value, iteration again;Otherwise with (I22, Vb2), (I23, Vb3) replace (I21, Vb1), (I22, Vb2), It goes to step 2 and continues iteration.
Step 5: iteration terminates, exciting current value is stored(i.e. the current value of the bucking current of branch), In, I2jThe current value as finally acquired.
According to above-mentioned steps one to step 5, the current value that can find out the specific incentives electric current of each branch (i.e. should The current value of the bucking current of branch), which is mapped with the number of this branch, storage is in the database.
Wherein, the calculating of the current value of the bucking current of above-mentioned branch can use circuit simulating software and realize automatically, nothing Need to manually be established an equation resolving.
Step 302, calculate bucking current excitation under, consider component parameter tolerance when test node voltage calculated value Section, and store the voltage calculated value section.
In this step, using the aforementioned bucking current found out as pumping signal, according to ascending suitable of branch number Sequence successively applies the bucking current to given tolerance analogue signal circuit respectively (the original excitation of circuit applies together).
In the present embodiment, due to consideration that the influence of component parameter tolerance, cannot only press the mark of each component Claim parameter value to be emulated, needs to each component parameter in its tolerance limit, according to normal distribution law random assignment, And the random assignment of all single component parameters is carried out any combination, form the parameter of all components when emulation every time Value combination, the combining parameter values have N group (N generally should be greater than 300).When the exciting current for applying certain branch of shielding to circuit system Afterwards, one group of parameter value of all components is selected to carry out simulation calculation from the combination of above-mentioned parameter value respectively, tested One voltage calculated value of node;Under the excitation of same exciting current, the above-mentioned parameter value combining simulation of all components One time, N number of voltage calculated value can be obtained, by comparing this N number of voltage calculated value, finds out minimum value V thereinminAnd maximum value VmaxCome, when having tolerance but fault-free as circuit components, the voltage calculated value area of test node when corresponding branch is shielded Between [Vmin, Vmax].It should be noted that the simulation process has one " Monte Carlo simulation " order in dedicated emulated software, After inputting the tolerance of component, this order is executed, V can be instantly availableminAnd VmaxValue.
In this step, one group of exciting current of every application, calculates separately out tolerance according to above-mentioned same method and process The test voltage value section of test node in analogue signal circuit is come, and by the test voltage value interval value and branch number, The current value of bucking current is mapped, and storage is in the database.
Wherein, test node be tolerance analog circuit system in can and node, for example, can be to meet the following conditions Can and node: node voltage value is not zero relative to the sensitivity of all component parameters in tolerance analog circuit system (or spirit Sensitivity is extremely low).The number of test node can be one or more.However, the application does not limit this.
Step 303 establishes fault dictionary.
In this step, according to the current value of the aforementioned bucking current for each branch found out, and in the electricity Stream motivates the voltage calculated value section of lower test node, together with the number of corresponding branch, according to ascending sequence, corresponding Branch number, the current value of bucking current and the voltage calculated value section of test node be stored in number as one group of data According in library.
In other words, the dictionary information element stored in fault dictionary includes following three: the branch of analogue signal circuit is compiled Number, the current value of bucking current corresponding with branch, under the bucking current excitation test node voltage calculated value section.Than Such as, the data format of fault dictionary can be with are as follows:
【l1, I11, I12, V1 min, V1 max
【l2, I21, I22, V2 min, V2 max
【l3, I31, I32, V3 min, V3 max
……
【ln, In1, In2, Vn min, Vn max
Wherein, liIt indicates branch number (i=1,2,3 ..., n), Ii1, Ii2Indicate the electric current of the bucking current of corresponding branch i Value, Vi min, Vi maxIndicate the voltage calculated value interval limit and section upper limit value of one test node when corresponding branch i is shielded.
The use when fault dictionary that this step obtains can be for subsequent built-in test system fault diagnosis.
Step 304, built-in test process carry out fault diagnosis.
In the present exemplary embodiment, the design of BIT process is carried out according to the data element in aforementioned fault dictionary;Its In, it can be based on the current value of bucking current therein, and general general automatic testing circuit is combined to realize.
During BIT, as shown in Fig. 2, selected two can and application node of the node as specific incentives electric current, at this Apply and design electronic switch between node and excitation current source, when the systems are operating normally, which may be at turning off State does not influence the normal work of tolerance analogue signal circuit system.When need to tolerance analogue signal circuit system carry out machine When interior test, programmable current source is connected by the above-mentioned electronic switch of software control;The programmable current source can automatically generate faulty word The exciting current of numerical values recited is stored in allusion quotation, the application sequence of exciting current is exactly the number order of branch in fault dictionary, than As ascending, first apply the corresponding bucking current I of branch that branch number is 11, I2, tolerance analog signal is then tested automatically It is corresponding to continue to branch 2 if determining 1 fault-free of branch through fault diagnosis for the test voltage value of test node in circuit Bucking current, and measure the test voltage value of test node;So until orienting fault branch.
Wherein, the test voltage value of the test node in tolerance analogue signal circuit can be adopted by voltage automatic acquisition circuit Collection, voltage automatic acquisition circuit can be a general automatic data acquisition system, for example, may include electronic switch, mould Number (A/D) conversion circuit and corresponding digital memory circuit.However, the application does not limit this.
It in the present example embodiment, can be by test node after the test voltage value for obtaining above-mentioned test node The voltage calculated value section of test voltage value the stored test node corresponding with respective branch in fault dictionary compared Compared with.For example, if test voltage value meets: Vi min<Vi<Vi max, i.e., test voltage value is greater than the voltage calculated value interval limit stored Value and the section upper limit value for being less than storage then prove that this branch is fault branch, and diagnosis process terminates.If the test section measured The voltage calculated value section of the corresponding test node stored of this branch meets in the test voltage value and fault dictionary of point: Vi<Vi minOr Vi>Vi max, then prove that this branch does not have failure.At this point it is possible to which resuming studies from fault dictionary relaying removes a branch The current value of the specific incentives electric current on road, and by applying the specific incentives electric current automatically in analogue signal circuit, continue to acquire Can and test node test voltage value, and compared with the voltage calculated value section of the test node stored in fault dictionary Compared with being diagnosed fault according to comparison result;If this branch does not have failure, next branch is continued to test, until discovery failure Until branch.
It should be noted that switch, the voltage that can control exciting current access by software are automatic after the completion of BIT The switch of Acquisition Circuit access is in off-state, to restore the normal operating conditions of tolerance analogue signal circuit.
The embodiment of the present application carries out built-in test design for the tolerance analog circuit system of practical engineering, has preferable Practicability and extensive adaptability.The embodiment of the present application passes through the specific incentives electric current for finding branch, and in the specific incentives Under the excitation of electric current, so that this branch of tolerance analogue signal circuit will be shielded, after this branch is shielded, this branch Influence of the failure on road to analogue signal circuit just disappears, and the response of faulty circuit and faultless circuit is exactly identical at this time 's.The present embodiment is based on the above principles and combination failure dictionary designs built-in test system, realizes to tolerance analogue signal circuit Fault diagnosis, to realize the diagnosis to any soft fault of branch, and can be effectively treated and consider component parameter tolerance When diagnosis problem.
Fig. 4 is the schematic diagram of the fault dictionary BIT designing system provided by the embodiments of the present application for Circuit with tolerance.Such as figure Shown in 4, the fault dictionary BIT designing system provided in this embodiment for Circuit with tolerance, comprising: computing module 401, faulty word Allusion quotation establishes module 402 and BIT design module 403;Wherein, computing module 401 are suitable for calculating in analogue signal circuit to be measured The current value of the bucking current of at least one branch, and the test node in bucking current excitation Imitating signal circuit Voltage calculated value section;Fault dictionary establishes module 402, is adapted to set up the fault dictionary of analogue signal circuit, wherein failure The identification information of branch in stored analog signals circuit in dictionary, every branch bucking current current value and at any The bucking current on road motivates the voltage calculated value section of lower test node;Built-in test designs module 403, is suitable in BIT process In, according to the current value of the bucking current of any bar branch of fault dictionary storage, apply shielding electricity in analogue signal circuit Stream, the test voltage value of collecting test node;According to the test node stored in fault dictionary the branch bucking current The comparison result in voltage calculated value section and test voltage value under excitation, to determine whether the branch is fault branch.
In an illustrative embodiments, computing module 401 may be adapted to be calculated in the following manner in the shielding electricity The voltage calculated value section of test node under stream excitation in the Circuit with tolerance:
It carries out the random assignment in range of tolerable variance respectively to each of Circuit with tolerance to be measured component parameter, obtains M parameter value of each component parameter, M are positive integer;
By combining the parameter value of all component parameters in the Circuit with tolerance, N group parameter value is formed, N is positive integer;
Simulation calculation is carried out to N group parameter value respectively under bucking current excitation, obtains N number of voltage of test node Calculated value;
Minimum value V is determined from obtained N number of voltage calculated valueminWith maximum value Vmax, and by section [Vmin, Vmax] really It is set to the voltage calculated value section of the test node.
In an illustrative embodiments, computing module 401 may be adapted in the following manner to Circuit with tolerance to be measured Each of component parameter carry out range of tolerable variance in random assignment, obtain M parameter value of each component parameter: For each component parameter, using the nominal value of the component parameter as symmetrical centre, according to normal state point in range of tolerable variance Cloth rule carries out assignment, obtains M parameter value of the component parameter.
In an illustrative embodiments, built-in test design module 403 may be adapted in the following manner according to failure Voltage calculated value section and the test of the test node stored in dictionary under the bucking current excitation of the branch The comparison result of voltage value, to determine whether the branch is fault branch:
Under the bucking current excitation of the branch, when the test voltage value of the test node falls in voltage calculated value area Between within, it is determined that the branch be fault branch;When the test voltage value of the test node does not fall within voltage calculated value Within section, it is determined that the branch does not have failure
In addition, the related description about the fault dictionary BIT designing system provided in this embodiment for Circuit with tolerance can With the description referring to above method embodiment, therefore repeated no more in this.
In addition, the embodiment of the present application also provides a kind of computer-readable medium, it is stored with the faulty word for Circuit with tolerance Allusion quotation BIT designs program, and fault dictionary BIT design program is performed the faulty word realized and be directed to Circuit with tolerance as described above Allusion quotation BIT designs the step of program, such as Fig. 1 or step shown in Fig. 3.
It will appreciated by the skilled person that whole or certain steps, system, dress in method disclosed hereinabove Functional module/unit in setting may be implemented as software, firmware, hardware and its combination appropriate.In hardware embodiment, Division between the functional module/unit referred in the above description not necessarily corresponds to the division of physical assemblies;For example, one Physical assemblies can have multiple functions or a function or step and can be executed by several physical assemblies cooperations.Certain groups Part or all components may be implemented as by processor, such as the software that digital signal processor or microprocessor execute, or by It is embodied as hardware, or is implemented as integrated circuit, such as specific integrated circuit.Such software can be distributed in computer-readable On medium, computer-readable medium may include computer storage medium (or non-transitory medium) and communication media (or temporarily Property medium).As known to a person of ordinary skill in the art, term computer storage medium is included in for storing information (such as Computer readable instructions, data structure, program module or other data) any method or technique in the volatibility implemented and non- Volatibility, removable and nonremovable medium.Computer storage medium include but is not limited to RAM, ROM, EEPROM, flash memory or its His memory technology, CD-ROM, digital versatile disc (DVD) or other optical disc storages, magnetic holder, tape, disk storage or other Magnetic memory apparatus or any other medium that can be used for storing desired information and can be accessed by a computer.This Outside, known to a person of ordinary skill in the art to be, communication media generally comprises computer readable instructions, data structure, program mould Other data in the modulated data signal of block or such as carrier wave or other transmission mechanisms etc, and may include any information Delivery media.

Claims (9)

1. a kind of fault dictionary built-in test design method for Circuit with tolerance characterized by comprising
The current value of the bucking current of at least one branch in Circuit with tolerance to be measured is calculated, and is motivated in the bucking current Under test node in the Circuit with tolerance voltage calculated value section;
The fault dictionary of the Circuit with tolerance is established, the mark of branch described in the Circuit with tolerance is stored in the fault dictionary Information, every branch bucking current current value and under the bucking current excitation of any branch the test node electricity Press calculated value section;
During built-in test, according to the current value of the bucking current of any bar branch of fault dictionary storage, in institute It states Circuit with tolerance and applies the bucking current, acquire the test voltage value of the test node;
It is calculated according to voltage of the test node stored in the fault dictionary under the bucking current excitation of the branch It is worth the comparison result in section and the test voltage value, to determine whether the branch is fault branch.
2. the method according to claim 1, wherein described calculate the tolerance under bucking current excitation The voltage calculated value section of test node in circuit, comprising:
It carries out the random assignment in range of tolerable variance respectively to each of Circuit with tolerance to be measured component parameter, obtains each M parameter value of a component parameter, M are positive integer;
By the parameter value of all component parameters in the combination Circuit with tolerance, the N group parameter value of the Circuit with tolerance is formed, N is positive integer;
Simulation calculation is carried out to N group parameter value respectively under bucking current excitation, the N number of voltage for obtaining test node calculates Value;
Minimum value V is determined from obtained N number of voltage calculated valueminWith maximum value Vmax, and by section [Vmin, Vmax] be determined as The voltage calculated value section of the test node.
3. according to the method described in claim 2, it is characterized in that, described to each of Circuit with tolerance to be measured component Parameter carries out the random assignment in range of tolerable variance respectively, obtains M parameter value of each component parameter, comprising:
For each component parameter, using the nominal value of the component parameter as symmetrical centre, according to just in range of tolerable variance The state regularity of distribution carries out assignment, obtains M parameter value of the component parameter.
4. the method according to claim 1, wherein described according to the test stored in the fault dictionary The comparison result in voltage calculated value section and the test voltage value of the node under the bucking current excitation of the branch, comes true Whether the fixed branch is fault branch, comprising:
The branch bucking current excitation under, when the test voltage value of the test node fall in voltage calculated value section it It is interior, it is determined that the branch is fault branch;When the test voltage value of the test node does not fall within voltage calculated value section Within, it is determined that the branch does not have failure.
5. a kind of fault dictionary built-in test designing system for Circuit with tolerance characterized by comprising
Computing module, suitable for the current value of the bucking current of at least one branch in calculating Circuit with tolerance to be measured, and in institute State the voltage calculated value section of the test node under bucking current excitation in the Circuit with tolerance;
Fault dictionary establishes module, is adapted to set up the fault dictionary of the Circuit with tolerance, the appearance is stored in the fault dictionary The identification information of branch described in difference circuit, every branch bucking current current value and bucking current in any branch The voltage calculated value section of the test node under excitation;
Built-in test designs module, is suitable for during built-in test, according to any bar branch of fault dictionary storage The current value of bucking current applies the bucking current in the Circuit with tolerance, acquires the test voltage value of the test node; According to voltage calculated value area of the test node stored in the fault dictionary under the bucking current excitation of the branch Between comparison result with the test voltage value, to determine whether the branch is fault branch.
6. system according to claim 5, which is characterized in that the computing module, suitable for calculating in the following manner The voltage calculated value section of test node under the bucking current excitation in the Circuit with tolerance:
It carries out the random assignment in range of tolerable variance respectively to each of Circuit with tolerance to be measured component parameter, obtains each M parameter value of a component parameter, M are positive integer;
By the parameter value of all component parameters in the combination Circuit with tolerance, the N group parameter value of the Circuit with tolerance is formed, N is positive integer;
Simulation calculation is carried out to N group parameter value respectively under bucking current excitation, the N number of voltage for obtaining test node calculates Value;
Minimum value V is determined from obtained N number of voltage calculated valueminWith maximum value Vmax, and by section [Vmin, Vmax] be determined as The voltage calculated value section of the test node.
7. system according to claim 6, which is characterized in that the computing module is suitable in the following manner to be measured Each of Circuit with tolerance component parameter carries out the random assignment in range of tolerable variance respectively, obtains each component parameter M parameter value:
For each component parameter, using the nominal value of the component parameter as symmetrical centre, according to just in range of tolerable variance The state regularity of distribution carries out assignment, obtains M parameter value of the component parameter.
8. system according to claim 5, which is characterized in that the built-in test designs module, is suitable for by with lower section Voltage calculated value of the formula according to the test node stored in the fault dictionary under the bucking current excitation of the branch The comparison result in section and the test voltage value, to determine whether the branch is fault branch:
The branch bucking current excitation under, when the test voltage value of the test node fall in voltage calculated value section it It is interior, it is determined that the branch is fault branch;When the test voltage value of the test node does not fall within voltage calculated value section Within, it is determined that the branch does not have failure.
9. a kind of computer-readable medium, which is characterized in that be stored with the fault dictionary built-in test design for Circuit with tolerance Program, the fault dictionary built-in test design program are performed realization and are directed to according to any one of claims 1 to 4 The step of fault dictionary built-in test design method of Circuit with tolerance.
CN201910857560.1A 2019-09-09 2019-09-09 A kind of fault dictionary built-in test design method and system for Circuit with tolerance Pending CN110531251A (en)

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