CN1094799C - Ti和W合金上浸渍沉积钯以选择性引发无电沉积制作晶片 - Google Patents

Ti和W合金上浸渍沉积钯以选择性引发无电沉积制作晶片 Download PDF

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CN1094799C
CN1094799C CN96198978A CN96198978A CN1094799C CN 1094799 C CN1094799 C CN 1094799C CN 96198978 A CN96198978 A CN 96198978A CN 96198978 A CN96198978 A CN 96198978A CN 1094799 C CN1094799 C CN 1094799C
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R·R·奥贝勒
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MacDermid Enthone Inc
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
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    • C23C18/1824—Pretreatment of the material to be coated of metallic material surfaces or of a non-specific material surfaces by chemical pretreatment
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Abstract

本文涉及一种制造集成电路晶片的方法，其中晶片中具有通道或其它通路，该通路具有屏障层/粘合层或其它金属层，该金属层被金属化，以形成含有活化金属层的电路，然后用优选含有碱性的钯的非氨型氮(乙二胺)配合物的敏化置换组合物，在特别控制的pH下与晶片接触以敏化金属层。用含有配位任何溶解的金属的配位剂的活化溶液活化晶片。敏化溶液也优选含有能配位任何溶解的金属的配位剂，并优选含有辅助配位剂例如EDTA以增溶贱金属(base metal)杂质。

Description

Ti和W合金上浸渍沉积钯以选择性 引发无电沉积制作晶片
发明领域
本发明涉及在金属表面的无电金属沉积，特别是涉及一种用于在硅晶片上形成金属电路的无电金属沉积方法，其中在晶片上具有金属电路图形，在晶片衬底和沉积金属之间包含有金属屏障层。
发明背景
在硅晶片上制作集成电路要使用一系列步骤以制成晶片成品。在部分制备方法中，晶片被沉积一层二氧化硅(SiO2)，并且该SiO2或合适的介质被刻蚀，以便在晶片上形成通道或电路通道，该通道基本上是在SiO2层上形成的并在延伸到硅层的通路。然后电路通道被填充以导电金属，以形成完成的电路。已周知，集成电路生产是非常严格和困难的，因为加工方法必须高度可靠且产品晶片基本是零缺陷的。
现有的晶片金属化方案是在通路中的先前涂敷有TiW或其它合适的屏障层/粘合层上使用溅射或蒸发的Al-Cu合金，以填充通路并完成电路。此技术在生产小于2-2.5微米线宽的电路并完全地填充高与宽的纵横比大于1的通道方面存在严重的缺点。在高的纵横比情况下，由不良填充而产生的接缝和空隙不仅产生电的不连续性和高的通道电阻，而且在后续加工步骤中引起杂质的夹带，这又经常会导致可靠性问题。本发明的金属化方案试图消除这些问题并使用化学蒸气沉积(CVD)或溅射Al-Cu作为电路金属，但金属例如铝的沉积涉及许多困难并需要非常细心。也研究过定向的溅射的应用，但特别在小尺寸和高的纵横比情况下控制非常困难。
从电性能考虑，晶片的金属化要求使用各种金属例如镍或优选使用铜，但是这些金属和特别是铜具有许多缺点，例如倾向于通过金属屏障层或粘合层扩散到硅中。刻蚀铜以产生要求的精细的线状电路图形也很困难，并且用于沉积铜的CVD过程遇到涉及选择性和处理温度的许多复杂因素。因此，采用低温湿法处理技术例如无电铜沉积是很有用的，该方法较经济和易于使用。
用无电铜沉积制备电子器件的方法在美国专利No.5,308,796(Feldman等)和由共发明人Cecilia Mak撰写，在MRSBULLETIN/August1994，Vol.XIX，No.8，55-62页发表的题为“在金属和金属硅化物上的无电铜沉积”(Electroless copper deposition onmetals and metal silicides)的有关文章中给出。专利及文章均引此作为参考。一般地是在刻蚀硅晶片上的二氧化硅所刻划出的电路图形上先沉积一薄层催化材料，特别是钯。经退火将邻近硅表面的钯转变为Pd2Si，而在SiO2上的Pd不发生反应。然后用选择性刻蚀除去未反应的Pd，在通道的底部只留下Pd2Si，该物质覆盖硅表面。随后的无电铜沉积只在催化Pd2Si区域内发生。不幸地，这种方法尚有缺点，因为整个晶片必须涂覆以钯层，然后该钯层必须被选择性地刻蚀掉而留下含有Pd2Si的所需电路区域。这是一件困难的工作，且除了在所要求的区域之外，晶片上剩余的钯会造成有害的沉积层和由通道中的空隙和其它沉积问题造成有缺陷的晶片。然后刻蚀溶液必须经废液处理，以回收钯，这又带来不可避免的处理和处置问题。
在Mak的上述文章中，给出的另一种成图形方案是依靠通道底部的薄层钨膜的选择性CVD。通道底部的暴露的硅将沉积的六氟化钨还原成钨金属，该金属薄膜用作后续无电铜沉积的晶核层和扩散屏障层。但是已注意到，此方法在引晶步骤期间，有在钨层下面形成蛀孔似的缺陷的可能，并且完全由硅还原形成的钨膜可能孔太多而不能作为扩散屏障层。
目前，优选制备技术是通过CVD在通道底部形成钨合金膜例如TiW膜，并用CVD技术使通道金属化。一种方法是采用CVD技术用贵金属通常是金来涂覆TiW，该金层作为进一步互连金属化的氧化保护和低电阻接触，但是，本技术尚不十分满意，故期求更有效的技术以使具有钨合金或其它金属屏障层的通道金属化。
无电沉积是通过化学还原在催化表面化学沉积金属或金属混合物，无电金属沉积的组合物和方法在引此作为参考的美国专利No.3,011,920已公开。如果欲沉积金属的衬底是惰性的--即对金属沉积是非催化的，则通常的沉积方法包括预处理以促进清洁和粘合，沉积之前用合适的沉积催化剂处理使衬底催化，以使表面呈催化性以加速本技术接下来的无电金属沉积。
用于无电沉积方法中的商用催化剂包括由基本上摩尔过量的二价锡与钯离子在盐酸溶液中的反应产物。反应产物被认为是锡钯胶体。可以认为，氧化的四价锡与未反应的二价锡与钯离子结合，形成保护性的，可能是聚合的钯或钯-锡合金的配合物，而未反应的二价锡离子作为抗氧剂。
引此参考的美国专利No.3,904,792公开了对胶体锡钯催化的改进。在该专利中，提供了一种催化剂，比上述美国专利No.3,011,920中公开的酸性要低，其中一部分盐酸用可溶金属卤化酸性盐代替，得到具有pH接近3.5的更稳定的催化剂。
在该技术中，已知用由二价锡与贵金属离子的反应产物所形成的催化剂，处理顺序一般包括衬底的催化、通常用酸例如氟硼酸或高氯酸对催化层的加速，和无电金属沉积等步骤。已知加速步骤是用于活化钯催化剂，增强沉积反应的引发，并降低对欲沉积区域全部覆盖所需的沉积时间。
但不幸的是，一般的无电沉积方法不能被用于沉积硅晶片，由于它们缺乏选择性，以致该催化剂将催化整个晶片，除非将催化剂从不需要的区域除去，否则不需要的沉积将产生有缺陷的部分。
为方便起见，下面的描述将针对硅晶片集成电路和钨基合金，特别是TiW合金用作欲无电沉积的金属化屏障层，但是熟知本技术领域的人应明白本发明是针对敏化用于在其上进行无电金属沉积的其它金属和金属合金，这些金属可用于制造集成电路或其它类型的电路或要求金属化的产品。例如，铝被通常用作导体层，该层被金属化以提供成品。铝的一种应用是作芯片连接焊盘例如称为C4焊盘的可控失稳芯片连接焊盘。C4焊盘是支撑将芯片连接到衬底例如薄膜衬底的C4焊料球的微穴。引此作参考中的美国专利No.5,243,140给出了典型的C4焊盘。
考虑到先前技术的问题和缺点，本发明的目的是提供催化钨和钨基合金以及其它金属和金属合金的一种方法，用于在其上进行无电金属沉积，特别是镍和无电铜沉积。
本发明的进一步目的是提供一种用于在钨基合金以及其它金属和金属合金上无电金属沉积例如铜的金属化方法，以制备集成电路晶片，该晶片是高度可靠的，几乎不产生由无电金属沉积方法造成的次品，即使有也极少。
本发明的另一目的是提供一种组合物，以敏化用于无金属沉积的钨和钨基合金以及其它金属和金属合金。
本发明的另一目的，是提供具有增强的金属与金属粘合性及其它特性的制造集成电路的晶片。
本发明的再一个目的，是铝和其它金属焊盘，例如C4焊盘，可以被催化用于无电金属沉积，以作为C4焊接方法的一部分，由此C4焊料凸缘被附着在带中间金属层例如无电沉积镍层的焊盘。
本发明的另一些目的和优点将从说明书中进一步显示出来。
发明内容
在集成电路晶片和其它电子器件的生产中，其中金属被沉积在所要求的屏障金属层上，且基本不敏化和/或不沉积在器件的其它区域，对于用作屏障层/粘合层的金属及金属合金上的选择性无电金属沉积和特别是钨和钨基合金层上的沉积，现已发现本发明的目的和优点包括：
取决于欲沉积的金属，必要时用活化溶液与含金属层的，例如钨基合金的晶片接触，以除去任何氧化层和/或刻蚀金属层。该活化溶液包含能与刻蚀过的金属形成配合物的配位剂，优选含有螫合剂例如乙二胺四乙酸(EDTA)以螯合金属杂质例如铁、镍、铜等；
用敏化置换溶液与活化过的晶片接触，该溶液置换屏障层金属，并以含有催化金属配合物，最好是碱性的钯的非氨型氮配合物的敏化金属来置换它，这种配位剂能与接触时产生的溶解金属形成配合物以催化欲沉积的金属，最好是一种螫合剂如EDTA，以螯合金属杂质例如铁、镍、铜等；
漂洗敏化过的晶片；和
用无电金属沉积浴进行晶片的无电沉积，优选沉积铜。
活化钨和钛及其合金的溶液优选为含具有碱性pH溶液的氟化物。对屏障层或其它金属层例如铝，优选为含HF和/或HCl的酸性蚀刻剂。本发明的一个重要特征是敏化置换溶液优选包含催化金属例如钯，且为非氨型氮配合物的形式，例如钯和乙二胺配合物，并且对Ti和W及其合金，溶液的pH控制在约9-13，优选为10-12，由此得到了增强的衬底敏化度和选择性沉积。对铝金属衬底，更为优选的pH范围为10.5-11。
本发明的实施方法
根据本发明方法，优选被金属化的硅晶片包括具有二氧化硅或其它介电层的硅衬底。二氧化硅层中的通道或其它通路是用扩散金属层例如钨基合金如TiW并采用例如CVD方法来提供的，此层必须进行金属化，通道被填充以提供集成电路晶片所要求的线路。
硅晶片和集成电路芯片的制造在现有技术中是周知的，并在SorabK.Ghandhi，John Wiley & Sons，1983年所著VLSI FabricationPrinciples(Silicon and Gallium Arsenide)中有描述。
一般地，硅晶片上沉积有厚约1-5μm的二氧化硅层，该层经刻蚀成通道或其它通路的形式，并从二氧化硅层延伸到硅层，以提供要求的的电路图形。金属层典型地是钨基合金作为扩散层、屏障层和/或粘合层，并用例如化学蒸气沉积(CVD)的技术沉积在电路通路(通道)底部的硅层上。钨基合金的厚度一般约200-1000埃，但可以有很宽的变化。可用作屏障层/粘合层的金属或合金例子包括TiW，W，Cr，Al和Ta。
本发明的重要特征是在金属化处理期间屏障层的厚度不会受影响，例如厚度减小，否则金属的屏障特性将会降低以至造成例如后续无电金属沉积通过屏障层向硅中扩散及造成有缺陷的晶片。
本发明的起始步骤是根据欲沉积的金属，必要时活化金属屏障层。不管是何金属屏障层，活化是特别优选的，且此步骤对合金例如TiW是必要的，因它在表面上形成氧化物或其它膜，对其它合金也许是不需要的，这取决于它们的物理和/或化学性质。如果需要活化，活化溶液大致是一种能除去氧化层和/或溶解(蚀刻)金属的溶液，以形成清洁且无氧化物的表面。溶液可以是酸性或碱性的，对沉积有SiO2的具有Ti/W屏障层的硅晶片优选碱性溶液，对铝屏障层晶片优选酸性溶液。优选的碱性活化溶液含有由盐例如0.5-3％(重量)或更高的NaF的溶液提供的氟离子，其它活化剂包括铵和钠的二氟化物。酸性刻蚀剂可以含有例如HF或HBF4。优选使用螫合剂例如EDTA，其量约1g/l或更高。其它螫合剂可以选自广泛的物质例如乳酸，苹果酸和那些含有阴离子例如醋酸根、柠檬酸根、乙醇酸根、焦磷酸根等的物质。活化溶液一般在温度高达80℃或更高下使用，对于铝优选为25-50℃，活化时间为10-60秒或更长。
活化步骤后最好不漂洗晶片，而将活化的晶片直接从活化步骤转入钯敏化置换配合物溶液。
敏化溶液一般称为置换溶液，并可以含有任何催化金属例如钯和镍，并优选钯。理论上认为催化金属例如钯是呈配合物的形式，且优选配合物为氮配合物(非氨配合物)例如特别优选乙二胺钯配合物，如在“贵金属科学和技术”(Precious Metals Scienceand Technology)，Benner，Suzuki，Meyuro和Tanaka，Publ.International PreciousInst.，1991中描述的，该出版物列此以作参考。配合物化学式为PdCl2(C2H8N2)，并可通过混合K2PdCl4与乙二胺(ED)并加热溶液来制备。尽管在敏化溶液中最好保持较低的自由ED，但通常对敏化溶液优选的ED与Pd的摩尔比大于约4∶1，更优选约4∶1至5∶1，如约5∶1，并可更高，敏化溶液中催化金属的量一般约为0.1-10％(重量)，优选0.5-3％(重量)。
钯敏化溶液也优选含有配位剂例如NaF形式的氟离子，以络合从金属/氧化物层中除去的金属离子。用量可以在约1-5％的宽范围内变化，优选一般使用2-4％(重量)NaF。溶液中还优选含有配位剂例如EDTA和螯合剂，例如那些上述用于刻蚀溶液中的螯合剂，其量约为1g/l或更高，以螯合杂质离子例如铁、镍和铜。
当在Ti/W合金屏障层上使用优选的ED/Pd配合物时，假定发生下列反应：
本发明的重要特征是浸渍沉积溶液的pH特别控制在9-13的范围，优选pH为10-12，通常用酸例如稀HCl或碱例如NaOH调节pH到要求的水平。对敏化铝，pH为10.5-11是特别优选的。已发现，敏化溶液的pH对控制置换反应是重要的，在上述范围之外的值，则不能提供集成电路制造所需的可靠性。
如果必要，前述已活化的金属化晶片与上述钯催化配合物敏化剂溶液接触以催化金属屏障层。通常，钯配合物溶液的使用温度对Ti/W合金约为25-80℃，对铝为25-60℃，接触时间为10-60秒，优选10-30秒。
本发明的一个重要益处是，在浸入钯配合物溶液后，金属化的晶片不需进一步处理，而在先技术中，通常要用还原剂溶液将钯离子还原为钯金属。晶片被催化后加以漂洗并备用于无电金属沉积。已周知，无电金属沉积方法典型地采用含PdCl2-SnCl2-HCl的催化剂溶液，由于锡的还原作用，该催化剂在欲沉积表面提供金属钯。这些溶液不能在本发明中使用，由于它们有限的操作范围会造成生产可靠性问题，这些溶液浴在美国专利3,011,920中有示例。使用催化置换配合物溶液例如ED-Pd配合物对敏化金属层提供了高选择性，而不会对电子器件其余部分例如对二氧化硅的显著的敏化，并提供了大的操作范围，其浸渍时间和温度可以有较大的变化，而不会由于在器件不需要的区域发生沉积而造成有缺陷的晶片。
无电铜浴在工业上是熟知的，且任何无电铜浴均可用于本发明方法中。尽管无电铜是优选的金属，但其它无电浴例如无电镍、Ni-Co、Co等也可以使用。为方便起见，下列描述将针对无电铜沉积浴。
明确地说，无电铜浴含有：1)铜离子源，2)还原剂例如甲醛，3)酸或氢氧化物调节剂，以提供所要求的pH和4)足以防止金属离子在溶液中沉淀的金属离子配位剂。用于沉积无电铜的组合物在美国专利4,171,225中有描述，该专利引此作参考。
如果要用无电镍浴，在美国专利2,690,401；2,690,402；2,762,723；2,935,425；和3,338,726中有示例。沉积铜和镍的其它有用的组合物在63rd Guide Book and Directory Issue of the MetalFinishing for January 19，1995，Vol.93，No.1A，ElsevierSceince，Inc.，402页中有描述。前述专利和出版物引此作参考。
根据用无电铜或是用无电镍来沉积晶片的金属化层，其沉积条件可依沉积速率和要求的沉积类型而变化。对用酸浴的无电铜，一般使用的温度约50-70℃，时间高达60分钟，通常为20-40分钟。对无电镍浴，无论碱性或酸性，常用浸渍时间约10-60分钟，优选15-25分钟，温度约60-85℃。
本领域技术人员均知晓，无电金属沉积的速率会受各种因素影响，包括1)沉积溶液的pH，2)还原剂的浓度，3)沉积浴的温度，4)可溶金属的浓度，5)浴体积与沉积面积之比，6)速率促进剂的存在，7)润湿剂和/或搅拌的存在，且提供上述参数只是为实践本专利给出一般指导。
本发明的组合物和方法将用下列实施例更全面地阐述，这些实例是说明性的，绝非对所有的以重量计的百分比和以摄氏计的温度加以限制，除非另加说明。
实施例
直径为6英寸和含有许多分开的芯片的硅晶片，其上有二氧化硅沉积层，该沉积层被刻蚀形成要求的电路图形作为通道。晶片用CVD方法金属化，在刻蚀过的通道的底部沉积厚度为约500埃的TiW金属化层。晶片的TiW层经浸入80℃的10g/lNaF溶液中40秒被活化。活化的晶片未经漂洗而直接转移到含5g/l钯的钯催化剂敏化剂溶液中，其中钯是以ED/钯配合物的形式存在，且ED/Pd的摩尔比为4∶1，含NaF 20g/l和EDTA 1g/l。溶液的pH保持在10.5-11，且晶片浸入80℃溶液中30秒。浸渍之后，该晶片在去离子水中彻底漂洗，用商用的碱性无电镍浴沉积金属。晶片浸入85℃浴中40分钟以沉积金属，并生成具有金属与金属粘合沉积的、并通过粘贴带刻痕检验的商用可接受的沉积有金属的晶片产品。沉积的形态与用通常沉积方法得到的沉积的形态相似。
尽管本发明以结合优选实施方案进行了具体描述，但显然，根据前述，许多替换、修改和变化对本领域技术人员将是显而易见的。因此期望，附后的权利要求将包含符合本发明的原理和实质范围的任何这类替换、修改和变化。

Claims (13)

1.一种在制造沉积有介质材料层的硅集成电路晶片中所使用的Ti、W、Ti/W合金、铝或铝合金金属层上进行无电金属沉积的方法，该方法包括：
在晶片的介质层中以通道或其他通路的形式形成所要求的电路图形，该通道或其他通路由介质层延伸到硅层；
在通道或其他通路中的硅层上沉积金属层；
通过用活化溶液与晶片接触以活化晶片的金属层，该活化溶液除去金属层氧化物和/或刻蚀金属表面，该活化溶液是酸性或是碱性的并包含一种配位剂，以与在活化步骤期间可以被除去的金属形成配合物；
通过使含有敏化金属非氨型氮配合物以敏化金属层的碱性敏化溶液组合物与晶片接触，以敏化晶片的活化金属层；和
通过使无电金属沉积溶液与晶片接触，以在晶片上的敏化过的金属层上进行无电金属沉积，其中金属沉积在敏化过的金属层上，而基本不沉积在晶片的其他区域。
2.权利要求1的方法，其中待沉积的金属层是Ti、W或Ti/W合金。
3.权利要求2的方法，其中活化溶液也含有螯合剂以螯合金属杂质。
4.权利要求3的方法，其中螯合剂螯合的金属为铁、镍和铜。
5.权利要求3的方法，其中活化溶液为碱性的。
6.权利要求5的方法，其中活化溶液含有氟化物离子作为配位剂。
7.权利要求6的方法，其中敏化金属是钯。
8.权利要求7的方法，其中敏化溶液的pH约为10-12。
9.权利要求8的方法，其中配合物是钯-乙二胺配合物。
10.权利要求9的方法，其中乙二胺与钯的摩尔比约为4∶1-5∶1。
11.权利要求1的方法，其中待沉积的金属层是铝，活化溶液是酸性的。
12.权利要求11的方法，其中敏化组分是钯非氨氮配合物。
13.权利要求12的方法，其中敏化溶液的pH约为10.5-11，配合物为钯-乙二胺配合物。
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US6261637B1 (en) 2001-07-17
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CA2238490A1 (en) 1997-06-26
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