CN109449139A - The preparation method of semiconductor devices and telltale mark - Google Patents
The preparation method of semiconductor devices and telltale mark Download PDFInfo
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- CN109449139A CN109449139A CN201811129229.XA CN201811129229A CN109449139A CN 109449139 A CN109449139 A CN 109449139A CN 201811129229 A CN201811129229 A CN 201811129229A CN 109449139 A CN109449139 A CN 109449139A
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- semiconductor layer
- marker region
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- region
- semiconductor devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
Abstract
The invention discloses the preparation methods of a kind of semiconductor devices and telltale mark, wherein semiconductor devices includes semiconductor layer；Marker region is formed in the semiconductor layer；Wherein, the marker region is obtained by injecting Doped ions into the semiconductor layer；Ion doping concentration in the marker region is 1 × 1015~1 × 1019cm‑3.Since marker region is formed in semiconductor layer by way of ion implanting, avoiding to form non-locating marked region caused by metal layer in semiconductor layer surface and precipitate has metal ion；It is subsequent when using the preparation of other techniques is carried out with the semiconductor layer of marker region, since the scattered power and reflectivity difference of marker region and non-locating marked region boundary are larger, preferable alignment result can be reached, improve the positioning accuracy of the telltale mark.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to the preparation method of a kind of semiconductor devices and telltale mark.
Background technique
Semiconductor devices is the electronic device for being completed specific function using semiconductor material specific electrical properties, can be used to
Generation, control, reception, transformation, amplified signal and progress energy conversion.Its apply and its extensively, from the electronics system of consumer field
Industry (comprising computer, digital product, white domestic appliances etc.) is made to Industry Control class (power equipment, rail traffic, electric car, light
Volt etc.) field almost all be applicable in.
It wherein, in the semiconductor device, is usually to pass through ion implanting when forming the semiconductor regions of each conduction type
Mode realize, and in ion implanting it needs to be determined that the position of ion implanting.Therefore, usually in the system of semiconductor devices
During standby, several telltale marks are needed to form, ion implanting or the position of other preparation processes are determined by telltale mark.
In the prior art, the method for telltale mark is formed on the semiconductor layer for deposited metal layer on the semiconductor layer, so
Metal layer is patterned using photoresist afterwards, to obtain telltale mark.However, this method is due to before patterning,
It is deposited with metal layer on the semiconductor layer, will cause semiconductor layer surface metallic pollution；That is, non-locating marked region can also
It can remain metal.Due to, it is subsequent when carrying out the preparation of other film layers using telltale mark, it is that will be formed with telltale mark
Semiconductor layer to influence the positioning accuracy of telltale mark.
Summary of the invention
In view of this, the embodiment of the invention provides the preparation method of a kind of semiconductor devices and telltale mark, to solve
The low problem of the positioning accuracy of telltale mark.
According in a first aspect, the embodiment of the invention provides a kind of semiconductor devices, comprising:
Semiconductor layer；
Marker region is formed in the semiconductor layer；Wherein, the marker region is by described half
Injection Doped ions obtain in conductor layer；Ion doping concentration in the marker region is 1 × 1015~1 ×
1019cm-3。
Semiconductor devices provided in an embodiment of the present invention, wherein marker region is formed in by way of ion implanting
In semiconductor layer, avoid semiconductor layer surface formed metal layer caused by non-locating marked region precipitating have metal from
Son；It is subsequent when using the preparation of other techniques is carried out with the semiconductor layer of marker region, due to marker region
It is larger with the scattered power and reflectivity difference of non-locating marked region boundary, preferable alignment result can be reached, improved
The positioning accuracy of the telltale mark.
With reference to first aspect, in first aspect first embodiment, the upper surface of the marker region with it is described
The upper surface of semiconductor layer is concordant.
Semiconductor devices provided in an embodiment of the present invention is arranged marker region is concordant with semiconductor layer, Neng Goubao
Card is more apparent in the marker region and non-locating marked region of semiconductor layer surface, is convenient for the later use telltale mark area
Domain is aligned.
With reference to first aspect, in first aspect second embodiment, the upper surface of the marker region with it is described
The upper surface of semiconductor layer is separated by pre-determined distance.
With reference to first aspect, in first aspect third embodiment, the injection depth of the Doped ions is 0~3 μm.
With reference to first aspect, in the 4th embodiment of first aspect, the resistivity of the semiconductor layer is 0.001~
0.1Ω·cm。
Semiconductor devices provided in an embodiment of the present invention, since resistivity is the semiconductor devices electricity for determining finally to prepare
It is preferable can to guarantee that the semiconductor devices prepared has by the way that suitable resistivity is arranged for the base values for learning parameter quality
Electrical parameter.
With reference to first aspect, in the 5th embodiment of first aspect, the semiconductor layer includes:
Substrate；
Epitaxial layer is formed on the surface of the substrate；Wherein, the marker region is formed in the epitaxial layer
It is interior.
5th embodiment with reference to first aspect, in first aspect sixth embodiment, the thickness of the semiconductor layer
It is 200~700 μm；The epitaxial layer with a thickness of 0~300 μm.
With reference to first aspect or first aspect any embodiment, in the 7th embodiment of first aspect, the doping
Ion is one of aluminium ion, boron ion, carbon ion or Nitrogen ion.
According to second aspect, the embodiment of the invention provides a kind of preparation methods of semiconductor devices, comprising:
Semi-conductor layer is provided；
With 1 × 1011~1 × 1015cm-3Implantation dosage inject Doped ions into the semiconductor layer, with formed positioning
Marked region.
The preparation method of semiconductor devices provided in an embodiment of the present invention, wherein partly led by way of ion implanting
Marker region is formed in body layer, and it is heavy to avoid the non-locating marked region caused by semiconductor layer surface formation metal layer
There is metal ion in shallow lake；It is subsequent when using the preparation of other techniques is carried out with the semiconductor layer of marker region, due to fixed
The scattered power and reflectivity difference of position marked region and non-locating marked region boundary are larger, can reach preferable alignment effect
Fruit improves the positioning accuracy of the telltale mark.
In conjunction with second aspect, in second aspect first embodiment, the Implantation Energies of the Doped ions is 5~
100keV, injection temperature are 23~600 DEG C.
Detailed description of the invention
It, below will be to specific in order to illustrate more clearly of the specific embodiment of the invention or technical solution in the prior art
Embodiment or attached drawing needed to be used in the description of the prior art be briefly described, it should be apparent that, it is described below
Attached drawing is some embodiments of the present invention, for those of ordinary skill in the art, before not making the creative labor
It puts, is also possible to obtain other drawings based on these drawings.
Fig. 1 is the structure chart of semiconductor devices according to an embodiment of the present invention；
Fig. 2 is the structure chart of semiconductor devices according to an embodiment of the present invention；
Fig. 3 is the structure chart of semiconductor devices according to an embodiment of the present invention；
Fig. 4 is the structure chart of semiconductor devices according to an embodiment of the present invention；
Fig. 5 is the preparation method flow chart of telltale mark according to an embodiment of the present invention；
Fig. 6 a- Fig. 6 d is structure chart corresponding with the preparation method of the telltale mark of the embodiment of the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those skilled in the art are not having
Every other embodiment obtained under the premise of creative work is made, shall fall within the protection scope of the present invention.
The embodiment of the invention provides a kind of semiconductor devices, as shown in Figure 1, including semiconductor layer 10 and telltale mark
Region 20.Wherein, marker region 20 is formed in semiconductor layer 10, be by into semiconductor layer 10 inject doping from
What son obtained.Specifically, in the marker region of formation 20, ion doping concentration is 1 × 1015~1 × 1019cm-3。
Since marker region 20 is formed in semiconductor layer 10 by way of ion implanting, avoid in semiconductor
Non-locating marked region precipitating caused by 10 forming metal layer on surface of layer has metal ion；It is subsequent to utilize with telltale mark
When the semiconductor layer in region carries out the preparation of other techniques, due to marker region 20 and non-locating marked region boundary
Scattered power and reflectivity difference are larger, can reach preferable alignment result, improve the positioning accuracy of the telltale mark.
Specifically, the material of semiconductor layer 10 can be one of silicon carbide, silicon, sapphire, GaAs or diamond
Or it is a variety of.Wherein, since carbofrax material has broad-band gap, high critical breakdown electric field, high heat conductance, high carrier saturation drift
The features such as rate, can be used for making high temperature resistant, high voltage, powerful power electronic devices, become and prepare power electronics
The ideal material of device.With power device prepared by carbofrax material, have that breakdown voltage is high, power is big, high temperature resistant, reliability
The features such as height, low loss, prepared power device can be used for constructing in efficient transmission and distribution networks and new energy resources system.Cause
This, it is preferable that in the present embodiment, the material of semiconductor layer 10 is silicon carbide.In addition, carbofrax material be 3 inches or 4 inches or
6 inches or 8 inches.
Further, the material of semiconductor layer 10 is one of 3C-SiC, 4H-SiC or 6H-SiC or a variety of.
As shown in Figure 1, the upper surface of marker region 20 is concordant with the upper surface of semiconductor layer 10, i.e. telltale mark area
Domain 20 exposes the upper surface of semiconductor layer 10.By the setting concordant with semiconductor layer 10 of marker region 20, can guarantee
The marker region 20 and non-locating marked region on 10 surface of semiconductor layer are more apparent, are convenient for the later use telltale mark area
Domain 20 is aligned.Wherein, the setting quantity and specific location of marker region 20, can be according to the knot of semiconductor devices
Structure is configured.
It is subsequent using marker region 20 carry out semiconductor devices preparation when, can will be formed with telltale mark area
On the semiconductor layer 10 in domain 20, it is formed with the surface coating photoresist of 20 place side of marker region, and photoresist will be coated
Semiconductor layer 10 afterwards is placed in the optical system of litho machine, due to the marker region 20 and non-locating mark of semiconductor layer 10
Remember that boundary optical scattering rate and the reflectivity difference in region are larger, can be carried out according to scattered power and/or the difference of reflectivity
Positioning is directed at the photoresist of coating with reticle to realize.
Still optionally further, the injection depth of Doped ions is 0~3 μm, i.e. marker region 20 in semiconductor layer 10
Injection depth be 0~3 μm.Wherein, the specific depth for injecting depth can be arranged accordingly according to the actual situation.
In addition, the ion doping concentration in marker region is set as 1 × 1015~1 × 1019cm-3, for guaranteeing
The reflectivity of the boundary of the marker region 20 and non-locating marked region that are formed in semiconductor layer 10 and scattered power
Difference is larger, is aligned convenient for later use marker region 20.Further, the ion doping in marker region is dense
Degree affects the resistivity of semiconductor layer 10, and the resistivity of semiconductor layer 10 is lower, illustrates the semiconductor devices prepared
Electric conductivity is better.Therefore, by the way that ion doping concentration is arranged, it is being capable of forming the marker region 20 that can be used for being aligned
In the case where, moreover it is possible to guarantee that the semiconductor devices prepared has the resistivity told somebody what one's real intentions are.Wherein, the resistivity of semiconductor layer 10 is
0.001~0.1 Ω cm.
As a kind of optional embodiment of the present embodiment, partly led as shown in Fig. 2, marker region 20 can be embedded in
The upper surface of body layer 10, the i.e. upper surface of marker region 20 and semiconductor layer 10 is separated by pre-determined distance.
As another optional embodiment of the present embodiment, as shown in figure 3, semiconductor layer 10 includes substrate 11 and shape
At the epitaxial layer 12 on 11 surface of substrate.Wherein, marker region 20 is formed in epitaxial layer 12.Specifically, such as Fig. 3 institute
Show, the upper surface of marker region 20 is concordant with the upper surface of epitaxial layer 12；Or, as shown in figure 4, marker region 20
Upper surface and the upper surface of epitaxial layer 12 are separated by pre-determined distance.
Further, the material of epitaxial layer 12 can be identical as the material of substrate 11, can also be with the material of substrate 11 not
Together.Preferably, all carbofrax materials of material of epitaxial layer 12 and substrate 11.Optionally, in addition, semiconductor layer with a thickness of
200~700 μm, epitaxial layer with a thickness of 0~300 μm.
A kind of optional embodiment as the present embodiment, wherein carbofrax material can be heavy doping Nitrogen ion N or phosphorus
(doping concentration is greater than 1E16cm to the carbofrax material of ion P-3)；It is also possible to that the silicon carbide of Nitrogen ion N or phosphonium ion P is lightly doped
(doping concentration is greater than 1E15cm to material-3)。
Wherein, the Doped ions of marker region 20 are formed as one in aluminium ion, boron ion, carbon ion or Nitrogen ion
Kind.Preferably, Doped ions are aluminium ion.
The embodiment of the invention also provides a kind of preparation methods of telltale mark, and the telltale mark is for semiconductor devices
In preparation, as shown in figure 5, this method comprises:
S11 provides semi-conductor layer.
As shown in Figure 6 a, semiconductor layer 10 is provided, the material of the semiconductor layer 10 can be silicon carbide, silicon, sapphire, arsenic
Change one of gallium or diamond or a variety of；Preferably, the material of semiconductor layer 10 is silicon carbide.Further, semiconductor layer
10 material is one of 3C-SiC, 4H-SiC or 6H-SiC or a variety of.
S12, with 1 × 1011~1 × 1015cm-3Implantation dosage Doped ions are injected into semiconductor layer, with formed positioning
Marked region.
Marker region 20 is formed by way of ion implanting in semiconductor layer 20, is avoided in semiconductor layer 10
The precipitating of non-locating marked region caused by forming metal layer on surface has metal ion；It is subsequent to utilize with marker region
When 20 semiconductor layer 10 carries out the preparation of other techniques, due to marker region 20 and non-locating marked region boundary
Scattered power and reflectivity difference are larger, can reach preferable alignment result, improve the positioning accuracy of the telltale mark.
Further, as shown in Figure 6 b, it is formed with ion implantation window 30 on semiconductor layer 10, utilizes the ion implanting
Window 30 injects Doped ions into semiconductor layer 10.Wherein, the process for forming ion implantation window 30 can be, first half
One layer of mask layer is formed in conductor layer 10, then by carrying out photoetching or etching to mask layer, forms ion implantation window 30；?
It can be, the image of reticle is passed through on photosensitive exposure mask transfer replication to semiconductor layer 10, to form ion implantation window 30.
It should be noted that the size of ion implantation window can be specifically arranged according to the actual situation.
As fig. 6 c, it after being doped ion implanting using ion implantation window 30, is formed in semiconductor layer 10
Marker region 20.Then, the removal of window 30 is injected ions into, structure as shown in fig 6d is formed, wherein it is fixed to be formed by
The upper surface of position marked region 20 is concordant with the upper surface of semiconductor layer 10.
Optionally, the Doped ions for being used to form marker region 20 can be aluminium ion, boron ion, carbon ion or nitrogen
One of ion.Preferably, Doped ions are aluminium ion.
Still optionally further, in carrying out ion implantation process, the Implantation Energy of Doped ions is 5~100keV, injection
Temperature is 23~600 DEG C, which can guarantee the injection depth for being formed by marker region 20, after improving
The precision of continuous alignment.
In addition, epitaxial layer 12 can also be generated on substrate 11 before S12, wherein substrate 11 and the formation of epitaxial layer 12
Semiconductor layer 10.The material of epitaxial layer 12 can be identical as the material of substrate 11, can also be different from the material of substrate 11.It is preferred that
Ground, all carbofrax materials of material of epitaxial layer 12 and substrate 11.Optionally, semiconductor layer with a thickness of 200~700 μm,
Epitaxial layer with a thickness of 0~300 μm.After the formation of epitaxial layer 12, by ion implanting mode, it is fixed to be formed in epitaxial layer 12
Position marked region 20, it is as shown in Figure 3 to be specifically formed by structure.
As another optional embodiment of the present embodiment, in epitaxial layer 12 the step of formation marker region 20
Before, comprising:
(1) epitaxial layer 12 is cleaned；
(2) gluing, front baking, exposure, development and post bake technique are carried out to the epitaxial layer 12 after cleaning.
Wherein, optionally, the cleaning of Piranha technique, the cleaning of RCA technique and DHF work can successively be carried out to epitaxial layer 12
Skill cleaning.
As another optional embodiment of the present embodiment, by the way that the Implantation Energy of Doped ions is arranged, so that positioning
Marked region 20 is embedded in inside semiconductor layer 10, and specific structure is as shown in Figure 4.
Still optionally further, after S12, can also include the steps that carrying out optical identification to marker region 20:
Specifically, being formed after marker region 20 in semiconductor layer 10, semiconductor layer is monitored using the optical system of litho machine
Optical parameter (including marker region 20 and the non-locating mark of marker region 20 in 10 and non-locating marked region 20
Remember the scattered power or reflectivity of the boundary in region), using detecting as a result, judge the qualification rate of marker region 20,
I.e. whether marker region 20 can be used for next edition exposure.
Wherein, the ion doping concentration in marker region 20 is set as 1 × 1015~1 × 1019cm-3, for guaranteeing
The reflectivity and scattered power of the boundary of the marker region 20 and non-locating marked region that are formed in semiconductor layer 10
Difference it is larger, be aligned convenient for later use marker region 20.Further, the ion doping in marker region
Concentration affects the resistivity of semiconductor layer 10, and the resistivity of semiconductor layer 10 is lower, illustrates the semiconductor devices prepared
Electric conductivity it is better.Wherein, the resistivity of semiconductor layer 10 is 0.001~0.1 Ω cm.
Wherein, in the case where same injection temperature (200 DEG C) and Implantation Energy (20keV), ion doping concentration, electricity
Resistance rate and the qualification rate of marker region 20 are as shown in the table:
| Serial number | Doping concentration (cm-3) | Resistivity (Ω cm) | Qualification rate (%) |
| 1 | 1E15 | 0.087 | 96.8 |
| 2 | 2E17 | 0.054 | 97.2 |
| 3 | 1E18 | 0.001 | 97.6 |
| 4 | 1E19 | 0.00075 | 98.7 |
| 5 | 2E15 | 0.1 | 95.5 |
| 6 | 5E20 | 0.0007 | 98.5 |
| 7 | 1E14 | 0.23 | 90 |
Therefore, the positioning that can be used for being aligned is being capable of forming by setting ion doping concentration as can be seen from the above table
In the case where marked region 20, moreover it is possible to guarantee that the semiconductor devices prepared has lower resistivity.
In addition, the specific structural details about marker region 20 and semiconductor layer 10, please refer to Fig. 1 to Fig. 4 institute
Show the description of embodiment, details are not described herein.
Although being described in conjunction with the accompanying the embodiment of the present invention, those skilled in the art can not depart from the present invention
Spirit and scope in the case where various modifications and variations can be made, such modifications and variations are each fallen within by appended claims institute
Within the scope of restriction.
Claims (10)
1. a kind of semiconductor devices characterized by comprising
Semiconductor layer；
Marker region is formed in the semiconductor layer；Wherein, the marker region is by the semiconductor
Injection Doped ions obtain in layer；Ion doping concentration in the marker region is 1 × 1015~1 × 1019cm-3。
2. semiconductor devices according to claim 1, which is characterized in that the upper surface of the marker region with it is described
The upper surface of semiconductor layer is concordant.
3. semiconductor devices according to claim 1, which is characterized in that the upper surface of the marker region with it is described
The upper surface of semiconductor layer is separated by pre-determined distance.
4. semiconductor devices according to claim 1, which is characterized in that the injection depth of the Doped ions is 0~3 μ
m。
5. semiconductor devices according to claim 1, which is characterized in that the resistivity of the semiconductor layer be 0.001~
0.1Ω·cm。
6. semiconductor devices according to claim 1, which is characterized in that the semiconductor layer includes:
Substrate；
Epitaxial layer is formed on the surface of the substrate；Wherein, the marker region is formed in the epitaxial layer.
7. semiconductor devices according to claim 6, which is characterized in that the semiconductor layer with a thickness of 200~700 μ
m；The epitaxial layer with a thickness of 0~300 μm.
8. semiconductor devices according to any one of claims 1 to 7, which is characterized in that the Doped ions be aluminium from
One of son, boron ion, carbon ion or Nitrogen ion.
9. a kind of preparation method of telltale mark characterized by comprising
Semi-conductor layer is provided；
With 1 × 1011~1 × 1015cm-3Implantation dosage inject Doped ions into the semiconductor layer, to form telltale mark
Region.
10. according to the method described in claim 9, it is characterized in that, the Implantation Energy of the Doped ions be 5~100keV,
Injecting temperature is 23~600 DEG C.
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| KR20090009388A (en) * | 2007-07-20 | 2009-01-23 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device |
| CN102054877A (en) * | 2009-10-28 | 2011-05-11 | 三菱电机株式会社 | Silicon carbide semiconductor device |
| CN102318078A (en) * | 2008-12-10 | 2012-01-11 | 应用材料股份有限公司 | Be used for the enhancement mode inspection system that the screen printing pattern is aimed at |
| CN105047547A (en) * | 2015-07-08 | 2015-11-11 | 泰科天润半导体科技（北京）有限公司 | Alignment mark for silicon carbide device and preparation method thereof |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20090009388A (en) * | 2007-07-20 | 2009-01-23 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device |
| CN102318078A (en) * | 2008-12-10 | 2012-01-11 | 应用材料股份有限公司 | Be used for the enhancement mode inspection system that the screen printing pattern is aimed at |
| CN102054877A (en) * | 2009-10-28 | 2011-05-11 | 三菱电机株式会社 | Silicon carbide semiconductor device |
| CN105047547A (en) * | 2015-07-08 | 2015-11-11 | 泰科天润半导体科技（北京）有限公司 | Alignment mark for silicon carbide device and preparation method thereof |
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