CN109274615B - Bus signal reflection suppression method, device and system and control circuit - Google Patents
Bus signal reflection suppression method, device and system and control circuit Download PDFInfo
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- CN109274615B CN109274615B CN201811329016.1A CN201811329016A CN109274615B CN 109274615 B CN109274615 B CN 109274615B CN 201811329016 A CN201811329016 A CN 201811329016A CN 109274615 B CN109274615 B CN 109274615B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0278—Arrangements for impedance matching
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0292—Arrangements specific to the receiver end
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Abstract
The invention discloses bus signal reflection suppression methods, devices and systems and a control circuit, wherein the bus signal reflection suppression method comprises the steps of acquiring bus parameters in real time, and determining whether to access a bus bias resistor into a bus according to the relation between the bus parameters and a preset parameter range.
Description
Technical Field
The invention relates to the field of automatic control, in particular to a method, a device and a system for inhibiting reflection of bus signals and a control circuit.
Background
In the field of modern automatic control, with the development of digital communication systems, buses are urgently needed to be suitable for long-distance digital communication, so that an RS-485 bus is produced.
The RS-485 bus adopts bus standards which are researched by EIA on the basis of RS-422 bus and support multiple nodes (32), long distance (1219m) and high receiving sensitivity (voltage as low as 200mV can be detected). the RS-485 standard adopts a balanced transmission and differential receiving data transceiver to drive the bus, and has the specific specification requirements that the input resistance Rin of the receiver is more than or equal to 12k omega, the driver can output common mode voltage of +/-7V, the capacitance of the input end is less than or equal to 50pF, under the condition that the number of nodes is 32 and a terminal resistance of 120 omega is configured, the driver can at least output voltage of 1.5V (the size of the terminal resistance is related to the parameter of a used twisted pair), the input sensitivity of the receiver is 200mV (namely, when Vin- (Vin-) > 0.2V is more than or equal to 0.2V, a signal of 0 is represented, and when Vin- (Vin-) < -0.2V is represented as a signal of 1).
EIARS-485 is the preferred standard for data transmission in industrial applications because of the long range, multiple nodes (32) and low cost characteristics of the transmission line of the RS-485 bus.
Disclosure of Invention
The applicant found that: the RS-485 bus has the characteristics of long distance, multiple nodes, low transmission line cost and the like, so that the RS-485 bus is widely applied to an automatic control and data transmission system, but the RS-485 bus has the defects of communication failure, even system breakdown and other faults if the RS-485 bus is not processed by attention, and therefore the improvement of the running reliability of the RS-485 bus is of great importance. And the primary factor influencing the communication reliability of the RS-485 bus is signal reflection.
Fig. 1 is a schematic diagram of signal reflection caused by impedance discontinuity in embodiments of the present invention, as shown in fig. 1, the impedance discontinuity, where a signal suddenly encounters little or no cable impedance at the end of a transmission line, causes a reflection of the signal, the principle of signal reflection caused by impedance discontinuity is similar to the reflection of light from media into another media, the method of eliminating the reflection must span termination resistors at the end of the cable of the same size as the characteristic impedance of the cable to make the impedance of the cable continuous, fig. 2 is a schematic diagram of the termination resistors in embodiments of the present invention, since the transmission of the signal over the cable is bi-directional, termination resistors of the same size can be spanned at the other end of the communication cable, as shown in fig. 2.
However, in the implementation application, the characteristic impedance of the transmission cable is related to the application environment such as the communication baud rate, the characteristic impedance cannot be completely equal to the terminal resistance, so more or less signal reflection can still exist, and another reasons causing the signal reflection are impedance mismatching between the data transceiver and the transmission cable.
To reduce the influence of the reflected signal on the communication line, the related art generally adopts methods of noise suppression and summing line bias resistance. In practical applications, for a relatively small reflected signal, for simplicity and convenience, the related art often adopts a method of adding a bus bias resistor. When the communication baud rate is high, it is necessary to connect a bias resistor on the line.
FIG. 3 is a schematic diagram of a connection method of embodiments of the present invention of a bus bias resistor, as shown in FIG. 3, the bus bias resistor is used to pull the level of the bus away from 0 when there is no data on the bus (idle mode) after the circuit enters idle state, so that even if there is a relatively small reflected signal or interference in the circuit, the data receiver hanging on the bus will not malfunction due to the arrival of these signals.
In view of the technical problems of the embodiments described above, no matter how large the current signal reflection is, how good the current communication effect is, and how the bus bias resistor is directly connected, the present invention provides methods, apparatuses, systems, and control circuits for suppressing bus signal reflection, which can determine whether to add a bus bias resistor according to the bit error rate or the recovery rate of the bus.
According to aspects of the invention, bus signal reflection suppression methods are provided, which comprise:
acquiring bus parameters in real time;
and determining whether to connect the bus bias resistor into the bus according to the relationship between the bus parameter and the preset parameter range.
In embodiments of the present invention, determining whether to switch the bus bias resistance into the bus based on a relationship of a bus parameter to a predetermined parameter range comprises:
under the condition that the bus parameters are not in the preset parameter range, the bus bias resistor is connected into the bus;
the bus bias resistor is disconnected from the bus in the event that the bus parameter is within a predetermined parameter range.
In embodiments of the present invention, the bus parameter is a recovery rate or a bit error rate.
In embodiments of the present invention, where the bus parameter is a recovery rate, the determining whether to switch the bus bias resistor into the bus based on the relationship between the bus parameter and the predetermined parameter range includes:
under the condition that the recovery rate is lower than the preset recovery rate, the bus biasing resistor is connected into the bus;
and disconnecting the bus bias resistor from the bus under the condition that the recovery rate is not lower than the preset recovery rate.
In embodiments of the present invention, where the bus parameter is bit error rate, the determining whether to switch the bus bias resistor into the bus based on the relationship between the bus parameter and the predetermined parameter range includes:
under the condition that the error rate is higher than the preset error rate, connecting a bus bias resistor into a bus;
and disconnecting the bus bias resistor from the bus under the condition that the error rate is not higher than the preset error rate.
In embodiments of the present invention, the bus signal reflection suppression method further comprises:
and controlling whether the bus bias resistor is connected into the bus or not by controlling the on-off of a relay connected with the bus bias resistor.
In embodiments of the invention, for a multi-machine serial bus, determining whether to switch a bus bias resistor into the bus based on a relationship between a bus parameter and a predetermined parameter range comprises:
placing a bus bias resistor on each transceivers on the bus;
for each pair of bus bias resistors, a determination is made as to whether to switch the bus bias resistor into the bus based on the relationship of the bus parameters to a predetermined range of parameters.
In embodiments of the invention, for a multi-machine serial bus, determining whether to switch a bus bias resistor into the bus based on a relationship between a bus parameter and a predetermined parameter range comprises:
and only aiming at pairs of bus bias resistors on the bus, determining whether to connect the bus bias resistors into the bus according to the relationship between the bus parameters and the preset parameter range, wherein the pairs of bus bias resistors are bus bias resistors corresponding to the master transceiver, or the pairs of bus bias resistors are bus bias resistors corresponding to slave transceivers.
According to another aspect of the invention, there is provided a bus signal reflection suppressing apparatus, comprising:
the bus parameter acquisition module is used for acquiring bus parameters in real time;
and the bias resistor control module is used for determining whether to connect the bus bias resistor into the bus according to the relationship between the bus parameter and the preset parameter range.
In embodiments of the present invention, the bus signal reflection suppression apparatus is configured to perform operations for implementing the bus signal reflection suppression method as described in any of the embodiments above.
According to another aspect of the invention, there is provided a bus signal reflection suppressing apparatus, comprising:
a memory to store instructions;
a processor configured to execute the instructions to cause the apparatus to perform operations to implement the bus signal reflection suppression method as described in any of the embodiments above.
According to another aspect of the invention, there is provided kinds of bus pull-up and pull-down resistance control circuits, including a th relay, a second relay, a bus pull-up resistance and a bus pull-down resistance, wherein:
the th relay is connected with the bus pull-up resistor in series, and the second relay is connected with the bus pull-down resistor in series;
the th relay and the second relay are respectively connected with the bus signal reflection suppression device of the th embodiment, and the bus signal reflection suppression device is used for controlling the on-off of the th relay and the second relay.
According to another aspect of the present invention, there is provided a bus signal reflection suppressing system, which comprises the bus signal reflection suppressing device as described in any embodiment above, and the bus pull-up and pull-down resistance control circuit as described in any embodiment above.
In embodiments of the present invention, the on-bus pull-down resistance control circuit is disposed at least transceivers on a bus.
According to another aspect of the invention, there are provided computer-readable storage media storing computer instructions that, when executed by a processor, implement a bus signal reflection suppression method as described in any of the embodiments above.
The invention can determine whether to add the bus bias resistor according to the bit error rate or the recovery rate of the bus, thereby weakening the influence of the reflected signal on the communication line and improving the communication reliability of the RS-485 bus.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic representation of signal reflection caused by impedance discontinuities in embodiments of the present invention.
Fig. 2 is a schematic diagram of the correct connection of termination resistors in embodiments of the present invention.
FIG. 3 is a schematic diagram of a connection method of bus bias resistors according to embodiments of the present invention.
Fig. 4 is a diagram of a bus signal reflection suppression system according to some embodiments of the present invention.
FIG. 5 is a diagram of embodiments of pull-down resistor control circuits on a bus according to the invention.
Fig. 6 is a schematic diagram of an equivalent circuit of embodiments of the present invention in the case where a pull-up and pull-down resistor is added to the pull-up and pull-down resistor control circuit of the bus.
Fig. 7 is an equivalent circuit diagram of the pull-up and pull-down resistor control circuit of the bus according to embodiments of the present invention without adding pull-up and pull-down resistors.
FIG. 8 is a block diagram of a bus signal reflection suppression method according to some embodiments of the present invention.
Fig. 9 is a schematic diagram of a half-duplex RS485 network in embodiments of the invention.
Fig. 10 is a diagram of a bus signal reflection suppression device according to some embodiments of the present invention.
Fig. 11 is a schematic diagram of another embodiments of the bus signal reflection suppressing apparatus according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the of the present invention, rather than all embodiments.
The relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
Meanwhile, it should be understood that the sizes of the respective portions shown in the drawings are not drawn in an actual proportional relationship for the convenience of description.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the authorization specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that like reference numerals and letters refer to like items in the following figures, and thus once a item is defined in figures, it need not be discussed further in in subsequent figures.
Fig. 4 is a schematic diagram of some embodiments of a bus signal reflection suppression system according to the invention, as shown in fig. 4, the bus signal reflection suppression system may include a bus signal reflection suppression device 41 and at least bus pull-up and pull-down resistance control circuits 42, where:
a bus signal reflection suppression device 41 for acquiring bus parameters in real time; whether the bus bias resistor in the bus pull-up and pull-down resistor control circuit 42 is connected to the bus is determined according to the relationship between the bus parameter and the predetermined parameter range.
In embodiments of the present invention, the bus parameter may be a recovery rate or a bit error rate.
A bus signal reflection suppression device 41, which is used for connecting the bus bias resistor in the pull-up and pull-down resistor control circuit 42 to the bus when the bus parameter is not in the predetermined parameter range; in the event that the bus parameters are within the predetermined parameter range, the bus bias resistors in pull-up and pull-down resistor control circuit 42 are disconnected from the bus.
In embodiments of the present invention, the bus signal reflection suppression device 41 can be used to control whether the bus bias resistor is connected to the bus by controlling the on/off of a relay connected to the bus bias resistor in the pull-up and pull-down resistor control circuit 42.
In embodiments of the present invention, the on-bus pull-down resistance control circuit 42 is disposed at least transceivers on a bus.
In embodiments of the present invention, the bus pull-up resistor control circuit 42 may include a th relay, a second relay, a bus pull-up resistor, and a bus pull-down resistor, wherein:
the th relay is connected in series with a bus pull-up resistor and the second relay is connected in series with a bus pull-down resistor.
The th relay and the second relay are respectively connected with the bus signal reflection suppression device 41 as described in any embodiment, and the bus signal reflection suppression device is used for controlling the on and off of the th relay and the second relay.
Based on the bus signal reflection suppression system provided by the embodiment of the invention, the relay is added between the pull-up resistor and the pull-down resistor of the bus pull-up resistor control circuit, and whether the RS-485 bus bias resistor is added or not can be judged according to the error rate or the recovery rate of the 485 bus, so that the influence of a reflection signal on a communication circuit is weakened, and the communication reliability of the RS-485 bus is improved.
Fig. 5 is a schematic diagram of embodiments of the bus pull-up and pull-down resistor control circuit of the present invention, fig. 6 is an equivalent circuit diagram of embodiments of the present invention when a pull-up and pull-down resistor is added to the bus pull-up and pull-down resistor control circuit, and fig. 7 is an equivalent circuit diagram of embodiments of the present invention when a pull-up and pull-down resistor is not added to the bus pull-up and pull-down resistor control circuit.
The bus pull-up and pull-down resistor control circuit shown in fig. 5 is an RS485 bus pull-up and pull-down resistor control circuit, the chip U1 is a nonpolar 485 chip, RO is a UART receiving end, RE is a UART receiving enabling end, DE is a UART transmitting enabling end, DI is a UART transmitting end, the a port of the chip U1 is an RS485 bus a line, the B port of the chip U1 is an RS485 bus B line, R1 and R2 are UART end pull-up resistors, R3 and R4 are UART end pull-down resistors, R5 and R6 are RS485 bus end pull-up and pull-down resistors, R7 and R8 are current-limiting resistors, TVS1 and TVS2 are bidirectional TVS diodes, a lightning protection device and CN1 is a 4-core socket (an interface needle base can be replaced according to actual conditions), and the gnd is a +12V, B line port, an a line port, a K1, and a second normally open relay K2.
SIGNAL is a control SIGNAL provided by the bus SIGNAL reflection suppression device 41 of the embodiment of fig. 4 to the RS485 bus pull-up and pull-down resistor control circuit. A bus SIGNAL reflection suppressing means 41 for setting the control SIGNAL supplied from the pull-up/down resistance control circuit 42 to a low level when the bus parameter is not within the predetermined parameter range; in the case where the bus parameters are within the predetermined parameter range, the control SIGNAL provided by the pull-up and pull-down resistance control circuit 42 is high.
When SIGNAL is low level 0V SIGNAL, normally open relays K1 and K2 are closed, the equivalent circuit is shown in fig. 6, and at this time, the RS485 bus has pull-up and pull-down resistors R5 and R6.
When SIGNAL is high level +5V SIGNAL, normally open relays K1, K2 are opened, the equivalent circuit is shown in fig. 7, and at this time, the RS485 bus has no pull-up and pull-down resistors R5, R6.
The bus pull-up and pull-down resistor control circuit provided by the embodiment of the invention is RS-485 bus pull-up and pull-down resistor control circuits, a relay is added between the pull-up and pull-down resistors, and whether an RS-485 bus bias resistor is added can be judged according to the error rate or the return rate of a 485 bus, so that the influence of a reflected signal on a communication circuit is weakened, and the communication reliability of the RS-485 bus is improved.
Fig. 8 is a schematic diagram of some embodiments of a bus signal reflection suppression method according to the present invention, which may be implemented by the bus signal reflection suppression apparatus according to the present invention or the bus signal reflection suppression system according to the present invention, as shown in fig. 8, the method may further include:
and step 81, acquiring the bus parameters in real time.
In embodiments of the present invention, the bus parameter may be a bus parameter such as a recovery rate or a bit error rate.
In embodiments of the present invention, step 81 may include counting bus parameters such as recovery rate or bit error rate by the UART receive function.
And step 82, determining whether to connect the bus bias resistor into the bus according to the relationship between the bus parameter and the preset parameter range.
In embodiments of the present invention, step 82 may include switching the bus bias resistor into the bus if the bus parameter is not within the predetermined parameter range and switching the bus bias resistor out of the bus if the bus parameter is within the predetermined parameter range.
In embodiments of the present invention, where the bus parameter is a recovery rate, step 82 may include accessing the bus biasing resistor to the bus if the recovery rate is below a predetermined recovery rate and disconnecting the bus biasing resistor from the bus if the recovery rate is not below the predetermined recovery rate.
In embodiments of the present invention, where the bus parameter is bit error rate, step 82 may include coupling a bus bias resistor to the bus if the bit error rate is greater than a predetermined bit error rate and decoupling the bus bias resistor from the bus if the bit error rate is not greater than the predetermined bit error rate.
In embodiments of the present invention, the bus signal reflection suppression method may further include controlling whether to switch the bus bias resistor into the bus by controlling on and off of a relay (e.g., the relay K1 and the second relay K2 in the embodiment of fig. 5) connected to the bus bias resistor.
In embodiments of the present invention, for a multi-machine serial bus, the step 82 may include setting bus bias resistors on each transceivers on the bus, and determining whether to connect the bus bias resistors to the bus according to a relationship between a bus parameter and a predetermined parameter range for each pairs of bus bias resistors, where the multi-machine serial bus refers to a serial bus of a multi-machine serial communication system, the multi-machine serial communication system is a communication system formed by a plurality of singlechips (controllers, computers) in series, and the multi-machine serial communication system generally adopts a master-slave structure (i.e., a serial communication system of masters and a plurality of slaves).
In embodiments of the present invention, for a multi-machine serial bus, the step 82 may further include determining whether to switch the bus bias resistor into the bus according to a relationship between a bus parameter and a predetermined parameter range only for pairs of bus bias resistors on the bus, where the pairs of bus bias resistors are bus bias resistors corresponding to the master transceivers, or the pairs of bus bias resistors are bus bias resistors corresponding to slave transceivers, where the slave transceivers may be designated slave transceivers or any slave transceivers.
In embodiments of the present invention, the designated slave transceivers may be the slave transceiver corresponding to the highest address slave or the slave transceiver corresponding to the lowest address slave, wherein the address is the device address of each slave in the preset serial communication system.
The embodiment of the invention only uses pairs of bias resistors on bus lines, and the method of the embodiment of the invention is more effective for large reflected signals or interference signals on the bus lines.
Based on the bus signal reflection suppression method provided by the embodiment of the invention, whether the RS-485 bus bias resistor is added or not can be judged according to the bit error rate or the recovery rate of the 485 bus, so that the influence of a reflection signal on a communication line is weakened, and the reliability of RS-485 bus communication is improved.
In embodiments of the invention, in a multi-machine serial communication system composed of single-chip microcomputers, generally adopts a master-slave structure, wherein slaves do not actively send commands or data, is controlled by a host, fig. 9 is a schematic diagram of a half-duplex RS485 network in embodiments of the invention, multi-machine communication composed of an RS485 bus is mostly in a half-duplex communication mode as shown in fig. 9, only nodes in the whole system are master nodes, all other nodes on the bus are slave nodes, a communication mode is generally a master node circularly polls each node, each slave node has its own communication identification number, when the polling information of the master node includes its own communication identification number, the slave node replies to the frame, other nodes ignore the frame and do no processing, and in multi-machine communication systems, only single-machine is used as a host, all the slave machines cannot communicate with each other, and even if information exchange is carried out, the slave machines must be forwarded through the host machine.
Specific example 1:
the host computer is required, each slave computer is provided with a pull-down resistor control circuit on an RS485 bus shown in figure 5, when the host computer detects that the error rate or the recovery rate (counted by a UART receiving function of the host computer) of any slave computers is not in a preset range, the SIGNAL of the host computer is in a low level, and simultaneously the host computer issues a command that the SIGNAL of each slave computer is set to be in the low level, so that each transceivers hung on the RS-485 bus are added with offset resistors.
Specific example 2:
the th case of using only pairs of bias resistors on segment buses requires that the master does not have any slave devices and each slave device has a pull-down resistor control circuit on an RS485 bus shown in figure 5.
Specific example 2-1:
when the master detects that the error rate or the recovery rate (counted by a UART receiving function of the master) of any slave machines is not in a preset range, the SIGNAL of the master machine is still high (when the master machine detects that the error rate or the recovery rate is low), the master machine issues a command that addresses are lowest and the SIGNAL of the slave machine is high and is set to be low, and when the slave machine fails in communication, the master machine replaces the slave machine with the slave machine which determines the next low address and the SIGNAL is high for the failed communication.
Specific example 2-2:
when the master detects that the error rate or the recovery rate (counted by a UART receiving function of the master) of any slave machines is not in a preset range, the SIGNAL of the master machine is still high (when the master machine detects that the error rate or the recovery rate is high), the master machine issues a command that addresses are highest, the SIGNAL of the slave machine is set to be low, and when the slave machine fails in communication, the master machine replaces the slave machine with a slave machine which determines the next highest address and the SIGNAL is high for the failed communication.
Specific examples 2 to 3:
when the master computer detects that the error rate or the recovery rate (counted by a UART receiving function of the master computer) of any slave computers is not in a preset range, the SIGNAL of the master computer is still high (when the master computer detects that the error rate or the recovery rate (counted by a UART receiving function of the master computer) is not in the preset range, the master computer sends a command which is set to be low to any slave computers with high SIGNAL, and when the slave computers are in communication failure, the master computer selects any slave computers from the rest to replace the slave computers with communication failure.
Therefore, the embodiment of the invention only uses pairs of bias resistors on bus segments, thereby weakening the existence of large reflected signals or interference signals on the bus, improving the recovery rate and reducing the error rate.
Specific example 3:
when the host detects that the error rate or recovery rate (counted by the host UART receiving function) of any slaves is lower than a threshold value, the SIGNAL of the host is set to be low, and all the slaves (counted by the host UART receiving function) are still set to be high by default.
Fig. 10 is a schematic diagram of some embodiments of a bus signal reflection suppression apparatus according to the present invention, as shown in fig. 10, the bus signal reflection suppression apparatus (for example, the bus signal reflection suppression apparatus 41 in the embodiment of fig. 4) may include a bus parameter obtaining module 101 and a bias resistance control module 102, where:
the bus parameter obtaining module 101 obtains the bus parameters in real time.
In embodiments of the present invention, the bus parameter is a recovery rate or a bit error rate.
The bias resistor control module 102 determines whether to connect the bus bias resistor to the bus according to the relationship between the bus parameter and the predetermined parameter range.
In embodiments of the present invention, the offset resistance control module 102 may be configured to switch the bus offset resistance into the bus if the bus parameters are not within the predetermined parameters and to switch the bus offset resistance out of the bus if the bus parameters are within the predetermined parameters.
In embodiments of the present invention, the offset resistance control module 102 may be configured to access the bus offset resistance to the bus if the bus parameter is the recovery rate, if the recovery rate is lower than a predetermined recovery rate, and to disconnect the bus offset resistance from the bus if the recovery rate is not lower than the predetermined recovery rate.
In embodiments of the present invention, the bias resistor control module 102 may be configured to switch the bus bias resistor into the bus if the bus parameter is the bit error rate, if the bit error rate is higher than a predetermined bit error rate, and to switch the bus bias resistor out of the bus if the bit error rate is not higher than the predetermined bit error rate.
In embodiments of the present invention, the bias resistor control module 102 may be configured to control whether the bus bias resistor is coupled to the bus by controlling the on/off of a relay coupled to the bus bias resistor.
In embodiments of the present invention, the offset resistance control module 102 may be configured to place bus offset resistances on the bus every transceivers for a multi-machine serial bus and to determine whether to switch the bus offset resistance into the bus based on the relationship of the bus parameters to a predetermined parameter range for every pairs of bus offset resistances.
In embodiments of the present invention, the bias resistor control module 102 may be configured to, for a multi-machine serial bus, determine whether to switch the bus bias resistor into the bus according to a relationship between a bus parameter and a predetermined parameter range only for pairs of bus bias resistors on the bus, where the pair of bus bias resistors are bus bias resistors corresponding to the master transceiver, or the pair of bus bias resistors are bus bias resistors corresponding to slave transceivers.
In embodiments of the present invention, the bus signal reflection suppressing apparatus is used to perform operations for implementing the bus signal reflection suppressing method as described in any embodiment (e.g., the embodiment of fig. 8).
Fig. 11 is a schematic diagram of another embodiments of the bus signal reflection suppression apparatus of the present invention, as shown in fig. 11, the bus signal reflection suppression apparatus (for example, the bus signal reflection suppression apparatus 41 of fig. 4) may include a memory 111 and a processor 112, wherein:
a memory 111 for storing instructions;
a processor 112 configured to execute the instructions to cause the apparatus to perform operations for implementing the bus signal reflection suppression method according to any (for example, the embodiment of fig. 8) described above.
Based on the bus signal reflection suppression device provided by the embodiment of the invention, whether the RS-485 bus bias resistor is added or not can be judged according to the bit error rate or the recovery rate of the 485 bus, so that the influence of a reflection signal on a communication line is weakened, and the communication reliability of the RS-485 bus is improved.
According to another aspect of the invention, there are provided computer-readable storage media storing computer instructions that, when executed by a processor, implement a bus signal reflection suppression method as described in any embodiment (e.g., the embodiment of fig. 8).
Based on the computer readable storage medium provided by the embodiment of the invention, whether the RS-485 bus bias resistor is added or not can be judged according to the bit error rate or the recovery rate of the 485 bus, so that the influence of a reflected signal on a communication line is weakened, and the communication reliability of the RS-485 bus is improved.
The bus signal reflection suppression apparatus described above may be implemented as a general purpose processor, a Programmable Logic Controller (PLC), a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a field programmable array (FPGA) or other programmable logic device, discrete or transistor logic devices, discrete hardware components, or any suitable combination thereof, for performing the functions described herein.
The present invention has been described in detail to avoid obscuring the concepts of the present invention details that are well known in the art have not been described.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in computer readable storage media, which may be read only memory, magnetic or optical disk, etc.
The description of the present invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to practitioners skilled in this art. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.
Claims (12)
1, A method for suppressing reflection of a bus signal, comprising:
acquiring bus parameters in real time, wherein the bus parameters are the recovery rate or the error rate;
determining whether to access the bus bias resistor to the bus according to the relationship between the bus parameters and the preset parameter range;
wherein, in the case that the bus parameter is a recovery rate, determining whether to access the bus bias resistor to the bus according to the relationship between the bus parameter and a predetermined parameter range includes:
under the condition that the recovery rate is lower than the preset recovery rate, the bus biasing resistor is connected into the bus;
disconnecting the bus bias resistor from the bus under the condition that the recovery rate is not lower than the preset recovery rate;
wherein, in the case that the bus parameter is the bit error rate, the determining whether to access the bus bias resistor to the bus according to the relationship between the bus parameter and the predetermined parameter range includes:
under the condition that the error rate is higher than the preset error rate, connecting a bus bias resistor into a bus;
and disconnecting the bus bias resistor from the bus under the condition that the error rate is not higher than the preset error rate.
2. The method of claim 1, wherein determining whether to switch a bus bias resistor into the bus based on a relationship between a bus parameter and a predetermined parameter range comprises:
under the condition that the bus parameters are not in the preset parameter range, the bus bias resistor is connected into the bus;
the bus bias resistor is disconnected from the bus in the event that the bus parameter is within a predetermined parameter range.
3. The bus signal reflection suppressing method according to claim 1 or 2, further comprising:
and controlling whether the bus bias resistor is connected into the bus or not by controlling the on-off of a relay connected with the bus bias resistor.
4. The method for suppressing bus signal reflection according to claim 1 or 2, wherein for a multi-machine serial bus, said determining whether to connect the bus bias resistor to the bus according to the relationship between the bus parameter and the predetermined parameter range comprises:
placing a bus bias resistor on each transceivers on the bus;
for each pair of bus bias resistors, a determination is made as to whether to switch the bus bias resistor into the bus based on the relationship of the bus parameters to a predetermined range of parameters.
5. The method for suppressing bus signal reflection according to claim 1 or 2, wherein for a multi-machine serial bus, said determining whether to connect the bus bias resistor to the bus according to the relationship between the bus parameter and the predetermined parameter range comprises:
and only aiming at pairs of bus bias resistors on the bus, determining whether to connect the bus bias resistors into the bus according to the relationship between the bus parameters and the preset parameter range, wherein the pairs of bus bias resistors are bus bias resistors corresponding to the master transceiver, or the pairs of bus bias resistors are bus bias resistors corresponding to slave transceivers.
The bus signal reflection suppression device of claim , comprising:
the bus parameter acquisition module is used for acquiring bus parameters in real time, wherein the bus parameters are the recovery rate or the error rate;
the bias resistor control module is used for determining whether to access the bus bias resistor into the bus according to the relationship between the bus parameters and the preset parameter range;
the bias resistor control module is used for connecting the bus bias resistor into the bus under the condition that the bus parameter is the recovery rate and the recovery rate is lower than the preset recovery rate; disconnecting the bus bias resistor from the bus under the condition that the recovery rate is not lower than the preset recovery rate;
the bias resistor control module is used for connecting the bus bias resistor into the bus under the condition that the bus parameter is the bit error rate and the bit error rate is higher than the preset bit error rate; and disconnecting the bus bias resistor from the bus under the condition that the error rate is not higher than the preset error rate.
7. The bus signal reflection suppression apparatus according to claim 6, wherein the bus signal reflection suppression apparatus is configured to perform an operation to implement the bus signal reflection suppression method according to any of claims 1 to 5.
8, A bus signal reflection suppression device, comprising:
a memory to store instructions;
a processor configured to execute the instructions to cause the apparatus to perform operations to implement the bus signal reflection suppression method of any of claims 1-5.
9, kind of bus pull-up and pull-down resistance control circuit, characterized by, including relay, second relay, bus pull-up resistance and bus pull-down resistance, wherein:
the th relay is connected with the bus pull-up resistor in series, and the second relay is connected with the bus pull-down resistor in series;
the th relay and the second relay are respectively connected with the bus signal reflection suppression device of any of claims 6-8, and the bus signal reflection suppression device is used for controlling the on and off of the th relay and the second relay.
10, bus signal reflection suppression system, comprising the bus signal reflection suppression device of any of claims 6-8 and the bus pull-up and pull-down resistance control circuit of claim 9.
11. The bus signal reflection suppression system of claim 10, wherein said on-bus pull-down resistance control circuit is disposed at least transceivers on a bus.
12, computer-readable storage media storing computer instructions which, when executed by a processor, implement the method for suppressing bus signal reflections according to any of claims of claims 1-5.
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