CN109274615A - Bus signals reflection suppression methods, devices and systems, control circuit - Google Patents

Bus signals reflection suppression methods, devices and systems, control circuit Download PDF

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Publication number
CN109274615A
CN109274615A CN201811329016.1A CN201811329016A CN109274615A CN 109274615 A CN109274615 A CN 109274615A CN 201811329016 A CN201811329016 A CN 201811329016A CN 109274615 A CN109274615 A CN 109274615A
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China
Prior art keywords
bus
parameter
biasing resistor
reflection suppression
resistor
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CN201811329016.1A
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Chinese (zh)
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CN109274615B (en
Inventor
卓明胜
郭玉坚
唐政清
钟金扬
黎开晖
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Gree Electric Appliances Inc of Zhuhai
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Gree Electric Appliances Inc of Zhuhai
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Priority to CN201811329016.1A priority Critical patent/CN109274615B/en
Publication of CN109274615A publication Critical patent/CN109274615A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0278Arrangements for impedance matching
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/028Arrangements specific to the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0292Arrangements specific to the receiver end

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Dc Digital Transmission (AREA)
  • Bus Control (AREA)

Abstract

The present invention discloses a kind of bus signals reflection suppression methods, devices and systems, control circuit.The bus signals reflection suppression method includes: real-time acquisition bus parameter;According to the relationship of bus parameter and predefined parameter range, it is determined whether bus biasing resistor is accessed bus.The present invention can determine whether that bus biasing resistor is added according to the bit error rate or response rate of bus, to reduce influence of the reflection signal to communication line, raising RS-485 bus communication reliability.

Description

Bus signals reflection suppression methods, devices and systems, control circuit
Technical field
The present invention relates to automation field, in particular to a kind of bus signals reflection suppression methods, devices and systems, control Circuit processed.
Background technique
In modern automation field, with the development of digital communication system, there is an urgent need to a kind of buses can be suitble to far The digital communication of distance, then RS-485 bus is come into being.
It is a kind of support multinode (32) that RS-485 bus is developed on the basis of RS-422 bus using EIA, remote The bus standard of distance (1219m) and high receiving sensitivity (voltage down to 200mV can be detected).RS-485 standard is using balance Formula sends, the received data collector of differential type drives bus, concrete specification requirement: input resistance Rin >=12k of receiver Ω;Driver can export the common-mode voltage of ± 7V;Capacitor≤50pF of input terminal;It is 32 in number of nodes, is configured with 120 Ω's In the case where terminal resistance, driver at least can also the output voltage 1.5V (parameter of the size of terminal resistance and twisted pair used It is related);The input sensitivity of receiver is that 200mV (i.e. when (Vin+)-(Vin-) >=0.2V, is indicated signal " 0 ";(Vin+)- (Vin-) < -0.2V when, indicate signal " 1 ").
Because of the remote of RS-485 bus, multinode (32) and transmission line characteristic at low cost, so that EIARS- 485 become the preferred standard of data transmission in industrial application.
Summary of the invention
It is found by the applicant that: it is remote, multinode and transmission line are at low cost the features such as so that RS-485 bus is widely applied In automatically control and data transmission system, but its own there are the shortcomings that if do not paid attention to handling, just will appear communication failure even The failures such as systemic breakdown, therefore the operational reliability for improving RS-485 bus is most important.And influence RS-485 bus communication can Primary factor by property is signal reflex.
In communication process, signal reflex can lead to there are two types of signal: impedance discontinuity and impedance mismatch.Fig. 1 is this Invention one embodiment middle impedance discontinuously causes the schematic diagram of signal reflex.As shown in Figure 1, impedance discontinuity, signal is being passed Defeated line end suddenly encounters cable resistance very little even without signal will cause to reflect in this place.Impedance discontinuity draws The principle of the signal reflex risen, entering another medium from a kind of medium with light will cause reflection to be similar.It eliminates this anti- The method penetrated just must bridge one and an equal amount of terminal resistance of characteristic impedance of cable in the end of cable, make cable Impedance it is continuous.Fig. 2 is the schematic diagram that terminal resistance correctly connects in one embodiment of the invention.Since signal is on cable Transmission be it is two-way, therefore, an an equal amount of terminal resistance can be bridged in the other end of communication cable, as shown in Figure 2.
It theoretically analyzes, as long as having bridged the terminal electricity to match with cable properties impedance in the end of transmission cable , just there is signal reflection phenomenon never again in resistance.But in realizing application, due to the characteristic impedance and communication of transmission cable The application environments such as baud rate are related, the signal reflex that characteristic impedance can not be essentially equal with terminal resistance therefore more or less Can also exist.Another reason for causing signal reflex is the impedance mismatch between data collector and transmission cable.It is this Reflection caused by reason, when being mainly manifested in communication line and being in idle mode, whole network data corruption.Signal reflex logarithm It is to have received receiver because reflection signal triggers the comparator of receiver input terminal after all according to the influence of transmission The signal of mistake leads to CRC check mistake or entire data frame error.
Weaken influence of the reflection signal to communication line, the relevant technologies generally use noise suppressed and aggregation line biased electrical The method of resistance.In practical applications, for smaller reflection signal, be it is simple and convenient, the relevant technologies are passed through frequently with aggregation line The method of biasing resistor.When communication baud rate is relatively high, it is necessary for connecing biasing resistor on the line.
Fig. 3 is the connection method schematic diagram of bus biasing resistor in one embodiment of the invention.As shown in figure 3, bus is inclined The effect for setting resistance is that the level for not having (idle mode) when data in bus is pulled away from 0 electricity after route enters idle state It is flat.Even if occurring smaller reflection signal or interference in route as a result, the data sink being articulated in bus will not Due to these signals arrival and generate malfunction.Bus biasing resistor includes pull-up resistor and pull down resistor, wherein power supply arrives Interelement calls pull-up resistor, and the effect of pull-up resistor is that uncertain signal is passed through a resistance to device Injection Current It is clamped in high level, resistance plays metering function simultaneously.And ground is to the pull down resistor that cries of interelement, the effect of pull down resistor is output Electric current, uncertain signal is clamped in low level by a resistance, and resistance plays metering function simultaneously.Pull-up resistor be for It solves to provide electric current, that is, sourcing current when bus driver scarce capacity;Pull down resistor is to fill electricity for absorbing electric current Stream.
In view of in above-described embodiment, no matter current demand signal reflects size, present communications effect quality bus biasing resistor always The technical issues of access, can be with the present invention provides a kind of bus signals reflection suppression methods, devices and systems, control circuit Determined whether that bus biasing resistor is added according to the bit error rate of bus or response rate.
According to an aspect of the present invention, a kind of bus signals reflection suppression method is provided, comprising:
Bus parameter is obtained in real time;
According to the relationship of bus parameter and predefined parameter range, it is determined whether bus biasing resistor is accessed bus.
In some embodiments of the invention, the relationship according to bus parameter and predefined parameter range, it is determined whether Include: by bus biasing resistor access bus
In the case where bus parameter is not within the scope of predefined parameter, bus biasing resistor is accessed into bus;
In the case where bus parameter is within the scope of predefined parameter, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, the bus parameter is response rate or the bit error rate.
In some embodiments of the invention, described to be joined according to bus in the case where the bus parameter is response rate Several relationships with predefined parameter range, it is determined whether include: by bus biasing resistor access bus
In the case where response rate is lower than predetermined response rate, bus biasing resistor is accessed into bus;
In the case where response rate is not less than predetermined response rate, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, described to be joined according to bus in the case where the bus parameter is the bit error rate Several relationships with predefined parameter range, it is determined whether include: by bus biasing resistor access bus
In the case where the bit error rate is higher than the predetermined bit error rate, bus biasing resistor is accessed into bus;
In the case where the bit error rate is not higher than the predetermined bit error rate, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, the bus signals reflection suppression method further include:
By controlling the on-off for the relay connecting with bus biasing resistor, control whether to access bus biasing resistor total Line.
In some embodiments of the invention, described according to bus parameter and predefined parameter model for multimachine universal serial bus The relationship enclosed, it is determined whether include: by bus biasing resistor access bus
Each transceiver bus biasing resistor being set in bus;
For every a pair of of bus biasing resistor, according to the relationship of bus parameter and predefined parameter range, it is determined whether will be total Line biasing resistor accesses bus.
In some embodiments of the invention, described according to bus parameter and predefined parameter model for multimachine universal serial bus The relationship enclosed, it is determined whether include: by bus biasing resistor access bus
It is determined just for a pair of of bus biasing resistor in bus according to the relationship of bus parameter and predefined parameter range Whether by bus biasing resistor access bus, wherein the pair of bus biasing resistor be the corresponding bus of host transceiver it is inclined It sets resistance or the pair of bus biasing resistor is the corresponding bus biasing resistor of a slave transceiver.
According to another aspect of the present invention, a kind of bus signals reflection suppression device is provided, comprising:
Bus parameter obtains module, for obtaining bus parameter in real time;
Biasing resistor control module, for the relationship according to bus parameter and predefined parameter range, it is determined whether by bus Biasing resistor accesses bus.
In some embodiments of the invention, the bus signals reflection suppression device is realized for executing as any of the above-described The operation of bus signals reflection suppression method described in embodiment.
According to another aspect of the present invention, a kind of bus signals reflection suppression device is provided, comprising:
Memory, for storing instruction;
Processor, for executing described instruction, so that described device execution realization is total as described in above-mentioned any embodiment The operation of line signal reflex suppressing method.
According to another aspect of the present invention, pull down resistor control circuit in a kind of bus is provided, comprising: the first relay, Second relay, bus pull-up resistor and bus pull down resistor, in which:
First relay and bus pull-up resistor are connected in series, and the second relay and bus pull down resistor are connected in series;
First relay and the second relay also respectively with the bus signals reflection suppression as described in above-mentioned any embodiment Device connection, the bus signals reflection suppression device are used to control the on-off of the first relay and the second relay.
According to another aspect of the present invention, a kind of bus signals reflection suppression system is provided, which is characterized in that including as above It states and pulls down electricity in bus signals reflection suppression device described in any embodiment and the bus as described in above-mentioned any embodiment Hinder control circuit.
In some embodiments of the invention, in the bus pull down resistor control circuit be arranged in bus at least one At a transceiver.
According to another aspect of the present invention, a kind of computer readable storage medium is provided, which is characterized in that the computer Readable storage medium storing program for executing is stored with computer instruction, realizes as described in above-mentioned any embodiment when described instruction is executed by processor Bus signals reflection suppression method.
The present invention can determine whether that bus biasing resistor is added according to the bit error rate or response rate of bus, to reduce Influence of the signal to communication line is reflected, RS-485 bus communication reliability is improved.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with It obtains other drawings based on these drawings.
Fig. 1 is the schematic diagram that one embodiment of the invention middle impedance discontinuously causes signal reflex.
Fig. 2 is the schematic diagram that terminal resistance correctly connects in one embodiment of the invention.
Fig. 3 is the connection method schematic diagram of bus biasing resistor in one embodiment of the invention.
Fig. 4 is the schematic diagram of some embodiments of bus signals reflection suppression system of the present invention.
Fig. 5 is the schematic diagram of pull down resistor control circuit one embodiment in bus of the present invention.
Fig. 6 be in one embodiment of the invention in bus pull down resistor control circuit be added in the case of upper pull down resistor etc. Imitate circuit diagram.
Fig. 7 is that pull down resistor control circuit is added without in the case of pull down resistor in bus in one embodiment of the invention Schematic equivalent circuit.
Fig. 8 is the schematic diagram of some embodiments of bus signals reflection suppression method of the present invention.
Fig. 9 is the schematic diagram of 485 network of half-duplex RS in one embodiment of the invention.
Figure 10 is the schematic diagram of some embodiments of bus signals reflection suppression device of the present invention.
Figure 11 is the schematic diagram of other embodiments of bus signals reflection suppression device of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Below Description only actually at least one exemplary embodiment be it is illustrative, never as to the present invention and its application or make Any restrictions.Based on the embodiments of the present invention, those of ordinary skill in the art are not making creative work premise Under every other embodiment obtained, shall fall within the protection scope of the present invention.
Unless specifically stated otherwise, positioned opposite, the digital table of the component and step that otherwise illustrate in these embodiments It is not limited the scope of the invention up to formula and numerical value.
Simultaneously, it should be appreciated that for ease of description, the size of various pieces shown in attached drawing is not according to reality Proportionate relationship draw.
Technology, method and apparatus known to person of ordinary skill in the relevant may be not discussed in detail, but suitable In the case of, the technology, method and apparatus should be considered as authorizing part of specification.
It is shown here and discuss all examples in, any occurrence should be construed as merely illustratively, without It is as limitation.Therefore, the other examples of exemplary embodiment can have different values.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi It is defined in a attached drawing, then in subsequent attached drawing does not need that it is further discussed.
Fig. 4 is the schematic diagram of some embodiments of bus signals reflection suppression system of the present invention.As shown in figure 4, the bus It may include pull down resistor control electricity in bus signals reflection suppression device 41 and at least one bus that signal reflex, which inhibits system, Road 42, in which:
Bus signals reflection suppression device 41, for obtaining bus parameter in real time;According to bus parameter and predefined parameter model The relationship enclosed, it is determined whether the bus biasing resistor in bus in pull down resistor control circuit 42 is accessed into bus.
In some embodiments of the invention, the bus parameter can be response rate or the bit error rate.
Bus signals reflection suppression device 41, for can be used for the situation in bus parameter not within the scope of predefined parameter Under, the bus biasing resistor in upper pull down resistor control circuit 42 is accessed into bus;In bus parameter within the scope of predefined parameter In the case where, the bus biasing resistor in upper pull down resistor control circuit 42 is disconnected from bus.
In some embodiments of the invention, bus signals reflection suppression device 41 can be used for by pulling down electricity in control The on-off for the relay being connect in resistance control circuit 42 with bus biasing resistor, it is total to control whether to access bus biasing resistor Line.
In some embodiments of the invention, pull down resistor control circuit 42 is arranged in bus at least in the bus At one transceiver.
In some embodiments of the invention, pull down resistor control circuit 42 may include: the first relay in the bus Device, the second relay, bus pull-up resistor and bus pull down resistor, in which:
First relay and bus pull-up resistor are connected in series, and the second relay and bus pull down resistor are connected in series.
First relay and the second relay also respectively with the bus signals reflection suppression as described in above-mentioned any embodiment Device connection, the bus signals reflection suppression device 41 are used to control the on-off of the first relay and the second relay.
Based on the bus signals reflection suppression system that the above embodiment of the present invention provides, the pull down resistor control electricity in bus Relay is added between the upper pull down resistor on road, can be judged whether according to the bit error rate or response rate of 485 buses plus RS-485 is total Line biasing resistor improves the reliability of RS-485 bus communication to reduce influence of the reflection signal to communication line.
Fig. 5 is the schematic diagram of pull down resistor control circuit one embodiment in bus of the present invention.Fig. 6 is a reality of the invention Apply the schematic equivalent circuit in example in bus in the case of the upper pull down resistor of pull down resistor control circuit addition.Fig. 7 is the present invention Pull down resistor control circuit is added without the schematic equivalent circuit in the case of pull down resistor in bus in one embodiment.
Pull down resistor control circuit is pull down resistor control circuit in RS485 bus, chip U1 in bus as shown in Figure 5 For non-polar 485 chip, RO is the receiving end UART, and RE is that UART receives enable end, and DE is that UART sends enable end, DI UART Transmitting terminal.The port A of chip U1 is RS485 bus A line, and the port B of chip U1 is RS485 bus B line.R1, R2 are the end UART Pull-up resistor, R3, R4 are the end UART pull down resistor, and R5, R6 are the upper and lower pull-up resistor of RS485 bus end, and R7, R8 are current-limiting resistance. TVS1, TVS2 are two-way TVS diode, lightning-preventing protector part.CN1 is that 4 core sockets (can more alias needle according to the actual situation Seat), it is from top to bottom+12V, B line end mouth, A line end mouth and GND.First relay K1, the second relay K2 are normally opened relay Device.
SIGNAL be Fig. 4 embodiment bus signals reflection suppression device 41 in RS485 bus pull down resistor control electricity The control signal that road provides.Bus signals reflection suppression device 41, the situation for bus parameter not within the scope of predefined parameter Under, the control signal SIGNAL that upward pull down resistor control circuit 42 provides is low level;In bus parameter in predefined parameter model In the case where in enclosing, the control signal SIGNAL that upward pull down resistor control circuit 42 provides is high level.
In the case that SIGNAL is low level 0V signal, normally opened relay K1, K2 closure, equivalent circuit at this time is as schemed Shown in 6, at this point, RS485 bus has upper and lower pull-up resistor R5, R6.
In the case that SIGNAL is high level+5V signal, normally opened relay K1, K2 are disconnected, and equivalent circuit at this time is such as Shown in Fig. 7, at this point, RS485 bus does not have upper and lower pull-up resistor R5, R6.
Pull down resistor control circuit in the bus provided based on the above embodiment of the present invention is above and below a kind of RS-485 bus Relay is added between upper pull down resistor in pull-up resistor control circuit, can be according to the judgement of the bit error rate or response rate of 485 buses It is logical to improve RS-485 bus to reduce influence of the reflection signal to communication line for no plus RS-485 bus biasing resistor The reliability of news.
Fig. 8 is the schematic diagram of some embodiments of bus signals reflection suppression method of the present invention.Preferably, the present embodiment can be by Bus signals reflection suppression device of the present invention or bus signals reflection suppression system of the present invention execute.As shown in figure 8, the method Can also include:
Step 81, bus parameter is obtained in real time.
In some embodiments of the invention, the bus parameter can be the bus parameters such as response rate or the bit error rate.
In some embodiments of the invention, step 81 may include counting response rate or the bit error rate by UART receiver function Equal bus parameters.
Step 82, according to the relationship of bus parameter and predefined parameter range, it is determined whether access bus biasing resistor total Line.
In some embodiments of the invention, step 82 may include: in bus parameter not within the scope of predefined parameter In the case of, bus biasing resistor is accessed into bus;In the case where bus parameter is within the scope of predefined parameter, by bus biased electrical Resistance is disconnected from bus.
In some embodiments of the invention, in the case where the bus parameter is response rate, step 82 may include: In the case where response rate is lower than predetermined response rate, bus biasing resistor is accessed into bus;It is replied in response rate not less than predetermined In the case where rate, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, in the case where the bus parameter is the bit error rate, step 82 may include: In the case where the bit error rate is higher than the predetermined bit error rate, bus biasing resistor is accessed into bus;Predetermined error code is not higher than in the bit error rate In the case where rate, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, the bus signals reflection suppression method can also include: by control with The on-off of the relay (such as the first relay K1, second relay K2 of Fig. 5 embodiment) of bus biasing resistor connection, control Whether by bus biasing resistor access bus.
In some embodiments of the invention, for multimachine universal serial bus, the step 82 may include: that bus is biased Each transceiver in bus is arranged in resistance;For every a pair of of bus biasing resistor, according to bus parameter and predefined parameter The relationship of range, it is determined whether bus biasing resistor is accessed into bus, wherein the multimachine universal serial bus refers to that multimachine is serial The universal serial bus of communication system, Multiple MCUs Communication System are the communication system that multiple single-chip microcontrollers (controller, computer) is serially constituted System, Multiple MCUs Communication System generally use primary and secondary structure (that is, serial communication system of a host and multiple slaves).This Invention above-described embodiment can add biasing resistor to each transceiver being articulated in RS-485 bus, give each transmitting-receiving Device has all added a bias voltage.
In some embodiments of the invention, for multimachine universal serial bus, the step 82 can also include: just for total A pair of of bus biasing resistor on line, according to the relationship of bus parameter and predefined parameter range, it is determined whether by bus biased electrical Resistance access bus, wherein the pair of bus biasing resistor is the corresponding bus biasing resistor of host transceiver or described one It is the corresponding bus biasing resistor of a slave transceiver to bus biasing resistor, wherein one slave transceiver can be with For specified a slave transceiver or any one slave transceiver.
In some embodiments of the invention, a specified slave transceiver can be highest addresses slave pair The slave transceiver answered is the corresponding slave transceiver of minimum bit address slave, wherein the address is preset The device address of each slave in serial communication system.
The above embodiment of the present invention is in one section of bus only with a pair of of biasing resistor.The method pair of the above embodiment of the present invention There are big reflection signal or interference signal are more effective in bus.The above embodiment of the present invention due to biasing resistor addition, Increase the load of bus.
It, can be according to the error code of 485 buses based on the bus signals reflection suppression method that the above embodiment of the present invention provides Rate or response rate judge whether plus RS-485 bus biasing resistor, to reduce influence of the reflection signal to communication line, mentions The high reliability of RS-485 bus communication.
In some embodiments of the invention, general using master in Multiple MCUs Communication System consisting of a single chip microcomputer From formula structure: slave not active transmission order or data, all are all controlled by host.Fig. 9 is half in one embodiment of the invention The schematic diagram of duplexing RS485 network.The multi computer communication that RS485 bus is constituted is half-duplex operation mode as shown in Figure 9 mostly, Only one node is host node in the entire system, and the every other node in bus is all from node.Communication mode is general It is each node of host node cyclic polling.Each communication identification number for having oneself from node, when in the polling message of host node When including oneself communication identification, this then carries out response to this frame from node, other nodes then ignore this frame, does not do any place Reason.And in a multi-machine communication system, an only single machine cannot be communicated mutually, i.e., between each slave as host Make have information exchange that must also forward by host.
Specific example 1:
For biasing resistor is arranged in bus each transceiver the case where.It is required that host, each slave has Pull down resistor control circuit in RS485 bus shown in fig. 5, when Host Detection to the bit error rate or response rate of any slave (all by host UART receiver function count) not in the case where preset range, the SIGNAL of host is low level, while host Being handed down to each slave and being set as SIGNAL is low level order, so that each transceiver being articulated in RS-485 bus Biasing resistor is added.Thus the above embodiment of the present invention has added a bias voltage to each transceiver, to reduce Influence of the signal to communication line is reflected, improving response rate reduces the bit error rate.
Specific example 2:
For only using the first situation of a pair of of biasing resistor in one section of bus.It is required that host can not have, each Slave has pull down resistor control circuit in RS485 bus shown in fig. 5.Based on how determining that the biasing resistor of which slave is The bus biasing resistor of access bus is determined whether according to the relationship of bus parameter and predefined parameter range, such case, which has, to be divided into Three kinds of specific situations.
Specific example 2-1:
When system electrification, host while having () and all slaves are defaulted as SIGNAL as high level, while host is from low level To high position record slave addresses and number.When the bit error rate or response rate of Host Detection to any slave are (all by host UART receiver function statistics) not in the case where preset range, the SIGNAL of host is still high level while having (), while host It is minimum for being handed down to a tableland location, and slave SIGNAL is that be set as SIGNAL be low level order to high level, when this from When machine communication failure, host will determine time low order address and SIGNAL is the slave replacement communication failure slave of high level.
Specific example 2-2:
When system electrification, host while having () and all slaves are defaulted as SIGNAL as high level, while host is from low level To high position record slave addresses and number.When the bit error rate or response rate of Host Detection to any slave are (all by host UART receiver function statistics) not in the case where preset range, the SIGNAL of host is still high level while having (), while host Being handed down to a tableland location is highest, and slave SIGNAL is that be set as SIGNAL be low level order to high level, when this from When machine communication failure, host will determine time high address and SIGNAL is the slave replacement communication failure slave of high level.
Specific example 2-3:
When system electrification, host (when having) and all slaves are defaulted as SIGNAL as high level.When Host Detection is taken office The bit error rate or response rate (all being counted by host UART receiver function) of what slave be not in the case where preset range, host SIGNAL be still high level while having (), while host is issued to the slave that any one SIGNAL is high level and is set as SIGNAL is low level order, and when the slave communication failure, host will select any one replacement communication in remaining slave Failure slave.
Thus the above embodiment of the present invention only to use a pair of of biasing resistor in one section of bus, to reduce in bus There are big reflection signals or interference signal to reflect signal, and improving response rate reduces the bit error rate.
Specific example 3:
For only using the second situation of a pair of of biasing resistor in one section of bus.It is required that host has, each slave can Not have pull down resistor control circuit in RS485 bus shown in fig. 5.When system electrification, host and all slaves (have When) SIGNAL is defaulted as high level.When the bit error rate or response rate of Host Detection to any slave are (all by host UART Receiver function statistics) when being lower than threshold values, the SIGNAL of host is set to low level, and all slaves (when having) are still defaulted as SIGNAL For high level.Thus the above embodiment of the present invention only to use a pair of of biasing resistor in one section of bus, to reduce bus On there are big reflection signal or interference signals to reflect signal, improving response rate reduces the bit error rate.
Figure 10 is the schematic diagram of some embodiments of bus signals reflection suppression device of the present invention.As shown in Figure 10, described total It may include that bus parameter obtains that line signal reflex, which inhibits device (such as bus signals reflection suppression device 41 of Fig. 4 embodiment), Module 101 and biasing resistor control module 102, in which:
Bus parameter obtains module 101, obtains bus parameter in real time.
In some embodiments of the invention, the bus parameter is response rate or the bit error rate.
Biasing resistor control module 102, according to the relationship of bus parameter and predefined parameter range, it is determined whether bus is inclined Set resistance access bus.
In some embodiments of the invention, biasing resistor control module 102 can be used in bus parameter not predetermined In the case where in parameter area, bus biasing resistor is accessed into bus;And the situation in bus parameter within the scope of predefined parameter Under, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, biasing resistor control module 102 can be used for being back in the bus parameter In the case where multiple rate, in the case where response rate is lower than predetermined response rate, bus biasing resistor is accessed into bus;Response rate not In the case where lower than predetermined response rate, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, biasing resistor control module 102 can be used in the bus parameter being mistake In the case where code rate, in the case where the bit error rate is higher than the predetermined bit error rate, bus biasing resistor is accessed into bus;The bit error rate not In the case where higher than the predetermined bit error rate, bus biasing resistor is disconnected from bus.
In some embodiments of the invention, biasing resistor control module 102 can be used for biasing by control and bus The on-off of the relay of resistance connection controls whether bus biasing resistor accessing bus.
In some embodiments of the invention, biasing resistor control module 102 can be used for for multimachine universal serial bus, Each transceiver in bus is arranged in bus biasing resistor;For every a pair of of bus biasing resistor, according to bus parameter with The relationship of predefined parameter range, it is determined whether bus biasing resistor is accessed into bus.
In some embodiments of the invention, biasing resistor control module 102 can be used for for multimachine universal serial bus, only For a pair of of bus biasing resistor in bus, according to the relationship of bus parameter and predefined parameter range, it is determined whether by bus Biasing resistor accesses bus, wherein and the pair of bus biasing resistor is the corresponding bus biasing resistor of host transceiver, or The pair of bus biasing resistor is the corresponding bus biasing resistor of a slave transceiver.
In some embodiments of the invention, the bus signals reflection suppression device is realized for executing as any of the above-described The operation of bus signals reflection suppression method described in embodiment (such as Fig. 8 embodiment).
Figure 11 is the schematic diagram of other embodiments of bus signals reflection suppression device of the present invention.As shown in figure 11, described Bus signals reflection suppression device (such as bus signals reflection suppression device 41 of Fig. 4 embodiment) may include memory 111 With processor 112, in which:
Memory 111, for storing instruction;
Processor 112, for executing described instruction, so that described device execution realization such as above-mentioned any embodiment (such as Fig. 8 embodiment) described in bus signals reflection suppression method operation.
It, can be according to the error code of 485 buses based on the bus signals reflection suppression device that the above embodiment of the present invention provides Rate or response rate judge whether plus RS-485 bus biasing resistor, to reduce influence of the reflection signal to communication line, mentions The high reliability of RS-485 bus communication.
According to another aspect of the present invention, a kind of computer readable storage medium is provided, which is characterized in that the computer Readable storage medium storing program for executing is stored with computer instruction, when described instruction is executed by processor realize as above-mentioned any embodiment (such as Fig. 8 embodiment) described in bus signals reflection suppression method.
It, can be according to the bit error rate of 485 buses based on the computer readable storage medium that the above embodiment of the present invention provides Or response rate judges whether plus RS-485 bus biasing resistor, to reduce influence of the reflection signal to communication line, improves The reliability of RS-485 bus communication.
Bus signals reflection suppression device described above can be implemented as executing function described herein General processor, programmable logic controller (PLC) (PLC), digital signal processor (DSP), specific integrated circuit (ASIC), existing Field programmable gate array (FPGA) either other programmable logic device, discrete gate or transistor logic, discrete hardware Component or it is any appropriately combined.
So far, the present invention is described in detail.In order to avoid covering design of the invention, it is public that this field institute is not described The some details known.Those skilled in the art as described above, completely it can be appreciated how implementing technology disclosed herein Scheme.
Those of ordinary skill in the art will appreciate that realizing that all or part of the steps of above-described embodiment can pass through hardware It completes, relevant hardware can also be instructed to complete by program, the program can store in a kind of computer-readable In storage medium, storage medium mentioned above can be read-only memory, disk or CD etc..
Description of the invention is given for the purpose of illustration and description, and is not exhaustively or will be of the invention It is limited to disclosed form.Many modifications and variations are obvious for the ordinary skill in the art.It selects and retouches It states embodiment and is to more preferably illustrate the principle of the present invention and practical application, and those skilled in the art is enable to manage The solution present invention is to design various embodiments suitable for specific applications with various modifications.

Claims (15)

1. a kind of bus signals reflection suppression method characterized by comprising
Bus parameter is obtained in real time;
According to the relationship of bus parameter and predefined parameter range, it is determined whether bus biasing resistor is accessed bus.
2. bus signals reflection suppression method according to claim 1, which is characterized in that described according to bus parameter and pre- Determine the relationship of parameter area, it is determined whether include: by bus biasing resistor access bus
In the case where bus parameter is not within the scope of predefined parameter, bus biasing resistor is accessed into bus;
In the case where bus parameter is within the scope of predefined parameter, bus biasing resistor is disconnected from bus.
3. bus signals reflection suppression method according to claim 2, which is characterized in that the bus parameter is response rate Or the bit error rate.
4. bus signals reflection suppression method according to claim 3, which is characterized in that
In the case where the bus parameter is response rate, the relationship according to bus parameter and predefined parameter range is determined Whether bus biasing resistor is accessed bus includes:
In the case where response rate is lower than predetermined response rate, bus biasing resistor is accessed into bus;
In the case where response rate is not less than predetermined response rate, bus biasing resistor is disconnected from bus.
5. bus signals reflection suppression method according to claim 3, which is characterized in that
In the case where the bus parameter is the bit error rate, the relationship according to bus parameter and predefined parameter range is determined Whether bus biasing resistor is accessed bus includes:
In the case where the bit error rate is higher than the predetermined bit error rate, bus biasing resistor is accessed into bus;
In the case where the bit error rate is not higher than the predetermined bit error rate, bus biasing resistor is disconnected from bus.
6. bus signals reflection suppression method according to any one of claims 1-5, which is characterized in that further include:
By controlling the on-off for the relay connecting with bus biasing resistor, control whether bus biasing resistor accessing bus.
7. bus signals reflection suppression method according to any one of claims 1-5, which is characterized in that for multimachine string Row bus, the relationship according to bus parameter and predefined parameter range, it is determined whether bus biasing resistor is accessed into bus packet It includes:
Each transceiver bus biasing resistor being set in bus;
For every a pair of of bus biasing resistor, according to the relationship of bus parameter and predefined parameter range, it is determined whether bus is inclined Set resistance access bus.
8. bus signals reflection suppression method according to any one of claims 1-5, which is characterized in that for multimachine string Row bus, the relationship according to bus parameter and predefined parameter range, it is determined whether bus biasing resistor is accessed into bus packet It includes:
Just for a pair of of bus biasing resistor in bus, according to the relationship of bus parameter and predefined parameter range, it is determined whether Bus biasing resistor is accessed into bus, wherein the pair of bus biasing resistor is the corresponding bus biased electrical of host transceiver Resistance or the pair of bus biasing resistor are the corresponding bus biasing resistor of a slave transceiver.
9. a kind of bus signals reflection suppression device characterized by comprising
Bus parameter obtains module, for obtaining bus parameter in real time;
Biasing resistor control module, for the relationship according to bus parameter and predefined parameter range, it is determined whether bias bus Resistance accesses bus.
10. bus signals reflection suppression device according to claim 9, which is characterized in that the bus signals reflection suppression Device processed is used to execute the operation realized such as bus signals reflection suppression method of any of claims 1-8.
11. a kind of bus signals reflection suppression device characterized by comprising
Memory, for storing instruction;
Processor is realized so that described device executes as of any of claims 1-8 total for executing described instruction The operation of line signal reflex suppressing method.
12. pull down resistor control circuit in a kind of bus characterized by comprising the first relay, the second relay, bus Pull-up resistor and bus pull down resistor, in which:
First relay and bus pull-up resistor are connected in series, and the second relay and bus pull down resistor are connected in series;
First relay and the second relay are also reflected with the bus signals as described in any one of claim 9-11 respectively to be pressed down Device connection processed, the bus signals reflection suppression device are used to control the on-off of the first relay and the second relay.
13. a kind of bus signals reflection suppression system, which is characterized in that including total as described in any one of claim 9-11 Line signal reflex inhibits pull down resistor control circuit in device and bus as claimed in claim 12.
14. bus signals reflection suppression system according to claim 13, which is characterized in that pull down resistor in the bus Control circuit is arranged at least one transceiver in bus.
15. a kind of computer readable storage medium, which is characterized in that the computer-readable recording medium storage has computer to refer to It enables, such as bus signals reflection suppression method of any of claims 1-8 is realized when described instruction is executed by processor.
CN201811329016.1A 2018-11-09 2018-11-09 Bus signal reflection suppression method, device and system and control circuit Active CN109274615B (en)

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