CN109213703A - A kind of data detection method and data detection device - Google Patents
A kind of data detection method and data detection device Download PDFInfo
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Abstract
This application provides a kind of data detection method and data detection devices, have dephased sampling clock using at least two groups and sample to input data, it is ensured that one surely detects the data edge of input data, so that it is determined that optimal sampling phase window.The embodiment of the present application method includes: when chip reads the data of external equipment, it is sampled using input data of at least two groups sampling clock to interface controller, sampled data set is obtained, there is between any two groups of sampling clocks phase difference at least two groups sampling clock；The data edge of input data is determined according to sampled data set；Destination sample phase window is determined according to data edge.
Description
Technical field
This application involves computer field more particularly to a kind of data detection methods and data detection device.
Background technique
In existing chip architecture, there is secure digital (Security Digtal, SD) card and embedded memory card
(Embedded Multi Media Card, eMMC) etc., SD card and eMMC are the external equipment and memory interface for belonging to chip,
It can be used as the starting and storage in chip system.
When chip reads the data of the external equipments such as SD card or eMMC, in order to guarantee the correctness of the data read,
Need to do the adjustment for reading data in reading data direction.Therefore, it requires to carry out data inspection in each reading data course of chip
It surveys, a kind of data detection method are as follows: when chip reads the data of external equipment, by using the clock sampling of multiple and different phases
The data of chip Peripheral Interface obtain multiple sampled datas, and the reading data that multiple sampled datas and chip are obtained carry out pair
Than, judge which sampled data be it is wrong, so that it is determined that optimal sampling phase window.
In the above existing data detection method, the determination of optimal sampling phase window is dependent on sampling clock phase
Precision is correct there is also that can not find even if infinitely going the precision of increase sampling clock phase when data window is very big
With mistake boundary Data Position the case where, cause in the presence of can not detect read error in data the case where.
Summary of the invention
This application provides a kind of data detection method and data detection devices, have dephased adopt using at least two groups
Sample clock samples input data, it is ensured that one surely detects the data edge of input data, so that it is determined that optimal adopt
Sample phase window.
The first aspect of the application provides a kind of data detection method, applied to the peripheral interface system of chip, the core
The peripheral interface system of piece includes interface controller and external equipment, and the data detection method includes:
When the chip reads the data of the external equipment, using at least two groups sampling clock to the Interface Controller
The input data of device is sampled, and sampled data set is obtained, in at least two groups sampling clock any two groups of sampling clocks it
Between have phase difference；
The data edge of the input data is determined according to the sampled data set；
Destination sample phase window is determined according to the data edge.
In the peripheral interface system of chip include interface controller and external equipment, external equipment include SD card, eMMC and
SDIO card etc., interface controller are used to control multiple Peripheral Interfaces in chip structure, Peripheral Interface include SDIO interface and
EMMC interface etc., the data and instruction between chip and external equipment, which interacts, to be required to realize by interface controller, in core
When piece reads the data of external equipment, in order to guarantee the correctness of the data read, the input terminal in interface controller is needed
Data carry out sampling judgement, and the determination of optimal sampling phase window just needs to realize by data detection device, data
Detection device is sampled using input data of at least two groups sampling clock to interface controller, obtains sampled data set, by
It is that tool is dephased between any two groups of sampling clocks at least two groups sampling clock, then can necessarily sample input
The data jump point of data just can determine that the data edge of input data, known after carrying out data analysis to sampled data set
In the case where data edge, it just can determine that destination sample phase window, destination sample phase window are exactly most according to data edge
Good sampling phase window.Compared with existing data detection method, has dephased sampling clock pair using at least two groups
Input data is sampled, it is ensured that one surely detects the data edge of input data, may thereby determine that optimal sampling phase
Position window.
In conjunction with the application in a first aspect, in the application first aspect first embodiment, sampling clock be N group, N be greater than
1 integer, the sampled point quantity of each group of sampling clock are M, and M is the integer greater than 0,
It is described to be sampled using input data of at least two groups sampling clock to the interface controller, obtain hits
According to collection, comprising:
The input data of the interface controller is adopted respectively using each group of sampling clock of N group sampling clock
Sample, obtains N group sampled data, and each group of sampled data has M sampled value；
According to the phase difference between two groups of sampling clocks any in the N group sampling clock, to the N group sampled data
N*M sampled value carries out sequence before and after phase, obtains sampled data set.
Assuming that sampling clock is N group, N is the integer greater than 1, and the sampled point quantity of each group of sampling clock is M, and M is
Integer greater than 0, sampled point are a clock of Presetting phase, and each group of sampling clock of N group sampling clock is respectively adopted
The input data of interface controller is sampled, what is obtained after one group of sampling clock sampling is M sampled value, when N group samples
The N*M sampled value that clock obtains, and due to all having phase difference between any two groups of sampling clocks, then this N*M sampling
The phase for being worth corresponding sampled point is all different, according to the phase difference between two groups of sampling clocks any in N group sampling clock, to N
N*M sampled value of group sampled data carries out sequence before and after phase, obtains sampled data set.
In conjunction with the application first aspect first embodiment, in the application first aspect second embodiment, the basis
The sampled data set determines the data edge of the input data, comprising:
Whether compare the sampled data concentrates any two adjacent sample values identical；
If two adjacent sample values are identical, it is determined that be not the data edge of the input data；
If two adjacent sample values are not identical, it is determined that be the data edge of the input data.
Detection for the data edge of input data is to be adopted by judging what sampled data set obtained specifically, comparing
Any two adjacent sample values in sample data set, if it includes 4 sampled values that sampled data, which is concentrated, the 1st sampled value is the 1, the 2nd
A sampled value is 1, and the 3rd sampled value is 1, and the 4th sampled value is 0, compare the 1st sampled value and the 2nd sampled value the two
Adjacent sample values, since sampled value is all 1, then it is determined that not being the data edge of input data；Compare the 2nd sampled value and
3 sampled value the two adjacent sample values, since sampled value is all 1, determination is not the data edge of input data；Compare the 3rd
A sampled value and the 4th sampled value the two adjacent sample values, the 3rd sampled value is 1, and the 4th sampled value is 0, then it is determined that
It is the data edge of input data.
In conjunction with the application first aspect second embodiment, in the application first aspect third embodiment, the basis
The data edge determines optimum sampling phase window, comprising:
According to corresponding two adjacent sample values of the data edge, determine that described two adjacent sample values are two corresponding
Sampled point；
According to the phase value of described two sampled points, destination sample phase window is determined.
After the data edge of input data has been determined, according to corresponding two adjacent sample values of data edge, by this
Two adjacent sample values can determine corresponding two sampled points, it is known that the phase value of all sampled points in every group of sampling clock
In the case of, the phase value of the two sampled points is also known that, it is known that the phase value of the two sampled points just can determine that target
Sampling phase window, since the destination sample phase window is the data edge of input data, then destination sample phase window
It is optimal sampling phase window.
In conjunction with the application first aspect, first aspect first embodiment, first aspect second embodiment or first party
Face third embodiment, it is described to be connect using at least two groups sampling clock to described in the 4th embodiment of the application first aspect
Before the input data of mouth controller is sampled, further includes:
Generate at least two groups sampling clock, there is between any two groups of sampling clocks phase difference, every group using clock when
Clock quantity is identical.
The sampling clock for sampling is the sampling clock at least two for being generated, and being generated by data detection device above
Group has phase difference between any two groups of sampling clocks, and the sampled point quantity of every group of sampling clock is identical.
It is described any in the 5th embodiment of the application first aspect in conjunction with the 4th embodiment of the application first aspect
The phase difference having between two groups of sampling clocks is fixed skew.
The phenomenon that being overlapped in order to avoid sampled point when different groups of sampling clock being used to be sampled, any two groups
Phase difference between sampling clock is traditionally arranged to be fixed value, and the data edge for determining input data is advantageous.
The application second aspect provides a kind of data detection device, applied to the peripheral interface system of chip, the chip
Peripheral interface system include interface controller and external equipment, the data detection device includes:
Data acquisition module is sampled when for reading the data of the external equipment when the chip using at least two groups
Clock samples the input data of the interface controller, obtains sampled data set, in at least two groups sampling clock
There is phase difference, the sampled point quantity of each group of sampling clock is identical between any two groups of sampling clocks；
Data processing module, for determining the data edge of the input data according to the sampled data set；
The data processing module is also used to determine destination sample phase window according to the data edge.
In the peripheral interface system of chip include interface controller and external equipment, external equipment include SD card, eMMC and
SDIO card etc., interface controller are used to control multiple Peripheral Interfaces in chip structure, Peripheral Interface include SDIO interface and
EMMC interface etc., the data and instruction between chip and external equipment, which interacts, to be required to realize by interface controller, in core
When piece reads the data of external equipment, in order to guarantee the correctness of the data read, the input terminal in interface controller is needed
Data carry out sampling judgement, and the determination of optimal sampling phase window just needs to realize by data detection device, data
Acquisition module is sampled using input data of at least two groups sampling clock to interface controller, obtains sampled data set, by
It is that tool is dephased between any two groups of sampling clocks at least two groups sampling clock, then can necessarily sample input
The data jump point of data just can determine that the number of input data after data processing module carries out data analysis to sampled data set
According to edge, in the case where given data edge, data acquisition module just can determine that destination sample phase window according to data edge
Mouthful, destination sample phase window is exactly optimal sampling phase window.Compared with existing data detection method, at least two are used
Group has dephased sampling clock and samples to input data, it is ensured that and one surely detects the data edge of input data,
It may thereby determine that optimal sampling phase window.
In conjunction with the application second aspect, in the application second aspect first embodiment, sampling clock is N group, N be greater than
1 integer, the sampled point quantity of each group of sampling clock are M, and M is the integer greater than 0,
The data acquisition module is also used for each group of sampling clock of N group sampling clock respectively to the interface
The input data of controller is sampled, and N group sampled data is obtained, and each group of sampled data has M sampled value；
The data acquisition module is also used to according to the phase between two groups of sampling clocks any in the N group sampling clock
Potential difference sort before and after phase to N*M sampled value of the N group sampled data, obtains sampled data set.
Assuming that sampling clock is N group, N is the integer greater than 1, and the sampled point quantity of each group of sampling clock is M, and M is
Integer greater than 0, sampled point are a clock of Presetting phase, and the every of N group sampling clock is respectively adopted in data acquisition module
One group of sampling clock samples the input data of interface controller, and what is obtained after one group of sampling clock sampling is M sampling
Value, the N*M sampled value that N group sampling clock obtains, and due to all having phase difference between any two groups of sampling clocks, then
The phase of this corresponding sampled point of N*M sampled value is all different, according between two groups of sampling clocks any in N group sampling clock
Phase difference sort before and after phase to N*M sampled value of N group sampled data, obtains sampled data set.
In conjunction with the application second aspect first embodiment, in the application second aspect second embodiment,
The data processing module, be also used to sampled data described in comparison concentrate any two adjacent sample values whether phase
Together；
The data processing module, if it is identical to be also used to two adjacent sample values, it is determined that be not the input data
Data edge；
The data processing module, if it is not identical to be also used to two adjacent sample values, it is determined that be the input data
Data edge.
Detection for the data edge of input data is by judging what sampled data set obtained, specifically, at data
Reason module compare sampled data concentrate any two adjacent sample values, if sampled data concentrate include 4 sampled values, the 1st
Sampled value is 1, and the 2nd sampled value is 1, and the 3rd sampled value is 1, and the 4th sampled value is 0, compares the 1st sampled value and the 2nd
The two adjacent sample values of sampled value, since sampled value is all 1, then it is determined that not being the data edge of input data；Compare the 2nd
A sampled value and the 3rd sampled value the two adjacent sample values, since sampled value is all 1, determination is not the data of input data
Edge；Compare the 3rd sampled value and the 4th sampled value the two adjacent sample values, the 3rd sampled value is 1, the 4th sampled value
It is 0, then it is determined that being the data edge of input data.
In conjunction with the application second aspect second embodiment, in the application second aspect third embodiment,
The data processing module, is also used to according to corresponding two adjacent sample values of the data edge, determine described in
Corresponding two sampled points of two adjacent sample values；
The data processing module is also used to the phase value according to described two sampled points, determines destination sample phase window
Mouthful.
After data processing module has determined the data edge of input data, data processing module is according to data edge pair
Two adjacent sample values answered can determine corresponding two sampled points by the two adjacent sample values, it is known that when every group of sampling
In clock in the case where the phase value of all sampled points, the phase value of the two sampled points is also known that, it is known that the two samplings
The phase value of point, just can determine that destination sample phase window, since the destination sample phase window is the data of input data
Edge, then destination sample phase window is optimal sampling phase window.
In conjunction with the application second aspect, second aspect first embodiment, second aspect second embodiment or second party
Face third embodiment, in the 4th embodiment of the application second aspect, the data detection device further include:
Clock generating module has phase difference for generating at least two groups sampling clock between any two groups of sampling clocks,
Every group identical using the sampled point quantity of clock.
The sampling clock for sampling is the sampling clock at least two for being generated, and being generated by clock generating module above
Group has phase difference between any two groups of sampling clocks, and the sampled point quantity of every group of sampling clock is identical.
It is described any in the 5th embodiment of the application second aspect in conjunction with the 4th embodiment of the application second aspect
The phase difference having between two groups of sampling clocks is fixed skew.
The phenomenon that being overlapped in order to avoid sampled point when different groups of sampling clock being used to be sampled, any two groups
Phase difference between sampling clock is traditionally arranged to be fixed value, and the data edge for determining input data is advantageous.
The third aspect of the application provides a kind of computer readable storage medium, in the computer readable storage medium
It is stored with instruction, when run on a computer, so that computer executes method described in above-mentioned various aspects.
The fourth aspect of the application provides a kind of computer program product comprising instruction, when it runs on computers
When, so that computer executes method described in above-mentioned various aspects.
Detailed description of the invention
Technical solution in ord to more clearly illustrate embodiments of the present application, below will be to institute in embodiment and description of the prior art
Attached drawing to be used is needed to be briefly described.
Fig. 1 is chip structure schematic diagram provided by the present application；
Fig. 2 is the structural schematic diagram of the peripheral interface system of chip provided by the present application；
Fig. 3 is the sampled data schematic diagram of existing data detection method provided by the present application；
Fig. 4 is one embodiment flow diagram of data detection method provided by the present application；
Fig. 5 is the schematic diagram provided by the present application that input data sampling is carried out using 2 groups of sampling clocks；
Fig. 6 is one embodiment structural schematic diagram of data detection device provided by the present application；
Fig. 7 is another example structure schematic diagram of data detection device provided by the present application.
Specific embodiment
This application provides a kind of data detection method and data detection devices, have dephased adopt using at least two groups
Sample clock samples input data, it is ensured that one surely detects the data edge of input data, so that it is determined that optimal adopt
Sample phase window.
Below in conjunction with the attached drawing in the application, the technical solution in the application is clearly and completely described.
The system architecture or scene of the application application are simply introduced first.
Fig. 1 show chip structure figure, including following device: central processing unit (Central Processing Unit,
CPU), graphics processor (GPU, Graphics Processing Unit), video display processor (Video and
Display Processor), Video Decoder (Video Decoder), HEVC (High Efficiency Video
Coding) video compression decoder (HEVC Encoder) of standard, the image decoder based on JPEG/PNG graphical format
(JPEG/PNG Decoder), command register (Instruction Register, IR), universal asynchronous receiving-transmitting transmitter
(Universal Asynchronous Receiver/Transmitter, UART) etc..
In order to realize that chip is interacted with the data and instruction of external equipment, chip structure also needs to include following interface:
Secure digital input-output card (Secure Digital Input and Output Card, SDIO) interface, joint test work
Make group (Joint Test Action Group, JTAG) interface, Double Data Rate (Double Data Rate, DDR) connects
Mouth, Nand/eMMC/SPI interface, high-definition multimedia interface (High Definition Multimedia Interface,
HDMI), USB2.0 interface and USB3.0 and PCIE2.0 and SATA3.0 interface etc..
The external equipment of chip pass through more than interface be linked into chip structure, for example, SD card is connect with SDIO interface,
Double Data Rate synchronous DRAM (DDR SDRAM) is connect with ddr interface, Nand Flash card, eMMC, SPI
Flash card and Nor Flash card are connect with Nand/eMMC/SPI interface, and USB2.0 equipment is connect with USB2.0 interface, USB3.0
It is connect with PCIE and SATA device with USB3.0 and PCIE2.0 and SATA3.0 interface, so as to realize chip and SD card, DDR
The data and instruction interaction of the external equipments such as SDRAM, eMMC, Nand Flash card and USB device.Wherein, SD card etc. is used as core
Although the external equipment of piece, eMMC belong to external equipment, but be actually the memory interface as chip.
The peripheral interface system of chip mainly includes interface controller and external equipment, as shown in Fig. 2, CPU passes through bus
It is connect with interface controller, interface controller includes cpu i/f, control channel, data channel and frequency dividing and clock control function
Module, external equipment is interacted with the data and instruction of CPU to be needed to realize by interface controller.Chip read SD card or
When the data of the external equipments such as eMMC, in order to guarantee the correctness of the data read, need to do reading data reading data direction
Adjustment.Therefore, it requires to carry out Data Detection, a kind of existing data detection method are as follows: chip in chip reading data course
When reading the data of external equipment, the input number of interface controller input terminal is used by using the clock of multiple and different phases
According to multiple sampled datas being obtained, as shown in figure 3, using the clock of 8 phases in a clock cycle, respectively to input data
It is sampled, if to realize Data Detection, being just highly dependent on clock sampling, (from high level (1), jump is to data jump
Low level (0) or from 0 jump be 1), for example, the phase window in Fig. 3 between the 4th clock and the 5th clock is exactly optimal
Sampling phase window.But this method is very high to the required precision of clock, it is assumed that when data window is very big, in Fig. 38
The sampled point of a clock will be all among the 1 of input data or 0, then data jump can not be just detected, if wanted
The accuracy for improving detection just has to the phase modulation precision for improving clock, increases chip cost, and even if phase modulation precision mentions
Gao Liao can still exist and be unable to get the optimal probability using phase window.
Described above in order to solve the problems, such as, this application provides optimal sampling is obtained using multiple groups sampling clock
The data detection method of phase window is illustrated data detection method below by flow embodiment.
Referring to Fig. 4, the embodiment of the present application provides a kind of data detection method, applied to the peripheral interface system of chip,
Peripheral interface system interface controller and external equipment, data detection method include:
401, it is sampled using input data of at least two groups sampling clock to interface controller, obtains sampled data
Collection；
It include interface controller and external equipment in the peripheral interface system of chip in the present embodiment, external equipment includes
SD card, eMMC and SDIO card etc., interface controller are used to control multiple Peripheral Interfaces in chip structure, and Peripheral Interface includes
SDIO interface and eMMC interface etc., the data and instruction between chip and external equipment interact require by interface controller come
It realizes, when chip reads the data of external equipment, in order to guarantee the correctness of the data read, needs in interface controller
The data of input terminal carry out sampling judgement, and the determination of optimal sampling phase window is just needed through data detection device come real
Existing, data detection device is sampled using input data of at least two groups sampling clock to interface controller, obtains hits
According to collection, there is phase difference at least two groups sampling clock between any two groups of sampling clocks.
402, the data edge of input data is determined according to sampled data set；
In the present embodiment, due to being that tool is dephased between two groups of sampling clocks any at least two groups sampling clock,
The data jump point that so can necessarily sample input data just can determine that defeated after carrying out data analysis to sampled data set
Enter the data edge of data.
403, destination sample phase window is determined according to data edge.
In the present embodiment, in the case where given data edge, destination sample phase window just can determine that according to data edge
Mouthful, destination sample phase window is exactly optimal sampling phase window.
In the embodiment of the present application, has dephased sampling clock using at least two groups and input data is sampled, really
A data edge for surely detecting input data is protected, so that it is determined that optimal sampling phase window, with existing Data Detection
Method is compared, and is had dephased sampling clock using at least two groups and is sampled to input data, it is ensured that one surely detects
The data edge of input data may thereby determine that optimal sampling phase window.
Optionally, in some embodiments of the present application, sampling clock is N group, and N is integer greater than 1, when each group of sampling
The sampled point quantity of clock is M, and M is the integer greater than 0,
It is sampled using input data of at least two groups sampling clock to interface controller, obtains sampled data set, wrapped
It includes:
The input data of interface controller is sampled respectively using each group of sampling clock of N group sampling clock, is obtained
To N group sampled data, each group of sampled data has M sampled value；
According to the phase difference between two groups of sampling clocks any in N group sampling clock, N*M of N group sampled data are adopted
Sample value carries out sequence before and after phase, obtains sampled data set.
In the embodiment of the present application, it is assumed that sampling clock is N group, and N is the integer greater than 1, the sampling of each group of sampling clock
Point quantity is M, and M is the integer greater than 0, and sampled point is a clock of Presetting phase, and N group sampling clock is respectively adopted
Each group of sampling clock samples the input data of interface controller, and what is obtained after the sampling of one group of sampling clock is M and adopts
Sample value, the N*M sampled value that N group sampling clock obtains, and due to all having phase difference between any two groups of sampling clocks, that
The phase of this corresponding sampled point of N*M sampled value is all different, according between two groups of sampling clocks any in N group sampling clock
Phase difference, sequence before and after phase is carried out to N*M sampled value of N group sampled data, obtains sampled data set.For example, sampling
Clock is 2 groups, and every group has 2 sampled points, as shown in figure 5, the sampled point of the 1st group of sampling clock is a and b, the 2nd group of sampling clock
Sampled point be c and d, the phase difference of the 1st group of sampling clock and the 2nd group of sampling clock is x, and the sampled value of a point is adopting for 1, b point
It is the sampled value of 1, d point is 0 that sample value, which is the sampled value of 0, c point, according to the phase of the 1st group of sampling clock and the 2nd group of sampling clock
Poor x carries out front and back sequence according to phase to the sampled values of a, b, c and d this 4 sampled points, obtained sampled data set be (1,1,
0,0), corresponding sampling dot sequency is (a, c, b, d).
It should be noted that it is shown in fig. 5 to be sampled using 2 groups of sampling clocks, in practical applications, it can also adopt
With sampling clock more than two.When input data is periodical, a cycle can be divided into Y phase, it is primary same
When use dephased Y group clock sampling data, the rhythmic data edge this makes it possible to disposably obtain.
Optionally, in some embodiments of the present application, the data edge of input data is determined according to sampled data set, is wrapped
It includes:
Whether compare sampled data concentrates any two adjacent sample values identical；
If two adjacent sample values are identical, it is determined that be not the data edge of input data；
If two adjacent sample values are not identical, it is determined that be the data edge of input data.
In the embodiment of the present application, as shown in connection with fig. 5, after obtaining sampled data set (1,1,0,0), compare sampled data
Concentrate any two adjacent sample values whether identical, for example, the 1st sampled value and the 2nd sampled value are all 1, then it is determined that not
It is the data edge of input data；2nd sampled value and the 3rd sampled value difference, then it is determined that when input data data side
Edge；3rd sampled value and the 4th sampled value are all 0, and determination is not the data edge of input data.
Optionally, in some embodiments of the present application, optimum sampling phase window is determined according to data edge, comprising:
According to corresponding two adjacent sample values of data edge, corresponding two sampled points of two adjacent sample values are determined；
According to the phase value of two sampled points, destination sample phase window is determined.
In the embodiment of the present application, according to the data edge of the input data determined in above embodiments, corresponding 2nd is adopted
Sample value and the 3rd sampled value, can determine the 2nd sampled value and corresponding two sampled points of the 3rd sampled value are b and c, due to
The phase value of 1st group of sampling clock and the sampled point in the 2nd group of sampling clock be all it is determining, then the phase of sampled point b and c
Value is it is known that may thereby determine that destination sample phase window is exactly the phase window between sampled point b and sampled point c, due to this
Destination sample phase window is the data edge of input data, then destination sample phase window is optimal sampling phase window
Mouthful.
Optionally, in some embodiments of the present application, using at least two groups sampling clock to the input number of interface controller
According to before being sampled, further includes:
Generate at least two groups sampling clock, there is between any two groups of sampling clocks phase difference, every group using clock when
Clock quantity is identical.
In the embodiment of the present application, above embodiments for sampling sampling clock be generated by data detection device, and
And the sampling clock at least two groups generated, there is phase difference, and every group of sampling clock is adopted between any two groups of sampling clocks
Sampling point quantity is identical.
Optionally, in some embodiments of the present application, the phase difference having between any two groups of sampling clocks is stationary phase
Potential difference.
In the embodiment of the present application, in order to avoid sampled point when different groups of sampling clock being used to be sampled is overlapped
The phenomenon that, it is assumed that phase difference between the 1st group of sampling clock and the 2nd group of sampling clock is 45 °, the 2nd group of sampling clock and the 3rd group
Phase difference between sampling clock is 135 °, then when phase difference between the 1st group of sampling clock and the 3rd group of sampling clock
180 °, it will cause the phenomenon that sampled point of the 1st group of sampling clock and the 3rd group of sampling clock is overlapped in this way, when any two groups of samplings
Phase difference between clock is traditionally arranged to be fixed value, and the data edge for determining input data is advantageous.
Data detection method is illustrated in above-described embodiment, data detection device is carried out below by embodiment
Explanation.
Referring to Fig. 6, the embodiment of the present application provides a kind of data detection device, applied to the peripheral interface system of chip,
The peripheral interface system of chip includes interface controller and external equipment, and data detection device includes:
Data acquisition module 601 uses at least two groups sampling clock pair when for reading the data of external equipment when chip
The input data of interface controller is sampled, and sampled data set is obtained, at least two groups sampling clock when any two groups of samplings
There is phase difference, the sampled point quantity of each group of sampling clock is identical between clock；
Data processing module 602, for determining the data edge of input data according to sampled data set；
Data processing module 602 is also used to determine destination sample phase window according to data edge.
It include interface controller and external equipment, external equipment in the peripheral interface system of chip in the embodiment of the present application
Including SD card, eMMC and SDIO card etc., interface controller is used to control multiple Peripheral Interfaces in chip structure, Peripheral Interface
Including SDIO interface and eMMC interface etc., the data and instruction between chip and external equipment, which interacts, to be required to pass through Interface Controller
Device is realized, when chip reads the data of external equipment, in order to guarantee the correctness of the data read, is needed in Interface Controller
The data of the input terminal of device carry out sampling judgement, and the determination of optimal sampling phase window just needs to pass through data detection device
It realizes, data acquisition module 601 is sampled using input data of at least two groups sampling clock to interface controller, obtain
Sampled data set, due to being that tool is dephased between two groups of sampling clocks any at least two groups sampling clock, then necessarily
The data jump point of input data can be sampled, after data processing module 602 carries out data analysis to sampled data set, energy
The data edge for determining input data, in the case where given data edge, data acquisition module 602 is according to data edge energy
Determine that destination sample phase window, destination sample phase window are exactly optimal sampling phase window.With existing Data Detection
Method is compared, and is had dephased sampling clock using at least two groups and is sampled to input data, it is ensured that one surely detects
The data edge of input data may thereby determine that optimal sampling phase window.
Optionally, in some embodiments of the present application, sampling clock is N group, and N is integer greater than 1, when each group of sampling
The sampled point quantity of clock is M, and M is the integer greater than 0,
Data acquisition module 602 is also used for each group of sampling clock of N group sampling clock respectively to interface controller
Input data sampled, obtain N group sampled data, each group of sampled data has M sampled value；
Data acquisition module 602 is also used to according to the phase difference between two groups of sampling clocks any in N group sampling clock,
N*M sampled value of N group sampled data sort before and after phase, sampled data set is obtained.
In the embodiment of the present application, it is assumed that sampling clock is N group, and N is the integer greater than 1, the sampling of each group of sampling clock
Point quantity is M, and M is the integer greater than 0, and sampled point is a clock of Presetting phase, and data acquisition module 602 is adopted respectively
The input data of interface controller is sampled with each group of sampling clock of N group sampling clock, one group of sampling clock sampling
What is obtained afterwards is M sampled value, the N*M sampled value that N group sampling clock obtains, and due between any two groups of sampling clocks
All there is phase difference, then the phase of this corresponding sampled point of N*M sampled value is all different, according to any in N group sampling clock
Phase difference between two groups of sampling clocks sort before and after phase to N*M sampled value of N group sampled data, be sampled
Data set.
Optionally, in some embodiments of the present application,
Whether data processing module 602 is also used to compare sampled data and concentrates any two adjacent sample values identical；
Data processing module 602, if it is identical to be also used to two adjacent sample values, it is determined that be not the data side of input data
Edge；
Data processing module 602, if it is not identical to be also used to two adjacent sample values, it is determined that be the data side of input data
Edge.
In the embodiment of the present application, the detection for the data edge of input data is by judging that sampled data set obtains
, specifically, data processing module 602, which compares sampled data, concentrates any two adjacent sample values, if sampled data is concentrated
Including 4 sampled values, the 1st sampled value is 1, and the 2nd sampled value is 1, and the 3rd sampled value is 1, and the 4th sampled value is 0, than
Compared with the 1st sampled value and the 2nd sampled value the two adjacent sample values, since sampled value is all 1, then it is determined that not being input number
According to data edge；Compare the 2nd sampled value and the 3rd sampled value the two adjacent sample values, since sampled value is all 1, really
Fixed is not the data edge of input data；Compare the 3rd sampled value and the 4th sampled value the two adjacent sample values, the 3rd is adopted
Sample value is 1, and the 4th sampled value is 0, then it is determined that being the data edge of input data.
Optionally, in some embodiments of the present application,
Data processing module 602, is also used to according to corresponding two adjacent sample values of data edge, determines that two adjacent are adopted
Corresponding two sampled points of sample value；
Data processing module 602, is also used to the phase value according to two sampled points, and destination sample phase window is arrived in calculating
Mouthful.
In the embodiment of the present application, after data processing module 602 has determined the data edge of input data, data processing
Module 602 can determine corresponding two by the two adjacent sample values according to corresponding two adjacent sample values of data edge
Sampled point, it is known that in every group of sampling clock in the case where the phase value of all sampled points, the phase value of the two sampled points can also
To know, it is known that the phase value of the two sampled points just can determine that destination sample phase window, due to the destination sample phase
Window is the data edge of input data, then destination sample phase window is optimal sampling phase window.
Optionally, as shown in fig. 7, in some embodiments of the present application, data detection device further include:
Clock generating module 701 has phase between any two groups of sampling clocks for generating at least two groups sampling clock
Difference, every group identical using the clock quantity of clock.
In the embodiment of the present application, the above sampling clock for sampling has the generation of clock generating module 701, Er Qiesheng
At sampling clock at least two groups, there is between any two groups of sampling clocks phase difference, and the sampled point of every group of sampling clock
Quantity is identical.It should be noted that clock generating module 701 can be clock generator in the specific implementation, either
The clock forming circuit of clock signal can be produced.
Optionally, as shown in fig. 7, in some embodiments of the present application, the phase that has between any two groups of sampling clocks
Difference is fixed skew.
In the embodiment of the present application, in order to avoid sampled point when different groups of sampling clock being used to be sampled is overlapped
The phenomenon that, it is assumed that phase difference between the 1st group of sampling clock and the 2nd group of sampling clock is 45 °, the 2nd group of sampling clock and the 3rd group
Phase difference between sampling clock is 135 °, then when phase difference between the 1st group of sampling clock and the 3rd group of sampling clock
180 °, it will cause the phenomenon that sampled point of the 1st group of sampling clock and the 3rd group of sampling clock is overlapped, clock generating module 701 in this way
Phase difference in at least two groups sampling clock of generation between any two groups of sampling clocks is traditionally arranged to be fixed value, for determination
The data edge of input data is advantageous.
Present invention also provides a kind of computer readable storage medium, instruction is stored in computer readable storage medium,
When run on a computer, so that computer executes data detection method described in above embodiments.
Present invention also provides a kind of computer program products comprising instruction, when run on a computer, so that
Computer executes data detection method described in above embodiments.
In the above-described embodiments, can come wholly or partly by software, hardware, firmware or any combination thereof real
It is existing.When implemented in software, it can entirely or partly realize in the form of a computer program product.
The computer program product includes one or more computer instructions.Load and execute on computers the meter
When calculation machine program instruction, entirely or partly generate according to process or function described in the embodiment of the present application.The computer can
To be general purpose computer, special purpose computer, computer network or other programmable devices.The computer instruction can be deposited
Storage in a computer-readable storage medium, or from a computer readable storage medium to another computer readable storage medium
Transmission, for example, the computer instruction can pass through wired (example from a web-site, computer, server or data center
Such as coaxial cable, optical fiber, Digital Subscriber Line (DSL)) or wireless (such as infrared, wireless, microwave) mode to another website
Website, computer, server or data center are transmitted.The computer readable storage medium can be computer and can deposit
Any usable medium of storage either includes that the data storages such as one or more usable mediums integrated server, data center are set
It is standby.The usable medium can be magnetic medium, (for example, floppy disk, hard disk, tape), optical medium (for example, DVD) or partly lead
Body medium (such as solid state hard disk Solid State Disk (SSD)) etc..
It should be understood that magnitude of the sequence numbers of the above procedures are not meant to execute suitable in the various embodiments of the application
Sequence it is successive, the execution of each process sequence should be determined by its function and internal logic, the implementation without coping with the embodiment of the present application
Process constitutes any restriction.
The above, above embodiments are only to illustrate the technical solution of the application, rather than its limitations；Although referring to before
Embodiment is stated the application is described in detail, those skilled in the art should understand that: it still can be to preceding
Technical solution documented by each embodiment is stated to modify or equivalent replacement of some of the technical features；And these
It modifies or replaces, the range of each embodiment technical solution of the application that it does not separate the essence of the corresponding technical solution.
Claims (14)
1. a kind of data detection method, which is characterized in that applied to the peripheral interface system of chip, the peripheral interface of the chip
System includes interface controller and external equipment, and the data detection method includes:
When the chip reads the data of the external equipment, using at least two groups sampling clock to the interface controller
Input data is sampled, and obtains sampled data set, has between any two groups of sampling clocks in at least two groups sampling clock
There is phase difference；
The data edge of the input data is determined according to the sampled data set；
Destination sample phase window is determined according to the data edge.
2. the method according to claim 1, wherein sampling clock is N group, N is integer greater than 1, each group
The sampled point quantity of sampling clock is M, and M is the integer greater than 0,
It is described to be sampled using input data of at least two groups sampling clock to the interface controller, obtain sampled data
Collection, comprising:
The input data of the interface controller is sampled respectively using each group of sampling clock of N group sampling clock, is obtained
To N group sampled data, each group of sampled data has M sampled value；
According to the phase difference between two groups of sampling clocks any in the N group sampling clock, to the N*M of the N group sampled data
A sampled value carries out sequence before and after phase, obtains sampled data set.
3. according to the method described in claim 2, it is characterized in that, described determine the input number according to the sampled data set
According to data edge, comprising:
Whether compare the sampled data concentrates any two adjacent sample values identical；
If two adjacent sample values are identical, it is determined that be not the data edge of the input data；
If two adjacent sample values are not identical, it is determined that be the data edge of the input data.
4. according to the method described in claim 3, it is characterized in that, described determine optimum sampling phase according to the data edge
Window, comprising:
According to corresponding two adjacent sample values of the data edge, corresponding two samplings of described two adjacent sample values are determined
Point；
According to the phase value of described two sampled points, destination sample phase window is determined.
5. method according to claim 1 to 4, which is characterized in that described to use at least two groups sampling clock
Before being sampled to the input data of the interface controller, further includes:
At least two groups sampling clock is generated, there is phase difference, every group of sampled point using clock between any two groups of sampling clocks
Quantity is identical.
6. according to the method described in claim 5, it is characterized in that, the phase difference having between any two groups of sampling clocks
For fixed skew.
7. a kind of data detection device, which is characterized in that applied to the peripheral interface system of chip, the peripheral interface of the chip
System includes interface controller and external equipment, and the data detection device includes:
Data acquisition module uses at least two groups sampling clock when for reading the data of the external equipment when the chip
The input data of the interface controller is sampled, obtains sampled data set, it is any in at least two groups sampling clock
There is phase difference, the sampled point quantity of each group of sampling clock is identical between two groups of sampling clocks；
Data processing module, for determining the data edge of the input data according to the sampled data set；
The data processing module is also used to determine destination sample phase window according to the data edge.
8. device according to claim 7, which is characterized in that sampling clock is N group, and N is integer greater than 1, each group
The sampled point quantity of sampling clock is M, and M is the integer greater than 0,
The data acquisition module is also used for each group of sampling clock of N group sampling clock respectively to the Interface Controller
The input data of device is sampled, and N group sampled data is obtained, and each group of sampled data has M sampled value；
The data acquisition module is also used to according to the phase difference between two groups of sampling clocks any in the N group sampling clock,
N*M sampled value of the N group sampled data sort before and after phase, sampled data set is obtained.
9. device according to claim 8, which is characterized in that
Whether the data processing module is also used to sampled data described in comparison and concentrates any two adjacent sample values identical；
The data processing module, if it is identical to be also used to two adjacent sample values, it is determined that be not the data of the input data
Edge；
The data processing module, if it is not identical to be also used to two adjacent sample values, it is determined that be the data of the input data
Edge.
10. device according to claim 9, which is characterized in that
The data processing module is also used to be determined described two according to corresponding two adjacent sample values of the data edge
Corresponding two sampled points of adjacent sample values；
The data processing module is also used to the phase value according to described two sampled points, determines destination sample phase window.
11. device according to any one of claims 7 to 10, which is characterized in that the data detection device further include:
Clock generating module has a phase difference for generating at least two groups sampling clock between any two groups of sampling clocks, and every group
It is identical using the sampled point quantity of clock.
12. device according to claim 11, which is characterized in that the phase having between any two groups of sampling clocks
Difference is fixed skew.
13. a kind of computer readable storage medium, including instruction, when run on a computer, so that computer executes such as
Method described in claim 1 to 6 any one.
14. a kind of computer program product comprising instruction, when run on a computer, so that computer executes such as right
It is required that method described in 1 to 6 any one.
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