CN108922485A - Gate drive circuit structure, display panel and drive method of gate drive circuit structure - Google Patents
Gate drive circuit structure, display panel and drive method of gate drive circuit structure Download PDFInfo
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- CN108922485A CN108922485A CN201810785645.9A CN201810785645A CN108922485A CN 108922485 A CN108922485 A CN 108922485A CN 201810785645 A CN201810785645 A CN 201810785645A CN 108922485 A CN108922485 A CN 108922485A
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 230000008878 coupling Effects 0.000 claims description 90
- 238000010168 coupling process Methods 0.000 claims description 90
- 238000005859 coupling reaction Methods 0.000 claims description 90
- 238000012423 maintenance Methods 0.000 claims description 11
- 230000005540 biological transmission Effects 0.000 claims description 7
- 230000005611 electricity Effects 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 10
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 238000006073 displacement reaction Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 230000003139 buffering effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
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- 230000001419 dependent effect Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
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- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The invention discloses a grid driving circuit structure, a display panel and a driving method of the grid driving circuit structure, which are used for the display panel of the array substrate type driving technology.A sub pull-down circuit is additionally arranged in a shift register, and is electrically coupled with a grid line and comprises a first switch, a second switch and a third switch, wherein the control end of the first switch can be electrically coupled with the clock signal of the front stage and the clock signal of the rear stage, the control end of the second switch is electrically coupled with a working point voltage signal, the first end of the second switch is electrically coupled with the second end of the first switch, the control end of the third switch is electrically coupled with the second end of the second switch, the first end of the third switch is electrically coupled with a grid scanning signal, and the second end of the third switch is electrically coupled with a low preset potential. Therefore, the sub pull-down circuit can effectively pull down the grid scanning signal, reduce the error-proof charging time and increase the charging time.
Description
Technical field
The present invention relates to the grid electrode drive circuit structures and grid in a kind of display panel more particularly to a kind of display panel
The driving method of pole driving circuit structure.
Background technique
To save cost, as array substrate type actuation techniques have been widely used in the display panel industry of liquid crystal display panel
(Gate Driver on Array；GOA).The technology of liquid crystal display panel need to be dependent on source driving chip (Source IC) and
Grid drive chip (Gate IC) is driven, the former controls voltage to transmit signal, and the latter is come with transistor as switch
Control and decision light transmission capacity.
Array substrate type actuation techniques are exactly to give up grid drive chip, instead by grid electrode drive circuit structure
Directly manufacture on the glass substrate of liquid crystal display panel, due to grid electrode drive circuit structure be in the way of exposure development,
Glass substrate edge generates logic circuit, so all can thereby reach reduces cost either on material or manufacturing process
Effect, and can also achieve the effect that reduce liquid crystal display frame.
The principle of array substrate type actuation techniques is developed from thompson (Thompson) circuit base, is
Ask driving effect smooth, it will usually preliminary filling is carried out at operating point (Quiescent point), it is quasi- with the voltage for reaching higher level
Position, so that subsequent can be coupled into ideal signal mode with clock signal, thereby, when the switch of transistor is opened, grid line
Grid grade scanning signal needed for road is smoothly transmitted.
In addition, having one at the end of signal for the charging time of pixel cell charging in liquid crystal display panel
Section mistake proofing fills the time (gate Tf) to drag down the voltage quasi position of high level, and it is the smaller the better that this section of mistake proofing, which fills the time then,.
Therefore, how when dragging down grid grade scanning signal, mistake proofing can be reduced to the greatest extent and fill the time, when using increase charging
Between, it has also become one of the problem of those skilled in the art are to be solved.
Summary of the invention
The present invention proposes the driving side of a kind of grid electrode drive circuit structure, display panel and grid electrode drive circuit structure
Method can effectively drag down grid grade scanning signal, reduce mistake proofing and fill the time, and then can increase the charging time.
One embodiment of the invention proposes a kind of grid electrode drive circuit structure, is used for array substrate type actuation techniques (Gate
Driver on Array；GOA display panel).The grid electrode drive circuit structure includes multiple cascade displacements such as n
Buffer (shift register).
The n cascade shift registors, n are the positive integer greater than 2.Wherein, it is chatted for n-th of shift registor
It states, the shift registor includes shift scratch circuit and sub- pull-down circuit.
The shift scratch circuit receives such as (n-1)th grade of previous stage of grid grade signal, to transmit this by gate lines
The grid grade scanning signal Gn of grade, wherein the operating point of the shift scratch circuit has the quiescent potential signal Qn of this level-one.
The sub- pull-down circuit is electrically coupled to gate lines, including first switch, second switch and third switch.
The clock signal CKn-2 of second level and the clock signal of rear stage before the control terminal electric property coupling of the first switch
One of signal in CKn+1, the first end electric property coupling clock signal CKn-2 and clock signal of the first switch
Another signal in CKn+1.
Quiescent potential signal Qn, the first end of the second switch described in the control terminal electric property coupling of the second switch
The second end of first switch described in electric property coupling.
The second end of second switch described in the control terminal electric property coupling of the third switch, the first end of the third switch
Grid grade scanning signal Gn described in electric property coupling, the low preset potential Vss of second end electric property coupling of the third switch.
It further illustrates, in one embodiment, the control terminal of the first switch can be electric property coupling clock signal
CKn-2, the first end of the first switch can be electric property coupling clock signal CKn+1.
In the aforementioned embodiment, the shift scratch circuit can also further comprise input module, output module and anti-
Present module.
The input module is used to receive (n-1)th grade of grid grade signal, and according to (n-1)th grade of grid grade signal, generates institute
State the quiescent potential of shift scratch circuit.
The output module be used to receive the quiescent potential of shift scratch circuit described in clock signal CKn and preliminary filling at
For pre-charging potential, and pre-charging potential coupling is become by the quiescent potential signal Qn according to the clock signal CKn, and
According to the quiescent potential signal Qn and clock signal CKn output gated sweep signal Gn after coupling.
The feedback module is used to receive feedback signal, and according to the feedback signal that the gated sweep signal Gn is electric
Position is pulled low to low preset potential.
Further, the shift scratch circuit can also further include control module and drop-down maintenance module.
Low preset potential described in the control module electric property coupling.Mould is controlled described in the drop-down maintenance module electric property coupling
Block and the low preset potential, being controlled by the control module makes the quiescent potential of the shift scratch circuit be maintained low
Preset potential.
Supplementary explanation, grid electrode drive circuit structure as the aforementioned, the first switch can be the first transistor, described
Second switch can be second transistor, and the third switch can be third transistor.
Another embodiment of the present invention proposes the shift registor in a kind of display panel and display panel, shift register
Device is used for the display panel of array substrate type actuation techniques, and the display panel has n cascade shift registors, and n is big
In 2 positive integer.
The shift scratch circuit of n-th of shift registor is used to receive (n-1)th grade of grid grade signal, to pass through grid
Route transmits grid grade scanning signal Gn.Wherein, the shift scratch circuit has quiescent potential signal Qn.The shift register
Device includes shift scratch circuit and sub- pull-down circuit.
The sub- pull-down circuit of n-th of shift registor is electrically coupled to gate lines, including first switch, second opens
It closes and third switchs.
The control terminal electric property coupling clock signal CKn-2 of the first switch, the first end electrical property coupling of the first switch
Meet clock signal CKn+1.
Quiescent potential signal Qn, the first end of the second switch described in the control terminal electric property coupling of the second switch
The second end of first switch described in electric property coupling.
The second end of second switch described in the control terminal electric property coupling of the third switch, the first end of the third switch
Grid grade scanning signal Gn described in electric property coupling, the low preset potential Vss of second end electric property coupling of the third switch.
In the present embodiment, the shift scratch circuit can also further comprise input module, output module and feedback mould
Block.
The input module is used to receive (n-1)th grade of grid grade signal, and according to (n-1)th grade of grid grade signal, generates institute
State the quiescent potential of shift scratch circuit.
The output module be used to receive the quiescent potential of shift scratch circuit described in clock signal CKn and preliminary filling at
For pre-charging potential, and pre-charging potential coupling is become by the quiescent potential signal Qn according to the clock signal CKn, and
According to the quiescent potential signal Qn and clock signal CKn output gated sweep signal Gn after coupling.
The feedback module is used to receive feedback signal, and according to the feedback signal that the gated sweep signal Gn is electric
Position is pulled low to low preset potential.
Further, shift registor as the aforementioned, the shift scratch circuit can also further comprise control module and under
Draw maintenance module.
Low preset potential described in the control module electric property coupling.Mould is controlled described in the drop-down maintenance module electric property coupling
Block and the low preset potential, being controlled by the control module makes the quiescent potential of the shift scratch circuit be maintained low
Preset potential.
In addition, another embodiment of the present invention proposes that a kind of driving method of grid electrode drive circuit structure, the grid drive
Dynamic circuit structure is used for the display panel of array substrate type actuation techniques, and the grid electrode drive circuit structure has n a cascade
Shift registor, n are the positive integer greater than 2.The driving method includes the following steps：
N-th of shift registor receives (n-1)th grade of grid grade signal, to transmit grid grade scanning letter by gate lines
Number Gn, the shift registor have quiescent potential signal Qn, wherein the sub- pull-down circuit of gate lines electric property coupling, the son
Pull-down circuit includes first switch, second switch and third switch；
Transmission clock signal CKn+1 gives the first end of the first switch；
Transmission clock signal CKn-2 gives the control terminal of the first switch, wherein the first end of the second switch is electrical
Couple the second end of the first switch；
The control terminal that the quiescent potential signal Qn gives the second switch is transmitted, wherein the control of third switch
Hold the second end of second switch described in electric property coupling；And
The first end that the grid grade scanning signal Gn gives the third switch is transmitted, the second end of the third switch is electrical
Low preset potential Vss is coupled, wherein the low preset potential Vss can drag down grid grade scanning signal Gn.
Driving method as the aforementioned receives (n-1)th grade of grid grade signal, for n-th of shift registor to pass through
Gate lines transmit grid grade scanning signal Gn, wherein the shift registor has quiescent potential signal Qn.About above-mentioned
Step, the driving method can also further comprise the following steps：
(n-1)th grade of grid grade signal is received, and according to (n-1)th grade of grid grade signal, generates the work of the shift registor
Make point voltage；
The quiescent potential of the shift registor is set to be maintained low preset potential；
Quiescent potential for receiving shift registor described in clock signal CKn and preliminary filling becomes pre-charging potential, and
Pre-charging potential coupling is become into the quiescent potential signal Qn according to the clock signal CKn；
According to the quiescent potential signal Qn and the clock signal CKn output gated sweep signal Gn after coupling；
And
Feedback signal is received, and the gated sweep signal Gn current potential is pulled low to by low default electricity according to the feedback signal
Position.
The drive of a kind of grid electrode drive circuit structure, display panel and grid electrode drive circuit structure of the embodiment of the present invention
Dynamic method can effectively drag down grid grade scanning signal using the sub- pull-down circuit newly established, and reduce mistake proofing and fill the time, in turn
It can increase the charging time.
The above description is only an overview of the technical scheme of the present invention, in order to better understand the technical means of the present invention,
And it can be implemented in accordance with the contents of the specification, and in order to which above and other purpose of the invention, feature can be become apparent from
It is understandable, it is special below to lift specific embodiment, and cooperate attached drawing, detailed description are as follows.
Detailed description of the invention
Included attached drawing is used to provide that a further understanding of the embodiments of the present application, and which constitute one of specification
Point, for illustrating presently filed embodiment, and with verbal description come together to illustrate the principle of the application.Under it should be evident that
Attached drawing in the description of face is only some embodiments of the present application, for those of ordinary skill in the art, is not paying wound
Under the premise of the property made is laborious, it is also possible to obtain other drawings based on these drawings.In the accompanying drawings：
Fig. 1 is the schematic diagram the invention shows panel and grid electrode drive circuit structure.
Fig. 2A is the function association figure of shift registor of the present invention.
Fig. 2 B is the schematic diagram of shift registor embodiment of the present invention.
Fig. 3 is the schematic diagram of the sub- pull-down circuit of the present invention.
Fig. 4 is the waveform diagram of the level of the various signals of the present invention.
Fig. 5 is the flow chart of sub- the carried out driving method of pull-down circuit of the present invention.
Fig. 6 is the flow chart of the carried out driving method of shift registor of the present invention.
Specific embodiment
Specific structure and function details disclosed herein are only representative, and are for describing the present invention show
The purpose of example property embodiment.But the present invention can be implemented by many alternative forms, and be not interpreted as
It is limited only by the embodiments set forth herein.
In the description of the present invention, it is to be understood that, term " center ", " transverse direction ", "upper", "lower", "left", "right",
It is orientation based on the figure or position that the orientation of the instructions such as "vertical", "horizontal", "top", "bottom", "inner", "outside" or position, which are closed,
Relationship is set, is merely for convenience of description of the present invention and simplification of the description, rather than the device or component of indication or suggestion meaning are necessary
It with specific orientation, is constructed and operated in a specific orientation, therefore is not considered as limiting the invention.In addition, term
" first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicate meaning
The quantity of the technical characteristic shown.Define " first " as a result, the feature of " second " can explicitly or implicitly include one or
More this feature of person.In the description of the present invention, unless otherwise indicated, the meaning of " plurality " is two or more.Separately
Outside, term " includes " and its any deformation, it is intended that cover and non-exclusive include.
In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected；It can
To be mechanical connection, it is also possible to be electrically connected；It can be directly connected, can also can be indirectly connected through an intermediary
The connection of two component internals.For the ordinary skill in the art, above-mentioned term can be understood at this with concrete condition
Concrete meaning in invention.
Term used herein above is not intended to limit exemplary embodiment just for the sake of description specific embodiment.Unless
Context clearly refers else, otherwise singular used herein above "one", " one " also attempt to include plural number.Also answer
When understanding, term " includes " and/or "comprising" used herein above provide stated feature, integer, step, operation,
The presence of unit and/or component, and do not preclude the presence or addition of other one or more features, integer, step, operation, unit,
Component and/or combination thereof.
Fig. 1 is please referred to, Fig. 1 is that the invention shows the schematic diagrames of panel 10 and grid electrode drive circuit structure 20.Of the invention
One embodiment proposes a kind of grid electrode drive circuit structure 20, for the display panel of array substrate type actuation techniques, the grid
Driving circuit structure 20 includes multiple such as n cascade shift registors 30, and n is the positive integer greater than 2.
Display panel 10 still has source driving chip 12 in figure, but array substrate type actuation techniques have given up gate driving
Chip, instead as grid electrode drive circuit structure 20 is set up directly on glass substrate by figure.And gate driving circuit
In structure 20, actually multiple shift registors 30, each shift registor 30 can receive the grid grade signal of prime, to pass through
The grid grade scanning signal Gn of this level-one of the transmission of gate lines 32.
A and Fig. 2 B referring to figure 2., Fig. 2A are the function association figures of shift registor 30 of the present invention.Fig. 2 B is the present invention
The schematic diagram of 30 embodiment of shift registor.Illustrate in the present embodiment for n-th of shift registor 30, wherein n-th of shifting
Position buffer 30 includes shift scratch circuit 3002 and sub- pull-down circuit 3004.
N-th of shift scratch circuit 3002 is used for after receiving such as (n-1)th grade of previous stage of grid grade signal Fn-1
Gated sweep signal Gn is generated to nth gate lines 32.Wherein, the operating point tool in 3002 circuit of shift scratch circuit
There is quiescent potential, after preliminary filling and then waveform more preferably quiescent potential signal Qn can be coupled into.The shift register electricity
Road 3002 further comprises input module 50, output module 52, feedback module 54, control module 56 and drop-down maintenance module
58。
Input module 50 is used to receive (n-1)th grade of grid grade signal Fn-1, and according to (n-1)th grade of grid grade signal Fn-1,
Generate the quiescent potential of the shift scratch circuit 3002.
Output module 52 is for receiving shift scratch circuit 3002 described in the clock signal CKn and preliminary filling of this level-one
Quiescent potential becomes pre-charging potential, and pre-charging potential coupling is become the operating point according to the clock signal CKn
Voltage signal Qn, and according to the quiescent potential signal Qn and clock signal CKn output gated sweep signal Gn after coupling.
Feedback module 54 is used to receive the feedback signal Gn+ from rear class shift registor 30, and according to the feedback letter
The quiescent potential signal Qn or the gated sweep signal Gn current potential are pulled low to low preset potential Vss by number Gn+.It is described anti-
The gated sweep signal Gn+ that feedback signal Gn+ implies that as rear pole, using the generation of the gated sweep signal Gn+ of hereafter pole, to turn off
This time gated sweep signal Gn.
It remarks additionally, low preset potential Vss described in 56 electric property coupling of control module, and dimension is pulled down described in electric property coupling
Hold module 58.
Low preset potential described in 58 electric property coupling of maintenance module is pulled down, is controlled by the control module 56, makes the displacement
The quiescent potential of buffering circuit 3002 is maintained low preset potential, uses the noise of removal operating point.
Sub- pull-down circuit 3004 is electrically coupled to gate lines 32, can at the end of gated sweep signal Gn, effectively and
Gated sweep signal G3 quickly is dragged down to low preset potential Vss, be can be reduced mistake proofing and is filled the time, and then can increase the charging time.
Further illustrated with the embodiment of Fig. 2 B, if figure is the embodiment of a 4CK clock signal.In order to the 3rd article
Gate lines 32 generate gated sweep signal G3, and input module 50 has a transistor switch, receives the grid grade signal of prime
After F2, quiescent potential needed for generating the shift scratch circuit 3002 to the operating point of shift scratch circuit 3002.
Output module 52 includes two transistor switches, and the control terminal of left side transistor switch can shift temporarily described in first preliminary filling
The quiescent potential for depositing circuit 3002 becomes pre-charging potential, and is coupled into the pre-charging potential according to the clock signal CK3
For the quiescent potential signal Q3, the first end of this transistor switch receives clock signal CK3, and the second of this transistor switch
End then generates grid grade signal F3 required for the shift registor 30 of starting rear class and the gate lines 32 of rear class.
The control terminal of the right transistor switch receives the quiescent potential signal Q3, the control terminal root of this transistor switch
According to institute art quiescent potential signal Q3, the clock signal CK3 is received with the first end of this transistor switch, with from second end pair
Gate lines 32 export gated sweep signal G3.
Feedback module 54 also includes two transistor switches, and the control terminal of two transistor switches all couples the grid of rear class
Scanning signal G7, this gated sweep signal G7 be for as feedback signal, purpose come power cut-off point voltage signal Q3 or
Gated sweep signal G3.The second end of two transistor switches all couples low preset potential Vss, when this two transistor switches are received
To after the gated sweep signal G7 of the rear class, according to this feedback signal G7, respectively by quiescent potential signal Q3 and described
The current potential of gated sweep signal G3 is pulled low to low preset potential Vss, therefore makes 32 end signal of gate lines.
It remarks additionally, low preset potential Vss described in 56 electric property coupling of control module, and dimension is pulled down described in electric property coupling
Hold module 58.Low preset potential described in 58 electric property coupling of maintenance module is pulled down, is made the displacement by the control module 56 control
The quiescent potential of buffering circuit 3002 is maintained low preset potential, to remove the noise of operating point.
Sub- pull-down circuit 3004 is electrically coupled to gate lines 32, can have at the end of gated sweep signal G3 is predetermined
It imitates and quickly drags down gated sweep signal G3 to low preset potential Vss, when can be reduced mistake proofing and fill the time, and then can increase charging
Between.
Further referring to figure 3., Fig. 3 is the schematic diagram of the sub- pull-down circuit 3004 of the present invention.Sub- pull-down circuit 3004 is electrically
It is coupled to gate lines 32, including first switch 40, second switch 42 and third switch 44.
The control terminal 40G of the first switch 40 can be with the clock signal CKn-2 and rear stage of second level before electric property coupling
Clock signal CKn+1 in one of signal, the first end 40D of the first switch 40 can be with electric property coupling clock signal
Another signal in CKn-2 and clock signal CKn+1.
Legend still illustrates with the embodiment of aforementioned 4CK clock signal, the control terminal of first switch 40 described in diagram
40G electric property coupling clock signal CK1, the first end 40D electric property coupling clock signal CK4 of the first switch 40.When clock is believed
Number CK1, which comes control terminal 40G, can then open first switch 40, the pulldown signal of clock signal CK1 and clock signal CK4 intersection
PG3 will be sent to the second end 40S of first switch 40.
Quiescent potential signal Qn, the second switch 42 described in the control terminal 42G electric property coupling of the second switch 42
First end 42D electric property coupling described in first switch 40 second end 40S.
In legend, after the control terminal 42G of second switch 42 receives quiescent potential signal Q3, second switch 42 will
It is opened, then the signal of 40 second end 40S of first switch, second switch 42 will be sent to from 42 first end 42D of second switch
Second end 42S, thus deliver the pulldown signal PG3 of clock signal CK1 Yu clock signal CK4 intersection.
The second end 42S of second switch 42 described in the control terminal 44G electric property coupling of the third switch 44, the third are opened
Grid grade scanning signal Gn described in 44 first end 44D electric property coupling is closed, the second end 44S electric property coupling of the third switch 44 is low
Preset potential Vss.
In legend, after the 44 control terminal 44G of third switch receives pulldown signal PG3, third switch 44 can be opened.Cause
For grid grade scanning signal G3, the second end of the third switch 44 described in the first end 44D electric property coupling of the third switch 44
The low preset potential Vss of 44S electric property coupling, therefore, when first switch 40 and control terminal 40G, 42G of second switch 42 are all beaten
When opening, clock signal CK1 and pulldown signal PG3 made of clock signal CK4 intersection will open third switch 44, Jin Erke
With effective and quickly drag down gated sweep signal G3 to low preset potential Vss, it can be reduced mistake proofing and fill the time, and then can increase and fill
The electric time.
Supplementary explanation, the first switch 40 are the first transistor, and the second switch 42 is second transistor, institute
Stating third switch 44 is third transistor.
Referring to figure 4. for waveform caused by signal, Fig. 4 is the waveform diagram of the level of the various signals of the present invention.
Each signal has the different level of height, that is, the voltage value of high level can represent effective signal.Diagram remains
Illustrated with the embodiment of 4CK clock signal, clock signal is respectively CK1, CK2, CK3, CK4, and waveform is according to timing respectively as schemed
It is shown.
Quiescent potential signal Q3 is to be coupled into comparatively ideal waveform with clock signal CK3 again after preliminary filling, with
Just it can smoothly draw high to high voltage level, efficient opening transistor switch, and transmit gated sweep signal G3 smoothly
To gate lines 32.Gated sweep signal G7 is intended for feedback signal, quiescent potential signal Q3 is pulled low to low default
Current potential Vss.
In order to be pulled down into gated sweep signal G3 effectively, clock signal CK1 produced by sub- pull-down circuit 3004 and when
The pulldown signal PG3 of clock signal CK4 intersection then can effectively and quickly drag down gated sweep signal G3 to low preset potential
Vss can be reduced mistake proofing and fill the time, and then can increase the charging time.
In addition, according to aforementioned legend, another embodiment of the present invention is proposed in a kind of display panel and display panel
Shift registor 30, shift registor 30 are used for the display panel 10 of array substrate type actuation techniques, and the display panel 10 has
There are n cascade shift registors 30, n is the positive integer greater than 2.The shift registor 30 includes shift scratch circuit
3002 and sub- pull-down circuit 3004.
The shift scratch circuit 3002 of n-th of shift registor 30 is used to receive (n-1)th grade of grid grade signal, with logical
It crosses gate lines 32 and transmits grid grade scanning signal Gn.Wherein, the shift scratch circuit 3002 has quiescent potential signal Qn.
The sub- pull-down circuit 3004 of n-th of shift registor 30 is electrically coupled to gate lines 32, shift registor
30 include first switch 40, second switch 42 and third switch 44.
The control terminal electric property coupling clock signal CKn-2 of the first switch 40, the first end electricity of the first switch 40
Property coupling clock signal CKn+1.
Quiescent potential signal Qn described in the control terminal electric property coupling of the second switch 42, the of the second switch 42
The second end of first switch 40 described in the electric property coupling of one end.
The second end of second switch 42 described in the control terminal electric property coupling of the third switch 44, the third switch 44
Grid grade scanning signal Gn described in first end electric property coupling, the low preset potential Vss of the second end electric property coupling of the third switch 44.
Thereby, the pulldown signal PG3 as caused by first switch 40, second switch 42 and third switch 44, can be effectively by grid grade
Scanning signal Gn is pulled down to low preset potential Vss.
Supplementary explanation, the shift scratch circuit 3002 further comprise input module 50, output module 52, feedback
Module 54, control module 56 and drop-down maintenance module 58.
Input module 50 is used to receive (n-1)th grade of grid grade signal, and according to (n-1)th grade of grid grade signal, described in generation
The quiescent potential of shift scratch circuit 3002.
Output module 52 is used to receive the quiescent potential of shift scratch circuit 3002 described in clock signal CKn and preliminary filling
Pre-charging potential coupling is become into the quiescent potential signal Qn as pre-charging potential, and according to the clock signal CKn,
And according to the quiescent potential signal Qn and clock signal CKn output gated sweep signal Gn after coupling.
Feedback module 54 is for receiving feedback signal, and according to the feedback signal by the gated sweep signal Gn current potential
It is pulled low to low preset potential.
Low preset potential described in 56 electric property coupling of control module.Pull down maintenance module 58, control module described in electric property coupling
56 and the low preset potential, the quiescent potential of the shift scratch circuit 3002 is tieed up by the control module 56 control
It holds as low preset potential.
Thereby, pulldown signal PG3 caused by sub- pull-down circuit 3004, can be in the predetermined end of gated sweep signal Gn
When, effectively and gated sweep signal G3 quickly is dragged down to low preset potential Vss, can be reduced mistake proofing and fill the time, and then can increase
Charging time.
In addition, another embodiment of the present invention proposes a kind of driving method of grid electrode drive circuit structure 20.Please refer to figure
5, Fig. 5 be the flow chart of the carried out driving method of sub- pull-down circuit 3004 of the invention.The grid electrode drive circuit structure 20 is used for
The display panel 10 of array substrate type actuation techniques, the grid electrode drive circuit structure 20 have n cascade shift registors
30, n be the positive integer greater than 2.The driving method includes the following steps：
Step 1 (S01)：N-th of shift registor 30 receives (n-1)th grade of grid grade signal, to pass through gate lines
32 transmission grid grade scanning signal Gn, the shift registor 30 have quiescent potential signal Qn.Wherein, gate lines 32 are electrical
Sub- pull-down circuit 3004 is coupled, the sub- pull-down circuit 3004 includes first switch 40, second switch 42 and third switch
44。
Step 2 (S02)：Clock signal CKn+1 is transmitted in the first end 40D of the first switch 40.
Step 3 (S03)：Judge whether the control terminal 40G of the first switch 40 receives clock signal CKn-2.Its
In, the second end 40S of first switch 40 described in the first end 42D electric property coupling of the second switch 42, if step 3 (S03)
Be it is yes, then clock signal CKn+1 can be transmitted to the second end 40S of the first switch 40 and first end 42D of second switch 42, and
It carries out step 5 (S05).
Step 4 (S04)：The first end 44D that the grid grade scanning signal Gn gives the third switch 44 is transmitted, wherein institute
State the low preset potential Vss of second end 44S electric property coupling of third switch 44.
Step 5 (S05)：Judge whether the control terminal 42G of the second switch 42 receives the quiescent potential signal
Qn.Wherein, the second end 42S of second switch 42 described in the control terminal 44G electric property coupling of the third switch 44, if step 5
(S05) be it is yes, then the pulldown signal of clock signal CKn-2 and clock signal CKn+1 intersection can be transmitted to the of second switch 42
Two end 42S, and matching step four (S04) carries out step 6 (S06).
Step 6 (S06)：At this point, first switch 40 can be switched with pulldown signal caused by second switch 42 by third
44 control terminal 44G opens third switch 44, and therefore, the low preset potential Vss of 44 second end 44S of third switch can drag down
The grid grade scanning signal Gn of three switches, 44 first end 44D reduces mistake proofing and fills the time, and then can increase the charging time.
Fig. 6 is please referred to, Fig. 6 is the flow chart of the carried out driving method of disclosure shift registor 30.Driving as the aforementioned
Method, step 1 (S01) are the grid grade signal that n-th of shift registor 30 receives (n-1)th grade, to pass through gate lines 32
Grid grade scanning signal Gn is transmitted, wherein the shift registor 30 has quiescent potential signal Qn.For aforementioned, the driving
Method further comprises the following steps：
One of step 1 (S11)：(n-1)th grade of grid grade signal is received, and according to (n-1)th grade of grid grade signal, generates institute
State the quiescent potential of shift registor 30.
Two (S12) of step 1：The quiescent potential of the shift registor 30 is set to be maintained low preset potential.
Three (S13) of step 1：For receiving the operating point electricity of shift registor 30 described in clock signal CKn and preliminary filling
Pre-charging potential is pressed to, and pre-charging potential coupling is become by the quiescent potential signal according to the clock signal CKn
Qn。
Four (S14) of step 1：According to the quiescent potential signal Qn and clock signal CKn output after coupling
Gated sweep signal Gn.
One of above-mentioned steps one (S11), two (S12) of step 1, three (S13) of step 1 and step 1 four
(S14), the step of how performing Fig. 5 example one (S01) has carefully been stated.
Then, carry out Fig. 5 example the step of two (S02), step 3 (S03), step 4 (S04), step 5 (S05) and
Step 6 (S06).It is subsequent, then carry out five (S15) of Fig. 6 step 1：Feedback signal is received, and according to the feedback signal by work
Make point voltage signal Qn or the gated sweep signal Gn current potential is pulled low to low preset potential.
In conclusion the grid electrode drive circuit structure 20 of the embodiment of the present invention, display panel 10 and gate driving circuit
The driving method of structure 20 can effectively drag down grid grade scanning signal Gn using the sub- pull-down circuit 3004 newly established, and reduce
Mistake proofing is filled the time, and then can increase the charging time.
In certain embodiments, display panel may be, for example, liquid crystal display panel, QLED display panel, OLED display surface
Plate, curved face display panel or other display panels.
The above is only specific embodiments of the present invention, is not intended to limit the present invention in any form, though
So the present invention is disclosed above with specific embodiment, and however, it is not intended to limit the invention, any technology people for being familiar with this profession
Member, without departing from the scope of the present invention, when the method and technique content using the disclosure above make it is a little more
Equivalent embodiment that is dynamic or being modified to equivalent variations, but anything that does not depart from the technical scheme of the invention content, according to the present invention
Technical spirit any simple modification, equivalent change and modification to the above embodiments, still fall within technical solution of the present invention
In the range of.
Claims (10)
1. a kind of grid electrode drive circuit structure, the display panel for array substrate type actuation techniques, which is characterized in that the grid
Pole driving circuit structure includes：
Multiple cascade shift registors, wherein the shift registor includes：
Shift scratch circuit receives the grid grade signal of previous stage, to transmit grid grade scanning signal by gate lines, wherein described
Shift scratch circuit has quiescent potential signal；And
Sub- pull-down circuit is electrically coupled to gate lines, including first switch, second switch and third switch,
Before the control terminal electric property coupling of the first switch in the clock signal of second level and the clock signal of rear stage wherein
One signal, before the first end electric property coupling of the first switch in the clock signal of second level and the clock signal of rear stage
Another signal,
Quiescent potential signal described in the control terminal electric property coupling of the second switch, the first end electrical property coupling of the second switch
The second end of the first switch is connect,
The first end of the second end of second switch described in the control terminal electric property coupling of the third switch, the third switch is electrical
Couple the grid grade scanning signal, the low preset potential of second end electric property coupling of the third switch.
2. grid electrode drive circuit structure as described in claim 1, which is characterized in that the control terminal electrical property coupling of the first switch
The clock signal of second level, the clock signal of the first end electric property coupling rear stage of the first switch before connecing.
3. grid electrode drive circuit structure as described in claim 1, which is characterized in that the shift scratch circuit includes：
Input module generates the shift register for receiving the grid grade signal of previous stage, and according to the grid grade signal of previous stage
The quiescent potential of circuit；
Output module, the quiescent potential for receiving shift scratch circuit described in clock signal and preliminary filling become precharge
Position, and according to the clock signal by the pre-charging potential coupling become the quiescent potential signal, and according to coupling after
Quiescent potential signal and the clock signal export gated sweep signal；
Feedback module drags down the current potential of the gated sweep signal for receiving feedback signal, and according to the feedback signal
To low preset potential.
4. grid electrode drive circuit structure as described in claim 1, which is characterized in that the shift scratch circuit includes：
Control module, low preset potential described in electric property coupling；And
Maintenance module is pulled down, control module and the low preset potential described in electric property coupling, being controlled by the control module makes
The quiescent potential of the shift scratch circuit is maintained low preset potential.
5. grid electrode drive circuit structure as described in claim 1, which is characterized in that the first switch is the first transistor,
The second switch is second transistor, and the third switch is third transistor.
6. a kind of display panel, it to be used for array substrate type actuation techniques, which is characterized in that the display panel includes：
Multiple cascade shift registors, the shift registor include shift scratch circuit and sub- pull-down circuit；
Shift scratch circuit, the shift scratch circuit are used to receive the grid grade signal of previous stage, to be transmitted by gate lines
Grid grade scanning signal, wherein the shift scratch circuit has quiescent potential signal；And
Sub- pull-down circuit, the sub- pull-down circuit are electrically coupled to gate lines, including first switch, second switch, Yi Ji
Three switches；
Wherein, before the control terminal electric property coupling of the first switch second level clock signal, the first switch first end electricity
Property coupling rear stage clock signal；
Quiescent potential signal described in the control terminal electric property coupling of the second switch, the first end electrical property coupling of the second switch
Connect the second end of the first switch；
The first end of the second end of second switch described in the control terminal electric property coupling of the third switch, the third switch is electrical
Couple the grid grade scanning signal, the low preset potential of second end electric property coupling of the third switch.
7. display panel as claimed in claim 6, which is characterized in that the shift scratch circuit includes：
Input module generates the shift register for receiving the grid grade signal of previous stage, and according to the grid grade signal of previous stage
The quiescent potential of circuit；
Output module, the quiescent potential for receiving shift scratch circuit described in clock signal and preliminary filling become precharge
Position, and according to the clock signal by the pre-charging potential coupling become the quiescent potential signal, and according to coupling after
Quiescent potential signal and the clock signal export gated sweep signal；
The gated sweep signal potential is pulled low to by feedback module for receiving feedback signal, and according to the feedback signal
Low preset potential.
8. display panel as claimed in claim 6, which is characterized in that the shift scratch circuit includes：
Control module, low preset potential described in electric property coupling；And
Maintenance module is pulled down, control module and the low preset potential described in electric property coupling, being controlled by the control module makes
The quiescent potential of the shift scratch circuit is maintained low preset potential.
9. a kind of driving method of grid electrode drive circuit structure, the grid electrode drive circuit structure drives skill for array substrate type
The display panel of art, the grid electrode drive circuit structure have multiple cascade shift registors it is characterized in that, the driving
Method includes the following steps：
The shift registor receives the grid grade signal of previous stage, to transmit grid grade scanning signal, the shifting by gate lines
Position buffer has quiescent potential signal, and wherein the sub- pull-down circuit of gate lines electric property coupling, the sub- pull-down circuit include
First switch, second switch and third switch；
The clock signal of transmission rear stage gives the first end of the first switch；
The clock signal of second level gives the control terminal of the first switch before transmitting, wherein the first end electrical property coupling of the second switch
Connect the second end of the first switch；
The control terminal that the quiescent potential signal gives the second switch is transmitted, wherein the control terminal of third switch is electrical
Couple the second end of the second switch；And
The first end that the grid grade scanning signal gives the third switch is transmitted, the second end electric property coupling of the third switch is low
Preset potential, wherein the low preset potential can drag down grid grade scanning signal.
10. driving method as claimed in claim 9 receives the grid grade signal of previous stage for the shift registor, with logical
Gate lines transmission grid grade scanning signal is crossed, wherein the shift registor has quiescent potential signal, which is characterized in that institute
Stating driving method further comprises the following steps：
The grid grade signal of previous stage is received, and according to the grid grade signal of previous stage, generates the operating point electricity of the shift registor
Pressure；
The quiescent potential of the shift registor is set to be maintained low preset potential；
Quiescent potential for receiving shift registor described in clock signal and preliminary filling becomes pre-charging potential, and according to described
Pre-charging potential coupling is become the quiescent potential signal by clock signal；
According to the quiescent potential signal and the clock signal output gated sweep signal after coupling；And
Feedback signal is received, and the gated sweep signal potential is pulled low to by low preset potential according to the feedback signal.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810785645.9A CN108922485B (en) | 2018-07-17 | 2018-07-17 | Gate drive circuit structure, display panel and drive method of gate drive circuit structure |
| PCT/CN2018/109758 WO2020015206A1 (en) | 2018-07-17 | 2018-10-11 | Gate driving circuit structure, display panel, and driving method for gate driving circuit structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810785645.9A CN108922485B (en) | 2018-07-17 | 2018-07-17 | Gate drive circuit structure, display panel and drive method of gate drive circuit structure |
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| Publication Number | Publication Date |
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| CN108922485A true CN108922485A (en) | 2018-11-30 |
| CN108922485B CN108922485B (en) | 2020-06-12 |
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| WO (1) | WO2020015206A1 (en) |
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| CN108922485B (en) | 2020-06-12 |
| WO2020015206A1 (en) | 2020-01-23 |
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