CN107909980A - GOA circuits and the liquid crystal display device with the GOA circuits - Google Patents
GOA circuits and the liquid crystal display device with the GOA circuits Download PDFInfo
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- CN107909980A CN107909980A CN201711440507.9A CN201711440507A CN107909980A CN 107909980 A CN107909980 A CN 107909980A CN 201711440507 A CN201711440507 A CN 201711440507A CN 107909980 A CN107909980 A CN 107909980A
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 31
- 239000010409 thin film Substances 0.000 claims description 119
- 239000010408 film Substances 0.000 claims description 24
- 238000004891 communication Methods 0.000 claims description 18
- 230000005611 electricity Effects 0.000 claims description 7
- 230000009471 action Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 5
- 230000011664 signaling Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Abstract
The invention discloses a kind of GOA circuits, it includes the GOA unit of multiple cascades, wherein n-th grade of GOA unit is to the horizontal scanning line charging of n-th grade of display area, n-th grade of GOA unit includes a pull-up control circuit, a pull-up circuit, a pull-up control accentuator, a pull-down circuit, one first drop-down holding circuit and one second drop-down holding circuit, and wherein n is positive integer.The GOA circuits of the present invention, can improve the driving force of the GOA circuits by improving the fan-out capability of pull-up circuit, and then improve the charge rate of liquid crystal display panel.The invention also discloses a kind of liquid crystal display device, it is with above-mentioned GOA circuits.
Description
Technical field
The present invention relates to technical field of liquid crystal display, more particularly to a kind of GOA (Gate driver On Array, array
Substrate row drive) circuit and with the GOA circuits liquid crystal display device.
Background technology
There is liquid crystal display light and short, energy saving, radiation index to be generally less than CRT (Cathode Ray Tube, cathode
Ray tube) the advantages of, it is allowed to gradually replace CRT monitor extensive use in each electronic product.At present, active liquid crystal
Show the driving of panel-level scan line, mainly completed by the external IC of panel (Integrated Circuit, integrated circuit),
External IC can control the charging and discharging step by step of horizontal scanning lines at different levels.And GOA technologies, utilize TFT (Thin Film
Transistor, thin film transistor (TFT)) LCD (Liquid Crystal Display) array processing procedure by Gate row scanning drive signal circuit productions in array base
On plate, the driving to Gate progressive scans is realized, therefore, original processing procedure of liquid crystal display panel can be used, by horizontal sweep
The drive circuit of line is produced on the substrate around viewing area.GOA technologies can reduce the binding process of external IC, can lift production capacity
And product cost is reduced, and liquid crystal display panel is more suitable for the display product for making narrow frame or Rimless.
The main frame of GOA circuits includes:Pull-up control circuit, pull-up circuit, pull-down circuit, drop-down holding circuit and
It is responsible for Boast (bootstrapping) capacitance of current potential lifting.Wherein, pull-up control circuit is used to export pull-up control signal Q (n), pull-up
Circuit is used to export scanning drive signal G (n), when pull-up control signal Q (n) is in high potential, pulls up control signal Q (n)
Voltage it is higher, the waveform of scanning drive signal G (n) rises faster, and the charge rate of liquid crystal display panel is higher.That is,
The waveform of pull-up control signal Q (n) determines the driving force of GOA circuits.So as to, in order to improve the driving force of GOA circuits,
How to improve the voltage of pull-up control signal Q (n) just becomes one and urgently goes to solve the problems, such as.
The content of the invention
The embodiment of the present invention provides a kind of GOA circuits and the liquid crystal display device with the GOA circuits, it passes through in GOA
Increase pull-up control accentuator in circuit, can improve the driving force of the GOA circuits, and then improve liquid crystal display panel
Charge rate.
An embodiment of the present invention provides a kind of GOA circuits, it includes the GOA unit of multiple cascades, wherein n-th grade of GOA is mono-
For member to the horizontal scanning line charging of n-th grade of display area, n-th grade of GOA unit includes a pull-up control circuit, a pull-up electricity
Road, a pull-up control accentuator, a pull-down circuit, one first drop-down holding circuit and one second drop-down holding circuit, wherein n
For positive integer;
Wherein, the pull-up circuit, receives enabling signal CT, and according to one pull-up control letter of enabling signal CT outputs
Number Q (n);
The pull-up circuit, receives the pull-up control signal Q (n) and clock signal clk, and is controlled according to the pull-up
Signal Q (n) and the clock signal clk export one n-th grade of level communication ST (n) and one n-th grade of scanning drive signal G (n);
The pull-up control accentuator, receives n-th grade of scanning drive signal G (n), and sweep according to described n-th grade
Retouch drive signal G (n) and pull up the pull-up control signal Q (n);
The pull-down circuit, receives a DC low-voltage signal Vss, and according to DC low-voltage signal Vss drop-downs
Pull up control signal Q (n), and then pull down n-th grade of scanning drive signal G (n) so that the pull-up control signal Q (n) with
N-th grade of scanning drive signal G (n) is closed;
The first drop-down holding circuit, receives the one first low frequency signal LC1 and DC low-voltage signal Vss, and root
The pull-up control signal Q (n) and described n-th grade are swept according to the first low frequency signal LC1 and DC low-voltage signal Vss
Drive signal G (n) is retouched to maintain in off position;
The second drop-down holding circuit, receives the one second low frequency signal LC2 and DC low-voltage signal Vss, and root
The pull-up control signal Q (n) and described n-th grade are swept according to the second low frequency signal LC2 and DC low-voltage signal Vss
Drive signal G (n) is retouched to maintain in off position.
Wherein, as n=1, the enabling signal CT is an initial signal STV;Work as n>When 1, the enabling signal CT is
The (n-1)th grade of level communication ST (n-1) and (n-1)th grade of scanning drive signal G (n-1) of (n-1)th grade of GOA unit output.
Wherein, the first drop-down holding circuit and the second drop-down holding circuit alternately work and control the pull-up
Signal Q (n) processed and n-th grade of scanning drive signal G (n) are maintained in off position.
Wherein, the pull-down circuit exports one (n+1)th grade of scanning drive signal G always according to the DC low-voltage signal Vss
(n+1)。
Wherein, the pull-up control circuit includes:One first film transistor (T11);
As n=1, the control terminal and first end of the first film transistor (T11) input the initial signal STV,
Its second end is connected with pull-up control signal point Q, for according to the initial signal STV outputs pull-up control signal Q
(n);
Work as n>When 1, the control terminal of the first film transistor (T11) inputs (n-1)th grade of level communication ST (n-
1), its first end inputs (n-1)th grade of scanning drive signal G (n-1), its second end connects with the pull-up control signal point Q
Connect, for according to (n-1)th grade of level communication ST (n-1) and (n-1)th grade of scanning drive signal G (n-1) output
Pull up control signal Q (n).
Wherein, the pull-up circuit includes:Second thin film transistor (TFT) (T22), its control terminal and the pull-up control signal
Point Q is electrically connected, and for receiving the pull-up control signal Q (n), its first end inputs the clock signal clk, its second end
For exporting n-th grade of level communication ST (n) according to the pull-up control signal Q (n) and the clock signal clk;3rd film
Transistor (T21), its control terminal are electrically connected with the pull-up control signal point Q, for receiving the pull-up control signal Q
(n), its first end inputs the clock signal clk, its second end is electrically connected with horizontal scanning line G, for according to described
Control signal Q (n) and the clock signal clk is drawn to export n-th grade of scanning drive signal G (n);
The pull-up control accentuator includes:4th thin film transistor (TFT) (Tb) and the first capacitance (C1), the described 4th is thin
The control terminal and first end of film transistor (Tb) are electrically connected after being electrically connected with the horizontal scanning line G, described for inputting
N-th grade of scanning drive signal G (n), its second end are connected with one end of first capacitance (C1), first capacitance (C1)
The other end is electrically connected with the pull-up control signal point Q, for according to n-th grade of scanning drive signal G (n) pull-up
Pull up control signal Q (n);
The pull-down circuit includes:5th thin film transistor (TFT) (T41) and the 6th thin film transistor (TFT) (T31);Described 5th is thin
The first end of film transistor (T41) inputs the DC low-voltage signal Vss, its second end and the pull-up control signal point Q electricity
Property connection, for pulling down the pull-up control signal Q (n) according to the DC low-voltage signal Vss, so that the pull-up control is believed
Number Q (n) is closed (being low potential), its control terminal and the control terminal of the 6th thin film transistor (TFT) (T31) are electrical
Connection, for exporting (n+1)th grade of scanning drive signal G (n+1) according to the DC low-voltage signal Vss;6th film is brilliant
The first end of body pipe (T31) inputs the DC low-voltage signal Vss, its second end is electrically connected with the horizontal scanning line G, is used
In pulling down n-th grade of scanning drive signal G (n) according to the DC low-voltage signal Vss, so that n-th grade of turntable driving
Signal G (n) is closed;
The first drop-down holding circuit includes:7th thin film transistor (TFT) (T51), the 8th thin film transistor (TFT) (T52), the 9th
Thin film transistor (TFT) (T53), the tenth thin film transistor (TFT) (T54), the 11st thin film transistor (TFT) (T42) and the 12nd thin film transistor (TFT)
(T32);The control terminal and first end of 7th thin film transistor (TFT) (T51) input the first low frequency signal LC1, its second end
Electrically connect with the first end of the 8th thin film transistor (TFT) (T52) and the control terminal of the 9th thin film transistor (TFT) (T53) respectively
Connect;The control terminal of 8th thin film transistor (TFT) (T52) is electrically connected with the pull-up control signal point Q, described for inputting
Control signal Q (n) is pulled up, its second end inputs the DC low-voltage signal Vss;The of 9th thin film transistor (TFT) (T53)
One end inputs the first low frequency signal LC1, its second end first end with the tenth thin film transistor (TFT) (T54), institute respectively
State the control terminal of the 11st thin film transistor (TFT) (T42) and the control terminal of the 12nd thin film transistor (TFT) (T32) is electrically connected;
The control terminal of tenth thin film transistor (TFT) (T54) is electrically connected with the pull-up control signal point Q, for inputting the pull-up
Control signal Q (n), its second end input the DC low-voltage signal Vss;The first of 11st thin film transistor (TFT) (T42)
End inputs the DC low-voltage signal Vss, its second end is electrically connected with the pull-up control signal point Q, for according to
The first low frequency signal LC1 and DC low-voltage signal Vss maintains the pull-up control signal Q (n) in off position;It is described
The first end of 12nd thin film transistor (TFT) (T32) inputs the DC low-voltage signal Vss, its second end and the horizontal scanning line
G is electrically connected, for according to the first low frequency signal LC1 and DC low-voltage signal Vss by n-th grade of turntable driving
Signal G (n) is maintained in off position;
The second drop-down holding circuit includes:13rd thin film transistor (TFT) (T61), the 14th thin film transistor (TFT) (T62),
15th thin film transistor (TFT) (T63), the 16th thin film transistor (TFT) (T64), the 17th thin film transistor (TFT) (T43) and the 18th film
Transistor (T33);The control terminal and first end of 13rd thin film transistor (TFT) (T61) input the second low frequency signal LC2,
Its second end respectively with the first end of the 14th thin film transistor (TFT) (T62) and the 15th thin film transistor (TFT) (T63)
Control terminal is electrically connected;The control terminal of 14th thin film transistor (TFT) (T62) electrically connects with the pull-up control signal point Q
Connect, for inputting the pull-up control signal Q (n), its second end inputs the DC low-voltage signal Vss;Described 15th is thin
The first end of film transistor (T63) inputs the second low frequency signal LC2, its second end by respectively with the 16th film
The first end of transistor (T64), the control terminal of the 17th thin film transistor (TFT) (T43) and the 18th thin film transistor (TFT)
(T33) control terminal is electrically connected;The control terminal of 16th thin film transistor (TFT) (T64) and the pull-up control signal point Q
It is electrically connected, for inputting the pull-up control signal Q (n), its second end inputs the DC low-voltage signal Vss;Described
The first end of 17 thin film transistor (TFT)s (T43) inputs the DC low-voltage signal Vss, its second end and the pull-up control signal
Point Q is electrically connected, for being believed the pull-up control according to the second low frequency signal LC2 and DC low-voltage signal Vss
Number Q (n) is maintained in off position;The first end of 18th thin film transistor (TFT) (T33) inputs the DC low-voltage signal
Vss, its second end is electrically connected with the horizontal scanning line G, for low according to the second low frequency signal LC2 and the direct current
Signal Vss is pressed to maintain n-th grade of scanning drive signal G (n) in off position.
Wherein, the pull-up control signal point Q is electrically connected by one second capacitance (Cb) and the horizontal scanning line G.
Wherein, the signal period of the first low frequency signal LC1 and the second low frequency signal LC2 are 2 times of frame periods, are accounted for
Sky is than being 1/2, and the phase difference between the first low frequency signal LC1 and the second low frequency signal LC2 is 1/2 signal week
Phase.
Wherein, the operating point current potential of the first drop-down holding circuit and the second drop-down holding circuit is the pull-up
Control signal Q (n) low potentials and the first low frequency signal LC1 high potentials and pull-up control signal Q (n) low potential and
The second low frequency signal LC2 high potentials.
Correspondingly, the embodiment of the present invention additionally provides a kind of liquid crystal display device, it includes above-mentioned being used for liquid crystal display
GOA circuits.
In conclusion in GOA circuits provided in an embodiment of the present invention and have in the liquid crystal display device of the GOA circuits,
The voltage of pull-up control signal is improved by increasing pull-up control accentuator in GOA circuits, pull-up circuit can be improved
Fan-out capability, and then the driving force of the GOA circuits is improved, so as to improve the charge rate of liquid crystal display panel.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is attached drawing needed in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, without creative efforts, can be with
Other attached drawings are obtained according to these attached drawings.
Fig. 1 is a kind of structure diagram of GOA circuits provided in an embodiment of the present invention.
Fig. 2 is the structure diagram of another kind GOA circuits provided in an embodiment of the present invention.
Fig. 3 is that the waveform of key node signal in GOA circuits as shown in Figure 1 or 2 provided in an embodiment of the present invention shows
It is intended to.
Embodiment
Below in conjunction with the attached drawing in embodiment of the present invention, the technical solution in embodiment of the present invention is carried out clear
Chu, be fully described by.Obviously, described embodiment is a part of embodiment of the present invention, rather than whole embodiment party
Formula.The embodiment of base in the present invention, those of ordinary skill in the art are obtained on the premise of creative work is not made
The every other embodiment obtained, should all belong in the scope of protection of the invention.
In addition, the explanation of following embodiment is with reference to additional diagram, the spy implemented to illustrate the present invention can be used to
Determine embodiment.The direction term being previously mentioned in the present invention, for example, " on ", " under ", "front", "rear", "left", "right", " interior ",
" outer ", " side " etc., are only the directions with reference to annexed drawings, and therefore, the direction term used is to more preferably, more clearly say
It is bright and understand the present invention, rather than instruction or infer the device of meaning or element and must have specific orientation, with specific side
Position construction and operation, therefore be not considered as limiting the invention.
In the description of the present invention, it is necessary to illustrate, unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " should be interpreted broadly, for example, it may be being fixedly connected or detachably connected, or integratedly be connected
Connect;Can mechanically connect;It can be directly connected, can also be indirectly connected by intermediary, can be in two elements
The connection in portion.For the ordinary skill in the art, the tool of above-mentioned term in the present invention can be understood with concrete condition
Body implication.
In addition, in the description of the present invention, unless otherwise indicated, " multiple " are meant that two or more.If this
Occurring the term of " process " in specification, it refers not only to independent process, when can not clearly be distinguished with other process, as long as
It can realize that the effect desired by the process is then also included within this term.In addition, the numerical value represented in this specification with "~"
Scope refers to the scope that "~" front and rear numerical value recorded is included as minimum value and maximum.In the accompanying drawings, tie
The similar or identical unit of structure is indicated by the same numeral.
The embodiment of the present invention provides a kind of GOA (Gate driver On Array, the driving of array base palte row) circuit, it can
To improve the fan-out capability of pull-up circuit, and then the driving force of the GOA circuits is improved, so as to improve liquid crystal display panel
Charge rate.Below in conjunction with Fig. 1 to Fig. 3 to a kind of GOA circuits provided in an embodiment of the present invention and with the GOA circuits liquid crystal
Display device is specifically described.
Fig. 1 is referred to, Fig. 1 is a kind of structure diagram of GOA circuits provided in an embodiment of the present invention.As shown in Figure 1
GOA circuits include the GOA unit of multiple cascades, wherein n-th grade of GOA unit is to the horizontal scanning line charging of n-th grade of display area, institute
N-th grade of GOA unit is stated including at least pull-up control circuit 10, pull-up circuit 20, pull-up control accentuator 30, pull-down circuit
40th, the first drop-down holding circuit 50 and second pulls down holding circuit 60, and wherein n is positive integer.
As n=1, the pull-up control circuit 10, receives an initial signal STV, and defeated according to the initial signal STV
Go out a pull-up control signal Q (n);
Work as n>When 1, the pull-up control circuit 10, receives (n-1)th grade of level communication ST that (n-1)th grade of GOA unit exports
(n-1) and (n-1)th grade of scanning drive signal G (n-1), and according to (n-1)th grade of level communication ST (n-1) and described (n-1)th
One pull-up control signal Q (n) of level scanning drive signal G (n-1) outputs.
As it can be seen that as n=1, the initial signal STV is responsible for starting first order GOA unit, and works as n>When 1, n-th grade of GOA
The (n-1)th grade of level communication ST (n-1) and (n-1)th grade of scanning drive signal G (n-1) that unit is exported by (n-1)th grade of GOA unit are opened
It is dynamic, so as to fulfill GOA circuits are opened step by step, realize row turntable driving so that horizontal scanning line can be charged step by step.
Work as n it should be noted that illustrate only in Fig. 1>The signal reception condition of the pull-up control circuit 10 when 1.
The pull-up circuit 20 is electrically connected with the pull-up control circuit 10, and receives the pull-up control signal Q (n)
And clock signal clk, and one n-th grade of level communication number is exported according to the pull-up control signal Q (n) and the clock signal clk
ST (n) and one n-th grade of scanning drive signal G (n).
The pull-up control accentuator 30 is electrically connected with the pull-up control circuit 10 and the pull-up circuit 20, and
N-th grade of scanning drive signal G (n) is received, and is controlled according to n-th grade of scanning drive signal G (n) pull-up pull-up
Signal Q (n).
The pull-down circuit 40 is strengthened with the pull-up control circuit 10, the pull-up circuit 20 and the pull-up control
Circuit 30 is electrically connected, and receives a DC low-voltage signal Vss, and pulls down the pull-up according to the DC low-voltage signal Vss
Control signal Q (n), and then pull down n-th grade of scanning drive signal G (n) so that the pull-up control signal Q (n) with it is described
N-th grade of scanning drive signal G (n) is closed (being low potential), and exports one according to the DC low-voltage signal Vss
(n+1)th grade of scanning drive signal G (n+1).
The first drop-down holding circuit 50 is controlled with the pull-up control circuit 10, the pull-up circuit 20, the pull-up
Accentuator 30 and the pull-down circuit 40 processed are electrically connected, and receive one first low frequency signal LC1 and the DC low-voltage
Signal Vss, and according to the first low frequency signal LC1 and DC low-voltage signal Vss by the pull-up control signal Q (n)
Maintained in off position with n-th grade of scanning drive signal G (n).
The second drop-down holding circuit 60 is controlled with the pull-up control circuit 10, the pull-up circuit 20, the pull-up
Accentuator 30, the pull-down circuit 40 and the first drop-down holding circuit 50 processed are electrically connected, and it is low to receive one second
The frequency signal LC2 and DC low-voltage signal Vss, and according to the second low frequency signal LC2 and the DC low-voltage signal Vss
The pull-up control signal Q (n) and n-th grade of scanning drive signal G (n) are maintained in off position.
In an embodiment of the present invention, the first drop-down holding circuit 50 and the second drop-down holding circuit 60 replace
Work and maintain (to maintain in off position by the pull-up control signal Q (n) and n-th grade of scanning drive signal G (n)
In low-potential state).
In GOA circuits provided in an embodiment of the present invention, carried by increasing pull-up control accentuator in GOA circuits
The voltage of high pull-up control signal, can improve the fan-out capability of pull-up circuit, and then improve the driving energy of the GOA circuits
Power, so as to improve the charge rate of liquid crystal display panel.
Please also refer to Fig. 1 and Fig. 2, Fig. 2 is the structure diagram of another kind GOA circuits provided in an embodiment of the present invention.
GOA circuits as shown in Figure 2 include pull-up control circuit 10 as shown in Figure 1, pull-up circuit 20, pull-up control accentuator
30th, pull-down circuit 40, first pulls down holding circuit 50 and second and pulls down holding circuit 60.Wherein,
The pull-up control circuit 10 specifically includes:One first film transistor (T11);
As n=1, the control terminal and first end of the first film transistor (T11) input the initial signal STV,
Its second end is connected with pull-up control signal point Q, for according to the initial signal STV outputs pull-up control signal Q
(n);
Work as n>When 1, the control terminal of the first film transistor (T11) inputs (n-1)th grade of level communication ST (n-
1), its first end inputs (n-1)th grade of scanning drive signal G (n-1), its second end connects with the pull-up control signal point Q
Connect, for according to (n-1)th grade of level communication ST (n-1) and (n-1)th grade of scanning drive signal G (n-1) output
Pull up control signal Q (n).
Work as n it should be noted that illustrate only in Fig. 2>The signal input condition of the pull-up control circuit 10 when 1.
The pull-up circuit 20 specifically includes:One second thin film transistor (TFT) (T22), its control terminal and the pull-up control letter
Number point Q is electrically connected, and for receiving the pull-up control signal Q (n), its first end input clock signal clk, it second
End is used to export n-th grade of level communication ST (n) according to the pull-up control signal Q (n) and the clock signal clk;3rd is thin
Film transistor (T21), its control terminal are electrically connected with the pull-up control signal point Q, for receiving the pull-up control signal Q
(n), its first end inputs the clock signal clk, its second end is electrically connected with horizontal scanning line G, for according to described
Control signal Q (n) and the clock signal clk is drawn to export n-th grade of scanning drive signal G (n).
The pull-up control accentuator 30 specifically includes:One the 4th thin film transistor (TFT) (Tb) and one first capacitance (C1),
The control terminal and first end of 4th thin film transistor (TFT) (Tb) are electrically connected after being electrically connected with the horizontal scanning line G, are used
In inputting n-th grade of scanning drive signal G (n), its second end is connected with one end of first capacitance (C1), and described first
The other end of capacitance (C1) is electrically connected with the pull-up control signal point Q, for according to n-th grade of scanning drive signal G
(n) the pull-up control signal Q (n) is pulled up.In a specific embodiment, the control of the 4th thin film transistor (TFT) (Tb)
End, first end and second end are respectively its grid, source electrode and drain electrode, when n-th grade of scanning drive signal G (n) is in high electricity
During position, the 4th thin film transistor (TFT) (Tb) conducting, the coupling that the change of the first capacitance (C1) both end voltage produces causes
The voltage rise of the pull-up control signal point Q.
The pull-down circuit 40 specifically includes:One the 5th thin film transistor (TFT) (T41) and one the 6th thin film transistor (TFT) (T31);
The first end of 5th thin film transistor (TFT) (T41) inputs the DC low-voltage signal Vss, its second end is controlled with the pull-up
Signaling point Q is electrically connected, for pulling down the pull-up control signal Q (n) according to the DC low-voltage signal Vss, so that described
Pull-up control signal Q (n) is closed (being low potential), its control terminal and the 6th thin film transistor (TFT) (T31)
Control terminal is electrically connected, for exporting (n+1)th grade of scanning drive signal G (n+1) according to the DC low-voltage signal Vss;It is described
The first end of 6th thin film transistor (TFT) (T31) inputs the DC low-voltage signal Vss, its second end and the horizontal scanning line G
It is electrically connected, for pulling down n-th grade of scanning drive signal G (n) according to the DC low-voltage signal Vss, so that described n-th
Level scanning drive signal G (n) is closed (being low potential).
The first drop-down holding circuit 50 specifically includes:One the 7th thin film transistor (TFT) (T51), one the 8th thin film transistor (TFT)
(T52), one the 9th thin film transistor (TFT) (T53), 1 the tenth thin film transistor (TFT) (T54), 1 the 11st thin film transistor (TFT) (T42) and one
12nd thin film transistor (TFT) (T32);The control terminal and first end of 7th thin film transistor (TFT) (T51) input first low frequency
Signal LC1, its second end first end with the 8th thin film transistor (TFT) (T52) and the 9th thin film transistor (TFT) respectively
(T53) control terminal is electrically connected;The control terminal of 8th thin film transistor (TFT) (T52) and the pull-up control signal point Q electricity
Property connection, for inputting the pull-up control signal Q (n), its second end input DC low-voltage signal Vss;Described 9th
The first end of thin film transistor (TFT) (T53) inputs the first low frequency signal LC1, its second end by the first signaling point S respectively with
First end, the control terminal and the described tenth of the 11st thin film transistor (TFT) (T42) of tenth thin film transistor (TFT) (T54)
The control terminal of two thin film transistor (TFT)s (T32) is electrically connected;The control terminal of tenth thin film transistor (TFT) (T54) is controlled with the pull-up
Signaling point Q processed is electrically connected, and for inputting the pull-up control signal Q (n), its second end inputs the DC low-voltage signal
Vss;The first end of 11st thin film transistor (TFT) (T42) inputs the DC low-voltage signal Vss, its second end with it is described on
Control signal point Q is drawn to be electrically connected, described in being incited somebody to action according to the first low frequency signal LC1 and DC low-voltage signal Vss
Control signal Q (n) is pulled up to maintain in off position;The first end of 12nd thin film transistor (TFT) (T32) inputs the direct current
Low-voltage signal Vss, its second end is electrically connected with the horizontal scanning line G, for according to the first low frequency signal LC1 and institute
DC low-voltage signal Vss is stated to maintain n-th grade of scanning drive signal G (n) in off position.
The second drop-down holding circuit 60 specifically includes:The 13rd thin film transistor (TFT) (T61), 1 the 14th film are brilliant
Body pipe (T62), 1 the 15th thin film transistor (TFT) (T63), 1 the 16th thin film transistor (TFT) (T64), 1 the 17th thin film transistor (TFT)
(T43) and 1 the 18th thin film transistor (TFT) (T33);Control terminal and the first end input of 13rd thin film transistor (TFT) (T61)
The second low frequency signal LC2, its second end first end and the described tenth with the 14th thin film transistor (TFT) (T62) respectively
The control terminal of five thin film transistor (TFT)s (T63) is electrically connected;The control terminal of 14th thin film transistor (TFT) (T62) and the pull-up
Control signal point Q is electrically connected, and for inputting the pull-up control signal Q (n), its second end inputs the DC low-voltage signal
Vss;The first end of 15th thin film transistor (TFT) (T63) inputs the second low frequency signal LC2, its second end passes through second
Signaling point the N first end with the 16th thin film transistor (TFT) (T64), the control terminal of the 17th thin film transistor (TFT) (T43) respectively
And the control terminal of the 18th thin film transistor (TFT) (T33) is electrically connected;The control of 16th thin film transistor (TFT) (T64)
End is electrically connected with the pull-up control signal point Q, for inputting the pull-up control signal Q (n), described in its second end inputs
DC low-voltage signal Vss;The first end of 17th thin film transistor (TFT) (T43) inputs the DC low-voltage signal Vss, it the
Two ends are electrically connected with the pull-up control signal point Q, for according to the second low frequency signal LC2 and DC low-voltage letter
Number Vss maintains the pull-up control signal Q (n) in off position;The first end of 18th thin film transistor (TFT) (T33) is defeated
Enter the DC low-voltage signal Vss, its second end is electrically connected with the horizontal scanning line G, for according to second low frequency
The signal LC2 and DC low-voltage signal Vss maintains n-th grade of scanning drive signal G (n) in off position.
It should be noted that in an embodiment of the present invention, the pull-up control signal point Q passes through one second capacitance (Cb)
It is electrically connected with the horizontal scanning line G.In an embodiment of the present invention, second capacitance (Cb) is Boast (bootstrapping) electricity
Hold.
It should also be noted that, in an embodiment of the present invention, the first low frequency signal LC1 and second low frequency letter
The signal period of number LC2 is 2 times of frame periods, duty cycle 1/2, and the first low frequency signal LC1 and second low frequency letter
Phase difference between number LC2 was 1/2 signal period.
It should also be noted that, in an embodiment of the present invention, under the first drop-down holding circuit 50 and described second
Draw the operating point current potential of holding circuit 60 for pull-up control signal Q (n) low potential and the first low frequency signal LC1 (or
The second low frequency signal LC2) high potential.
In embodiments of the present invention, when n-th grade of scanning drive signal G (n) is in high potential, the 4th film
Transistor (Tb) turns on, and the coupling that the change of the first capacitance (C1) both end voltage produces causes the pull-up control signal Q
(n) voltage rise, can improve the fan-out capability of pull-up circuit, and then improve the driving force of the GOA circuits, so as to carry
The charge rate of high liquid crystal display panel.
Please also refer to Fig. 1 to Fig. 3, Fig. 3 is to be closed in GOA circuits as shown in Figure 1 or 2 provided in an embodiment of the present invention
The waveform diagram of key node signal.Including clock signal clk, pull-up control signal Q (n), n-th grade of scanning drive signal
G (n), n-th grade of level communication ST (n), the signal of the signal of the first signaling point S and secondary signal point N.
From oscillogram as it can be seen that when the pull-up control signal Q (n) is high potential, if the pull-up circuit 20 inputs
The clock signal clk of high potential, then the pull-up circuit 20 the pull-up control signal Q (n) is pulled upward to dotted line position,
The pull-up control signal Q (n) is further pulled upward to solid line position by the pull-up control accentuator 30, can improve pull-up
The fan-out capability of circuit 20, and then the driving force of GOA circuits is improved, so as to improve the charge rate of liquid crystal display panel.
Correspondingly, the embodiment of the present invention additionally provides a kind of liquid crystal display device, it is included shown in above-mentioned Fig. 1 and Fig. 2
GOA circuits for liquid crystal display.For example, the liquid crystal display device can include but is not limited to the hand with liquid crystal display panel
Machine (such as Android phone, iOS mobile phones), tablet computer, (Mobile Internet Devices, mobile Internet are set MID
It is standby), PDA (Personal Digital Assistant, personal digital assistant), laptop, television set, Electronic Paper, number
Code photo frame etc..
The embodiment of the present invention is added by increasing by a pull-up control between the pull-up control circuit of GOA circuits and pull-up circuit
Forceful electric power road pulls up the voltage of control signal to improve, and can improve the fan-out capability of the pull-up circuit, and then improve the GOA
The driving force of circuit, so as to improve the charge rate of liquid crystal display panel.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means to combine the embodiment or example particular features, structures, materials, or characteristics described
Included at least one embodiment of the present invention or example.In the present specification, schematic expression of the above terms differs
Surely identical embodiment or example are referred to.Moreover, the particular features, structures, materials, or characteristics of description can be any one
Combined in an appropriate manner in a or multiple embodiments or example.
The GOA circuits provided above the embodiment of the present invention and the liquid crystal display device with the GOA circuits carry out
It is discussed in detail, specific case used herein is set forth the principle of the present invention and embodiment, above example
Illustrate to be only intended to help the method and its core concept for understanding the present invention;Meanwhile for those of ordinary skill in the art, according to
According to the thought of the present invention, there will be changes in specific embodiments and applications, in conclusion this specification content
It should not be construed as limiting the invention.
Claims (10)
1. a kind of GOA circuits, it is characterised in that include the GOA unit of multiple cascades, wherein n-th grade of GOA unit is to display area
N-th grade of horizontal scanning line charging, n-th grade of GOA unit include a pull-up control circuit, a pull-up circuit, a pull-up control
Accentuator, a pull-down circuit, one first drop-down holding circuit and one second drop-down holding circuit, wherein n is positive integer;
The pull-up circuit, receives enabling signal CT, and according to one pull-up control signal Q (n) of enabling signal CT outputs;
The pull-up circuit, receives the pull-up control signal Q (n) and clock signal clk, and according to the pull-up control signal
Q (n) and the clock signal clk export one n-th grade of level communication ST (n) and one n-th grade of scanning drive signal G (n);
The pull-up control accentuator, receives n-th grade of scanning drive signal G (n), and is driven according to described n-th grade scanning
Dynamic signal G (n) pulls up the pull-up control signal Q (n);
The pull-down circuit, receives a DC low-voltage signal Vss, and pulls down the pull-up according to the DC low-voltage signal Vss
Control signal Q (n), and then pull down n-th grade of scanning drive signal G (n) so that the pull-up control signal Q (n) with it is described
N-th grade of scanning drive signal G (n) is closed;
The first drop-down holding circuit, receives the one first low frequency signal LC1 and DC low-voltage signal Vss, and according to institute
The first low frequency signal LC1 and the DC low-voltage signal Vss is stated to drive the pull-up control signal Q (n) and described n-th grade scanning
Dynamic signal G (n) is maintained in off position;
The second drop-down holding circuit, receives the one second low frequency signal LC2 and DC low-voltage signal Vss, and according to institute
The second low frequency signal LC2 and the DC low-voltage signal Vss is stated to drive the pull-up control signal Q (n) and described n-th grade scanning
Dynamic signal G (n) is maintained in off position.
2. GOA circuits as claimed in claim 1, it is characterised in that as n=1, the enabling signal CT is an initial signal
STV;Work as n>When 1, the enabling signal CT is (n-1)th grade of level communication ST (n-1) and (n-1)th of (n-1)th grade of GOA unit output
Level scanning drive signal G (n-1).
3. GOA circuits as claimed in claim 2, it is characterised in that the first drop-down holding circuit and second drop-down
Holding circuit alternately works maintains closing by the pull-up control signal Q (n) and n-th grade of scanning drive signal G (n)
State.
4. GOA circuits as claimed in claim 3, it is characterised in that the pull-down circuit is always according to the DC low-voltage signal
Vss exports one (n+1)th grade of scanning drive signal G (n+1).
5. GOA circuits as claimed in claim 4, it is characterised in that
The pull-up control circuit includes:One first film transistor (T11);
As n=1, the control terminal and first end of the first film transistor (T11) input the initial signal STV, it the
Two ends are connected with pull-up control signal point Q, for exporting the pull-up control signal Q (n) according to the initial signal STV;
Work as n>When 1, the control terminal of the first film transistor (T11) inputs (n-1)th grade of level communication ST (n-1), its
First end inputs (n-1)th grade of scanning drive signal G (n-1), its second end is connected with the pull-up control signal point Q, uses
Controlled according to (n-1)th grade of level communication ST (n-1) and (n-1)th grade of scanning drive signal G (n-1) output pull-up
Signal Q (n) processed.
6. GOA circuits as claimed in claim 5, it is characterised in that
The pull-up circuit includes:One second thin film transistor (TFT) (T22), its control terminal and the pull-up control signal point Q are electrical
Connection, for receiving the pull-up control signal Q (n), its first end inputs the clock signal clk, its second end is used for root
N-th grade of level communication ST (n) is exported according to the pull-up control signal Q (n) and the clock signal clk;3rd thin film transistor (TFT)
(T21), its control terminal is electrically connected with the pull-up control signal point Q, and for receiving the pull-up control signal Q (n), it the
One end inputs the clock signal clk, its second end is electrically connected with horizontal scanning line G, for according to the pull-up control letter
Number Q (n) and the clock signal clk export n-th grade of scanning drive signal G (n);
The pull-up control accentuator includes:One the 4th thin film transistor (TFT) (Tb) and one first capacitance (C1), the described 4th is thin
The control terminal and first end of film transistor (Tb) are electrically connected after being electrically connected with the horizontal scanning line G, described for inputting
N-th grade of scanning drive signal G (n), its second end are connected with one end of first capacitance (C1), first capacitance (C1)
The other end is electrically connected with the pull-up control signal point Q, for according to n-th grade of scanning drive signal G (n) pull-up
Pull up control signal Q (n);
The pull-down circuit includes:One the 5th thin film transistor (TFT) (T41) and one the 6th thin film transistor (TFT) (T31);Described 5th is thin
The first end of film transistor (T41) inputs the DC low-voltage signal Vss, its second end and the pull-up control signal point Q electricity
Property connection, for pulling down the pull-up control signal Q (n) according to the DC low-voltage signal Vss, so that the pull-up control is believed
Number Q (n) is closed (being low potential), its control terminal and the control terminal of the 6th thin film transistor (TFT) (T31) are electrical
Connection, for exporting (n+1)th grade of scanning drive signal G (n+1) according to the DC low-voltage signal Vss;6th film is brilliant
The first end of body pipe (T31) inputs the DC low-voltage signal Vss, its second end is electrically connected with the horizontal scanning line G, is used
In pulling down n-th grade of scanning drive signal G (n) according to the DC low-voltage signal Vss, so that n-th grade of turntable driving
Signal G (n) is closed;
The first drop-down holding circuit includes:One the 7th thin film transistor (TFT) (T51), one the 8th thin film transistor (TFT) (T52), one
Nine thin film transistor (TFT)s (T53), 1 the tenth thin film transistor (TFT) (T54), 1 the 11st thin film transistor (TFT) (T42) and 1 the 12nd film
Transistor (T32);The control terminal and first end of 7th thin film transistor (TFT) (T51) input the first low frequency signal LC1, its
Second end respectively with the first end of the 8th thin film transistor (TFT) (T52) and the control terminal of the 9th thin film transistor (TFT) (T53)
It is electrically connected;The control terminal of 8th thin film transistor (TFT) (T52) is electrically connected with the pull-up control signal point Q, for defeated
Enter the pull-up control signal Q (n), its second end inputs the DC low-voltage signal Vss;9th thin film transistor (TFT)
(T53) first end inputs the first low frequency signal LC1, its second end respectively with the tenth thin film transistor (TFT) (T54)
The control terminal of first end, the control terminal of the 11st thin film transistor (TFT) (T42) and the 12nd thin film transistor (TFT) (T32)
It is electrically connected;The control terminal of tenth thin film transistor (TFT) (T54) is electrically connected with the pull-up control signal point Q, for defeated
Enter the pull-up control signal Q (n), its second end inputs the DC low-voltage signal Vss;11st thin film transistor (TFT)
(T42) first end inputs the DC low-voltage signal Vss, its second end is electrically connected with the pull-up control signal point Q, uses
In the pull-up control signal Q (n) is maintained pass according to the first low frequency signal LC1 and DC low-voltage signal Vss
Closed state;The first end of 12nd thin film transistor (TFT) (T32) inputs the DC low-voltage signal Vss, its second end and institute
Horizontal scanning line G electric connections are stated, described in being incited somebody to action according to the first low frequency signal LC1 and DC low-voltage signal Vss
N-th grade of scanning drive signal G (n) is maintained in off position;
The second drop-down holding circuit includes:The 13rd thin film transistor (TFT) (T61), 1 the 14th thin film transistor (TFT) (T62),
The 15th thin film transistor (TFT) (T63), 1 the 16th thin film transistor (TFT) (T64), 1 the 17th thin film transistor (TFT) (T43) and 1
18 thin film transistor (TFT)s (T33);The control terminal and first end of 13rd thin film transistor (TFT) (T61) input second low frequency
Signal LC2, its second end first end with the 14th thin film transistor (TFT) (T62) and the 15th thin film transistor (TFT) respectively
(T63) control terminal is electrically connected;The control terminal of 14th thin film transistor (TFT) (T62) and the pull-up control signal point Q
It is electrically connected, for inputting the pull-up control signal Q (n), its second end inputs the DC low-voltage signal Vss;Described
The first end of 15 thin film transistor (TFT)s (T63) inputs the second low frequency signal LC2, its second end is brilliant with the 16th film
The first end of body pipe (T64), the control terminal of the 17th thin film transistor (TFT) (T43) and the 18th thin film transistor (TFT) (T33)
Control terminal be electrically connected;The control terminal of 16th thin film transistor (TFT) (T64) electrically connects with the pull-up control signal point Q
Connect, for inputting the pull-up control signal Q (n), its second end inputs the DC low-voltage signal Vss;Described 17th is thin
The first end of film transistor (T43) inputs the DC low-voltage signal Vss, its second end and the pull-up control signal point Q electricity
Property connection, for according to the second low frequency signal LC2 and DC low-voltage signal Vss by the pull-up control signal Q (n)
Maintain in off position;The first end of 18th thin film transistor (TFT) (T33) inputs the DC low-voltage signal Vss, it the
Two ends are electrically connected with the horizontal scanning line G, for according to the second low frequency signal LC2 and the DC low-voltage signal
Vss maintains n-th grade of scanning drive signal G (n) in off position.
7. GOA circuits as claimed in claim 6, it is characterised in that the pull-up control signal point Q passes through one second capacitance
(Cb) it is electrically connected with the horizontal scanning line G.
8. such as claim 1 to 6 any one of them GOA circuits, it is characterised in that the first low frequency signal LC1 and described
The signal period of second low frequency signal LC2 is 2 times of frame periods, duty cycle 1/2, and the first low frequency signal LC1 and described
Phase difference between second low frequency signal LC2 was 1/2 signal period.
9. GOA circuits as claimed in claim 6, it is characterised in that the first drop-down holding circuit and second drop-down
The operating point current potential of holding circuit for pull-up control signal Q (n) low potential and the first low frequency signal LC1 high potentials with
And pull-up control signal Q (n) low potential and the second low frequency signal LC2 high potentials.
10. a kind of liquid crystal display device, it is characterised in that be used for liquid crystal display including such as claim 1 to 9 any one of them
GOA circuits.
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