CN1087499C - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN1087499C CN1087499C CN97116265A CN97116265A CN1087499C CN 1087499 C CN1087499 C CN 1087499C CN 97116265 A CN97116265 A CN 97116265A CN 97116265 A CN97116265 A CN 97116265A CN 1087499 C CN1087499 C CN 1087499C
- Authority
- CN
- China
- Prior art keywords
- trap
- memory cell
- substrate
- well
- triple
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 74
- 238000004519 manufacturing process Methods 0.000 title description 18
- 239000000758 substrate Substances 0.000 claims abstract description 113
- 238000000034 method Methods 0.000 claims description 41
- 150000002500 ions Chemical class 0.000 claims description 32
- 230000002093 peripheral effect Effects 0.000 claims description 31
- 238000002347 injection Methods 0.000 claims description 27
- 239000007924 injection Substances 0.000 claims description 27
- 230000008569 process Effects 0.000 claims description 20
- 239000012535 impurity Substances 0.000 claims description 17
- 230000015572 biosynthetic process Effects 0.000 claims description 11
- 239000012492 regenerant Substances 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 2
- 230000004888 barrier function Effects 0.000 description 42
- 230000001133 acceleration Effects 0.000 description 34
- 108010063955 thrombin receptor peptide (42-47) Proteins 0.000 description 26
- 238000002513 implantation Methods 0.000 description 8
- 238000009413 insulation Methods 0.000 description 7
- 230000008901 benefit Effects 0.000 description 4
- 230000005012 migration Effects 0.000 description 4
- 238000013508 migration Methods 0.000 description 4
- 230000008929 regeneration Effects 0.000 description 4
- 238000011069 regeneration method Methods 0.000 description 4
- 230000002459 sustained effect Effects 0.000 description 4
- 239000002800 charge carrier Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 230000005516 deep trap Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- -1 phosphonium ion Chemical class 0.000 description 2
- LENZDBCJOHFCAS-UHFFFAOYSA-N tris Chemical compound OCC(N)(CO)CO LENZDBCJOHFCAS-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000009415 formwork Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823892—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (12)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP234859/96 | 1996-09-05 | ||
JP23485996 | 1996-09-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1175796A CN1175796A (zh) | 1998-03-11 |
CN1087499C true CN1087499C (zh) | 2002-07-10 |
Family
ID=16977474
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN97116265A Expired - Lifetime CN1087499C (zh) | 1996-09-05 | 1997-09-05 | 半导体装置及其制造方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US6066522A (zh) |
EP (1) | EP0831518B1 (zh) |
JP (1) | JP3031880B2 (zh) |
KR (1) | KR100286969B1 (zh) |
CN (1) | CN1087499C (zh) |
DE (1) | DE69735323T2 (zh) |
TW (1) | TW362275B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104637796A (zh) * | 2013-11-07 | 2015-05-20 | 富士通半导体股份有限公司 | 半导体器件制造方法和半导体器件 |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100260559B1 (ko) * | 1997-12-29 | 2000-07-01 | 윤종용 | 비휘발성 메모리 장치의 웰 구조 및 그 제조 방법 |
KR100282706B1 (ko) * | 1998-07-07 | 2001-03-02 | 윤종용 | 반도체 장치의 제조 방법 |
JP3733252B2 (ja) * | 1998-11-02 | 2006-01-11 | セイコーエプソン株式会社 | 半導体記憶装置及びその製造方法 |
JP4517410B2 (ja) * | 1998-11-25 | 2010-08-04 | エルピーダメモリ株式会社 | 半導体装置 |
US6144076A (en) * | 1998-12-08 | 2000-11-07 | Lsi Logic Corporation | Well formation For CMOS devices integrated circuit structures |
JP3348782B2 (ja) | 1999-07-22 | 2002-11-20 | 日本電気株式会社 | 半導体装置の製造方法 |
US20040053439A1 (en) * | 2002-09-17 | 2004-03-18 | Infineon Technologies North America Corp. | Method for producing low-resistance ohmic contacts between substrates and wells in CMOS integrated circuits |
US7442996B2 (en) | 2006-01-20 | 2008-10-28 | International Business Machines Corporation | Structure and method for enhanced triple well latchup robustness |
US20150364475A1 (en) * | 2013-01-28 | 2015-12-17 | Yasushi Yamazaki | Semiconductor device and method for producing same |
KR101450436B1 (ko) * | 2013-03-04 | 2014-10-13 | 주식회사 동부하이텍 | 반도체 소자의 웰 형성 방법 |
JP2014207361A (ja) * | 2013-04-15 | 2014-10-30 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
CN105336691B (zh) * | 2014-07-31 | 2018-06-15 | 无锡华润上华科技有限公司 | 阱区制备方法 |
WO2016138924A1 (en) | 2015-03-02 | 2016-09-09 | Arcelik Anonim Sirketi | A laundry machine with an improved fluid distribution load balance system |
US9831134B1 (en) * | 2016-09-28 | 2017-11-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing a semiconductor device having deep wells |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0245515A1 (en) * | 1985-11-20 | 1987-11-19 | Hitachi, Ltd. | Semiconductor device |
CN1119347A (zh) * | 1994-06-08 | 1996-03-27 | 现代电子产业株式会社 | 半导体器件及其制造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5354699A (en) * | 1987-05-13 | 1994-10-11 | Hitachi, Ltd. | Method of manufacturing semiconductor integrated circuit device |
JPH01161752A (ja) * | 1987-12-18 | 1989-06-26 | Toshiba Corp | 半導体装置製造方法 |
US5116777A (en) * | 1990-04-30 | 1992-05-26 | Sgs-Thomson Microelectronics, Inc. | Method for fabricating semiconductor devices by use of an N+ buried layer for complete isolation |
JP2965783B2 (ja) * | 1991-07-17 | 1999-10-18 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
JPH05198666A (ja) * | 1991-11-20 | 1993-08-06 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US5475335A (en) * | 1994-04-01 | 1995-12-12 | National Semiconductor Corporation | High voltage cascaded charge pump |
US5501993A (en) * | 1994-11-22 | 1996-03-26 | Genus, Inc. | Method of constructing CMOS vertically modulated wells (VMW) by clustered MeV BILLI (buried implanted layer for lateral isolation) implantation |
JP2776350B2 (ja) * | 1995-12-18 | 1998-07-16 | 日本電気株式会社 | 半導体集積回路装置の製造方法 |
-
1997
- 1997-09-03 DE DE69735323T patent/DE69735323T2/de not_active Expired - Lifetime
- 1997-09-03 TW TW86112697A patent/TW362275B/zh not_active IP Right Cessation
- 1997-09-03 EP EP97115246A patent/EP0831518B1/en not_active Expired - Lifetime
- 1997-09-04 US US08/923,134 patent/US6066522A/en not_active Expired - Lifetime
- 1997-09-04 JP JP9240078A patent/JP3031880B2/ja not_active Expired - Lifetime
- 1997-09-05 CN CN97116265A patent/CN1087499C/zh not_active Expired - Lifetime
- 1997-09-06 KR KR1019970045999A patent/KR100286969B1/ko not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0245515A1 (en) * | 1985-11-20 | 1987-11-19 | Hitachi, Ltd. | Semiconductor device |
CN1119347A (zh) * | 1994-06-08 | 1996-03-27 | 现代电子产业株式会社 | 半导体器件及其制造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104637796A (zh) * | 2013-11-07 | 2015-05-20 | 富士通半导体股份有限公司 | 半导体器件制造方法和半导体器件 |
CN104637796B (zh) * | 2013-11-07 | 2018-02-02 | 富士通半导体股份有限公司 | 半导体器件制造方法和半导体器件 |
Also Published As
Publication number | Publication date |
---|---|
EP0831518B1 (en) | 2006-03-01 |
JP3031880B2 (ja) | 2000-04-10 |
KR19980024386A (ko) | 1998-07-06 |
TW362275B (en) | 1999-06-21 |
JPH10135351A (ja) | 1998-05-22 |
CN1175796A (zh) | 1998-03-11 |
KR100286969B1 (ko) | 2001-04-16 |
EP0831518A1 (en) | 1998-03-25 |
US6066522A (en) | 2000-05-23 |
DE69735323D1 (de) | 2006-04-27 |
DE69735323T2 (de) | 2006-11-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1087499C (zh) | 半导体装置及其制造方法 | |
CN1079996C (zh) | 高压金属氧化物硅场效应晶体管结构 | |
CN1282253C (zh) | 具有小袋的半导体器件及其制造 | |
KR101125608B1 (ko) | 전력용 반도체장치의 제조방법 | |
CN1713394A (zh) | 具有逆行井的高电压元件及其制造方法 | |
CN1599045A (zh) | 具有横向漂移区掺杂剂分布的dmos晶体管的制造方法 | |
CN1658400A (zh) | 半导体装置及其制造方法 | |
CN1658391A (zh) | 纵向双极型晶体管及其制造方法 | |
CN1154570A (zh) | 用改进的小型区抑制何短沟道的mos晶体管及其制造方法 | |
CN1841778A (zh) | 半导体器件中的场效应晶体管及其制造方法 | |
CN100341140C (zh) | 半导体器件及其制造方法 | |
CN1331840A (zh) | 用于制造包括一个非对称场效应晶体管的半导体器件的方法 | |
CN1806341A (zh) | 场效应晶体管,特别是双扩散场效应晶体管,及其制造方法 | |
CN1521857A (zh) | 半导体装置及其制造方法 | |
CN1469478A (zh) | 半导体集成电路及其制造方法 | |
CN1095595C (zh) | 半导体器件的制造方法 | |
CN100444403C (zh) | 半导体器件及其制造方法 | |
CN1523676A (zh) | 半导体装置 | |
CN1523675A (zh) | 半导体器件及其制造方法 | |
CN1287454C (zh) | 半导体装置及其制造方法 | |
CN1889250A (zh) | 利用独立的源极形成的cmos图像传感器件和方法 | |
CN1126178C (zh) | 静态随机存取存储器光电管结构及其制造方法 | |
CN1226084A (zh) | 半导体器件及其制造方法 | |
CN1753184A (zh) | 半导体器件 | |
CN1199926A (zh) | 一种半导体器件的制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: PANASONIC ELECTRIC EQUIPMENT INDUSTRIAL CO.,LTD. Free format text: FORMER OWNER: MATSUSHITA ELECTRONICS CORP. Effective date: 20010901 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20010901 Applicant after: Matsushita Electric Industrial Co., Ltd. Applicant before: Matsushita Electronics Corp. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: INTELLECTUAL PROPERTY BRIDGE NO. 1 CO., LTD. Free format text: FORMER OWNER: MATSUSHITA ELECTRIC INDUSTRIAL CO, LTD. Effective date: 20140609 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20140609 Address after: Tokyo, Japan, Japan Patentee after: GODO KAISHA IP BRIDGE 1 Address before: Osaka Patentee before: Matsushita Electric Industrial Co., Ltd. |
|
CX01 | Expiry of patent term |
Granted publication date: 20020710 |
|
CX01 | Expiry of patent term |