CN108627764A - Bank safety chip automatization test system and its control method - Google Patents
Bank safety chip automatization test system and its control method Download PDFInfo
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- CN108627764A CN108627764A CN201710167458.XA CN201710167458A CN108627764A CN 108627764 A CN108627764 A CN 108627764A CN 201710167458 A CN201710167458 A CN 201710167458A CN 108627764 A CN108627764 A CN 108627764A
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- 238000012360 testing method Methods 0.000 title claims abstract description 241
- 238000000034 method Methods 0.000 title claims abstract description 17
- 230000002950 deficient Effects 0.000 claims description 30
- 230000037007 arousal Effects 0.000 claims description 4
- 238000004891 communication Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 3
- 238000005086 pumping Methods 0.000 claims description 3
- 235000013399 edible fruits Nutrition 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 102100022299 All trans-polyprenyl-diphosphate synthase PDSS1 Human genes 0.000 description 2
- 101150115672 DPS1 gene Proteins 0.000 description 2
- 101150063720 PDSS1 gene Proteins 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004353 relayed correlation spectroscopy Methods 0.000 description 2
- 238000012216 screening Methods 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 230000009471 action Effects 0.000 description 1
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- 238000005259 measurement Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000004801 process automation Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/36—Sorting apparatus characterised by the means used for distribution
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention discloses a kind of bank safety chip automatization test system and its control methods, the system includes V50 test machines, test DUT and manipulator, manipulator is arranged on V50 test machines, V50 test machines are connect with test DUT, test DUT is connect with chip to be measured, and manipulator is connect with chip to be measured；Power supply and digital signal are sent to chip to be measured by V50 test machines by testing DUT, and the test result information of return is sent to V50 test machines by chip to be measured by testing DUT；Chip to be measured is placed into test section by V50 test machines control machinery hand, and V50 test machines test chip to be measured, and test result is returned to manipulator by V50 test machines, and manipulator carries out fine or not classification according to the test result received to chip to be measured.
Description
Technical field
The invention belongs to the technical fields of bank's chip test system, more particularly to bank safety chip automatic test system
System and its control method.
Background technology
Chip bank card, also known as financial IC card are the bank cards using chip as medium.Chip card capacity is big, work
Principle is similar to microcomputer, can be provided simultaneously with multiple functions.Chip bank card is divided into as pure chip card and magnetic stripe chip
Composite card.
The existing usual test process of bank's chip test system is complicated, cannot achieve automation, needs manual intervention, surveys
Try inefficiency.
The automatization test system of this case mainly provides testing service, test machine and test circuit for bank safety chip
It is connected to chip to be measured by DUT, it can be achieved that the test to single chip can be to peace of trying to be the first after test machine connects manipulator
Full chip carries out automatic mass test, and test result test machine tested after electrical parameter preserves, while by core
Defective products in piece screens, and non-defective unit and defective products is respectively put into different TRAY disks at this end of manipulator.
Invention content
To solve the above problems, the purpose of the present invention is to provide a kind of bank safety chip automatization test system and its
Control method, the test system using the cooperation of V50 test machines and manipulator simulate the actual working environment of chip to be measured,
The DC parameter and alternating-current parameter of chip to be measured are tested, to keep the parameters of each chip normal, and per phase
The consistency adjustment of parameter is to optimal.
It is another object of the present invention to provide a kind of bank safety chip automatization test system, the test system energy
Enough carrying out non-defective unit divides BIN and defective products to divide BIN.
It is another object of the present invention to provide a kind of control methods of bank safety chip automatization test system, survey
It is high to try process automation degree, and testing efficiency is high.
To achieve the above object, technical scheme is as follows.
A kind of bank safety chip automatization test system, including V50 test machines, test DUT and manipulator, the machinery
Hand is arranged on V50 test machines, and the V50 test machines are connect with test DUT, and the test DUT is connect with chip to be measured, and institute
Manipulator is stated to connect with chip to be measured；Power supply and digital signal are sent to core to be measured by the V50 test machines by testing DUT
Piece, and the test result information of return is sent to V50 test machines by chip to be measured by testing DUT；The V50 test machines control
Chip to be measured is placed into test section by manipulator, and the V50 test machines test chip to be measured, and the V50 test machines will
Test result returns to manipulator, and the manipulator carries out fine or not classification according to the test result received to chip to be measured.
The V50 test machines are equipped with power module and digital channel module, the power module and digital channel module
It is connect with test DUT, the V50 test machines give chip power supply to be measured by power module and test DUT, and the V50 is surveyed
Test-run a machine applies corresponding pumping signal by digital channel module and test DUT to chip to be measured.The V50 test machines test waits for
The parameters for surveying chip, quality and the classification of chip to be measured are judged according to test result, defective products Effective selection is come out.
Test platform, cylinder, guide rail and holder are additionally provided on the V50 test machines, the test section setting is flat in test
On platform, the guide rail and holder are arranged in the top of test section, and the upper end of the manipulator is arranged on holder, and the cylinder is logical
It crosses guide rail to connect with carriage drive, and the holder moves on guide rail.
Further, the lower end of the manipulator is equipped with sucker, and the cylinder is drivingly connected with sucker, and the sucker is used
In to the chip feeding and sub-material to be measured on test section.
Further, the supply voltage of the power module is one kind in 3.3V, 5V, 5.5V or 2.7V.
A kind of control method of bank safety chip automatization test system, which is characterized in that include the following steps：
Step 1, V50 test machines are connect with test DUT, and test DUT is connect with manipulator；
Step 2, start test system, corresponding test software is transferred, into test；
Step 3, V50 test machines are connected, the communication between manipulator is established；
Step 4, start manipulator, follow-on test is carried out to chip to be measured；
Step 5, after manipulator tests a chip to be measured, next chips are automatically switched to, until test is completed.
Further, in the step 4, if the chip to be measured of manipulator test is non-defective unit, non-defective unit is placed into non-defective unit area；
If the chip to be measured of manipulator test is defective products, defective products is placed into bad area.
Further, in the step 4, manipulator to the test event of chip to be measured include chip pin open short circuit whether
Normally, whether normal, chip the TX of whether normal, chip the function of whether normal, chip the LDO outputs of the enclosing function of chip
Whether normal, chip the RAM work(of whether normal, chip the FLASH functions of whether normal, chip the RNG functions of foot output waveform
Can whether normal, chip the GOOD DIE functions of whether normal, chip the USB functions of whether normal, chip ARITH functions be
No normal, whether normal, chip the drive of whether normal, chip the IPD electric currents of whether normal, chip the arousal function of electric leakage parameter
Whether whether normal and chip the ICC electric currents of dynamic parameter are normal.
The bank safety chip automatization test system and its control method that the present invention is realized by V50 test machines, are surveyed
The cooperation for trying DUT and manipulator, simulates the actual working environment of chip to be measured, to the DC parameter and alternating-current parameter of chip to be measured
It is tested, to keep the parameters of each chip to be measured normal, and per the consistency adjustment of phase parameter to optimal；Again
Person, manipulator judge the quality of chip to be measured according to test result, and defective products Effective selection is come out, and non-defective unit are placed into good
Product area, defective products are placed into bad area, realize the automatic test to bank safety chip and screening.
Description of the drawings
Fig. 1 is the block diagram for the bank safety chip automatization test system that the present invention is implemented；
Fig. 2 is the structural schematic diagram for the bank safety chip automatization test system that the present invention is implemented；
The flow chart of the control method for the bank safety chip automatization test system that Fig. 3 is implemented for the present invention.
Specific implementation mode
In order to make the purpose , technical scheme and advantage of the present invention be clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
It is shown in Figure 1, for the bank safety chip automatization test system that the present invention is realized, including V50 test machines
1, DUT2 and manipulator 3 are tested, manipulator 3 is arranged on V50 test machines 1, and V50 test machines 1 are connect with test DUT2, are tested
DUT2 is connect with chip to be measured, and manipulator 3 is connect with chip to be measured；V50 test machines 1 are by testing DUT2 power supply and number
Signal is sent to chip to be measured, and the test result information of return is sent to V50 test machines 1 by chip to be measured by testing DUT；
Chip to be measured is placed into test section 15 by 1 control machinery hand 3 of V50 test machines, and V50 test machines 1 test chip to be measured,
Test result is returned to manipulator 3 by V50 test machines 1, and manipulator 3 carries out chip to be measured according to the test result received
Quality classification.
V50 test machines 1 are equipped with power module and digital channel module, power module and number channel module with test
DUT2 connections, V50 test machines 1 give chip power supply to be measured by power module and test DUT2, and V50 test machines 1 pass through number
Channel module and test DUT2 apply corresponding pumping signal to chip to be measured.V50 test machines 1 test every ginseng of chip to be measured
Number, the quality of chip to be measured is judged according to test result, defective products Effective selection is come out.Digital channel module mainly realizes hair
The signal for sending data command to be fed back to chip to be tested and reception chip to be tested.
Referring to Fig. 2, being additionally provided with test platform 11, cylinder 12, guide rail 13 and holder 14, test section 15 on V50 test machines 1
It is arranged on test platform 11, guide rail 13 and holder 14 are arranged in the top of test section 15, and the upper end of manipulator 3 is arranged in holder
On 14, cylinder 12 is drivingly connected by guide rail 13 and holder 14, and holder 14 moves on guide rail 13.
The lower end of manipulator 3 is equipped with sucker 5, and cylinder 12 is drivingly connected with sucker 5, and sucker 5 is used for test section 15
Chip feeding and sub-material to be measured.
The supply voltage of power module is one kind in 3.3V, 5V, 5.5V or 2.7V.
In this test system, V50 test machines 1 have mainly used power module and digital channel module, and power module can
To provide the power supply of fixed output, such as+5V/+15V/-15V/+19V, these feet after the power is turned on can one in V50 test machines 1
The voltage of the straight corresponding numerical value of output, numerical value are unadjustable.Relay control bit signal can control user's relay.
Programmable power supply output may be implemented in power module, and the free voltage between 0-15V may be implemented in the programmable power supply in two tunnels
Output, and the output current of the power supply can be measured simultaneously, this function needs just have phase when testing results program
The voltage output answered.
In this test system, the fixed power source and the programmable power supplys of DPS1 of+5V are used, the power supply of+5V passes through test
Interface on DUT2 is powered to RELAY, ensures that RELAY is not powered off during the test, in addition 1 programmable power supply DPS1 passes through
Test DUT2 is connected to the supply pin of chip to be measured, realizes the power supply to chip to be measured and the power supply under different mode state
The accurate measurement of electric current.
Test DUT2 is the interface of V50V50 test machines 1 and chip to be tested, and V50 test machines 1 are by testing DUT2 electricity
Source and digital signal give chip to be tested, and chip to be tested is given V50 by DUT the test result information of return and tested again
Machine 1 thereby realizes the test communication between V50 test machines 1 and chip to be tested.
Manipulator 3 plays feeding, and connection, material-distributing action, chip to be measured is put into test section 15 by it, and concurrent enabling signal is given to
V50 test machines 1, V50 test machines 1 are tested, and V50 test machines 1 return again to the result information of test to manipulator 3, machinery
Chip is carried out fine or not classification by hand 3 by the result information received.
Referring to Fig. 3, a kind of control method of bank safety chip automatization test system, includes the following steps：
V50 test machines connect with test DUT, and test DUT are connect with manipulator by step S1；
Step S2 starts test system, corresponding test software is transferred, into test；
Step S3 connects V50 test machines, establishes the communication between manipulator；
Step S4 starts manipulator, and follow-on test is carried out to chip to be measured；
Step S5 automatically switches to next chips after manipulator tests a chip to be measured, until test is completed.
In step S4, if the chip to be measured of manipulator test is non-defective unit, non-defective unit is placed into non-defective unit area；If manipulator is surveyed
The chip to be measured of examination is defective products, then defective products is placed into bad area.
In step S4, manipulator includes that chip pin opens whether short circuit normal, chip to the test event of chip to be measured
Whether enclosing function normal, whether normal, chip the TX foot output waves of chip whether normal, chip the function of LDO outputs
Just whether normal, chip the RAM functions of whether normal, chip the FLASH functions of whether normal, chip the RNG functions of shape
Often, whether the ARITH functions of chip normal, whether chip whether normal, chip the GOOD DIE functions of USB functions normal,
Whether normal, chip the driving parameter of whether normal, chip the IPD electric currents of whether normal, chip the arousal function of parameter of leaking electricity
Whether whether normal and chip ICC electric currents are normal.
The specific test event flow of the control method of the bank safety chip automatization test system of the present invention is described as：
1) V50 test machines give the protection diode of the pin of the testing current chip of +/- 100uA to power supply and over the ground special
Property, judge whether opening for the pin of chip be short-circuit normal by reading diode turn-on voltage.
2) V50 test machines run vector to chip for 5.0V voltages with the frequency of 1MHZ, according to the result of operation vector come
Judge whether the enclosing function of chip is normal.
3) it gives ARM plates for 3.3V voltages, ARM plates is resetted, BOOT is carried out back to chip.
4) V50 test machines to chip for 5.0V/5.5V/2.7V voltages, the voltage of the LDO pins of test chip, according to survey
Whether the voltage of examination is normal to judge the LDO outputs of chip.
5) V50 test machines to chip for 3.3V voltages, with the frequency operation function vector of 100KHZ, according to the result of vector
Whether the function to judge chip is normal.
6) V50 test machines run vector, according to the result of operation vector to chip for 3.3V voltages with the frequency of 500KHZ
Whether the TX feet output waveform to judge chip is normal.
7) V50 test machines run vector, according to operation vector to chip power-down again for 3.3V voltages with the frequency of 500KHZ
Result judge whether chip RNG functions normal.
8) V50 test machines run vector, according to the result of operation vector to chip for 3.3V voltages with the frequency of 500KHZ
To judge whether chip FLASH functions are normal.
9) V50 test machines run vector, according to the result of operation vector to chip for 3.3V voltages with the frequency of 500KHZ
To judge whether chip RAM functions are normal.
10) V50 test machines run vector, according to the knot of operation vector to chip for 3.3V voltages with the frequency of 500KHZ
Whether fruit is normal to judge chip ARITH functions.
11) V50 test machines run vector, according to the knot of operation vector to chip for 3.3V voltages with the frequency of 500KHZ
Whether fruit is normal to judge chip USB functions.
12) V50 test machines run vector, according to the knot of operation vector to chip for 3.3V voltages with the frequency of 500KHZ
Whether fruit is normal to judge chip GOOD DIE functions.
13) for V50 test machines to chip for 5.0V voltages, testing results vector makes chip carry out working condition, test chip
Leakage current, according to current value judge leak electricity parameter it is whether normal.
14) V50 test machines run vector, according to the knot of operation vector to chip for 3.3V voltages with the frequency of 500KHZ
Whether fruit is normal to judge the arousal function of chip.
15) for V50 test machines to chip for 3.3V voltages, the electric current of the power supply PIN of test chip judges core according to current value
Whether the IPD electric currents of piece are normal.
16) V50 test machines give chip power supply 3.3V voltages, flat to the input pin power-up of chip that chip is made to carry out work shape
State, the driving voltage of the pin of test chip judge whether the driving parameter of chip is normal according to voltage value.
17) for V50 test machines to chip for 5.0V voltages, operation vector makes chip enter working condition, the electricity of test chip
The operating current of source PIN judges whether the ICC electric currents of chip are normal according to current value.
18) V50 test machines are to powering down chips.
19) all of above project testing passes through, and chip to be measured is determined as non-defective unit, is otherwise judged to defective products.
In short, bank safety chip automatization test system and its control method that the present invention is realized, are tested by V50
Machine, the cooperation for testing DUT and manipulator, simulate the actual working environment of chip to be measured, the DC parameter to chip to be measured and friendship
Stream parameter is tested, to keep the parameters of each chip to be measured normal, and per the consistency adjustment of phase parameter to most
It is excellent；Furthermore manipulator judges the quality of chip to be measured according to test result, defective products Effective selection is come out, and non-defective unit is put
Non-defective unit area is set, defective products is placed into bad area, realizes the automatic test to bank safety chip and screening.
And the control method high degree of automation, and testing efficiency is high.
The above is merely preferred embodiments of the present invention, be not intended to limit the invention, it is all the present invention spirit and
All any modification, equivalent and improvement made by within principle etc., should all be included in the protection scope of the present invention.
Claims (8)
1. a kind of bank safety chip automatization test system, which is characterized in that the system include V50 test machines, test DUT and
Manipulator, the manipulator are arranged on V50 test machines, and the V50 test machines are connect with DUT is tested, the test DUT with wait for
Chip connection is surveyed, and the manipulator is connect with chip to be measured；The V50 test machines believe power supply and number by testing DUT
It number is sent to chip to be measured, and the test result information of return is sent to V50 test machines by chip to be measured by testing DUT；Institute
It states V50 test machines control machinery hand and chip to be measured is placed into test section, the V50 test machines test chip to be measured,
Test result is returned to manipulator by the V50 test machines, and the manipulator according to the test result received to core to be measured
Piece is classified.
2. bank safety chip automatization test system as described in claim 1, which is characterized in that on the V50 test machines
Equipped with power module and digital channel module, the power module and digital channel module are connect with test DUT, the V50
Test machine gives chip power supply to be measured by power module and test DUT, and the V50 test machines pass through digital channel module and survey
It tries DUT and corresponding pumping signal is applied to chip to be measured, the V50 test machines test the parameters of chip to be measured, according to survey
Test result judges the quality of chip to be measured and classification.
3. bank safety chip automatization test system as described in claim 1, which is characterized in that on the V50 test machines
It is additionally provided with test platform, cylinder, guide rail and holder, the test section is arranged on test platform, the guide rail and holder setting
The upper end of top in test section, the manipulator is arranged on holder, and the cylinder is connect by guide rail with carriage drive, and
The holder moves on guide rail.
4. bank safety chip automatization test system as claimed in claim 3, which is characterized in that the lower end of the manipulator
Equipped with sucker, the cylinder is drivingly connected with sucker, and the sucker is used for the chip feeding and sub-material to be measured on test section.
5. bank safety chip automatization test system as claimed in claim 2, which is characterized in that the confession of the power module
Piezoelectric voltage is one kind in 3.3V, 5V, 5.5V or 2.7V.
6. a kind of control method of bank safety chip automatization test system, which is characterized in that include the following steps：
Step 1, V50 test machines are connect with test DUT, and test DUT is connect with manipulator；
Step 2, start test system, corresponding test software is transferred, into test；
Step 3, V50 test machines are connected, the communication between manipulator is established；
Step 4, start manipulator, follow-on test is carried out to chip to be measured；
Step 5, after manipulator tests a chip to be measured, next chips are automatically switched to, until test is completed.
7. the control method of bank safety chip automatization test system as claimed in claim 6, which is characterized in that the step
In rapid 4, if the chip to be measured of manipulator test is non-defective unit, non-defective unit is placed into non-defective unit area；If the core to be measured of manipulator test
Piece is defective products, then defective products is placed into bad area.
8. the control method of bank safety chip automatization test system as claimed in claim 6, which is characterized in that the step
In rapid 4, manipulator is to whether normal, chip the enclosing function of short circuit of opening that the test event of chip to be measured includes chip pin
Whether normal, chip the TX feet output waveform of no normal, chip whether normal, chip the function of LDO outputs whether normal, core
Whether normal, chip the ARITH of whether normal, chip the RAM functions of whether normal, chip the FLASH functions of the RNG functions of piece
Whether function normal, whether chip whether normal, chip the GOOD DIE functions of USB functions normal, electric leakage parameter whether just
Often, whether the arousal function of chip normal, whether normal, chip the driving parameter of IPD electric currents of chip whether normal and chip
ICC electric currents it is whether normal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710167458.XA CN108627764A (en) | 2017-03-21 | 2017-03-21 | Bank safety chip automatization test system and its control method |
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| CN109857600A (en) * | 2018-12-28 | 2019-06-07 | 上海华岭集成电路技术股份有限公司 | A method of optimization integrated circuit screening |
| CN110661583A (en) * | 2019-11-13 | 2020-01-07 | 青岛联众智芯科技有限公司 | Carrier chip test system |
| CN113552467A (en) * | 2021-06-28 | 2021-10-26 | 苏州裕太微电子有限公司 | Device and method for testing functions of chip system |
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