CN108565216A - The reworking method of dual damascene via technique - Google Patents
The reworking method of dual damascene via technique Download PDFInfo
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- CN108565216A CN108565216A CN201810544851.0A CN201810544851A CN108565216A CN 108565216 A CN108565216 A CN 108565216A CN 201810544851 A CN201810544851 A CN 201810544851A CN 108565216 A CN108565216 A CN 108565216A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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Abstract
The invention discloses a kind of reworking methods of dual damascene via technique, include the following steps：Step 1: the through-hole of dual damascene passes through the first low K dielectric layer, it is formed with the second darc layer on the first low K dielectric layer, patterned third metal hard mask layer is formed on the surface of the second darc layer；The three-decker for defining through-hole based on coating made of coating is added by ODL layers, SHB layers and PR stackings on the second darc layer for be formed with third metal hard mask layer.Step 2: carrying out the photoetching development of through-hole.Step 3: being detected after being developed, the rework preocess of three-decker is removed when detecting over range after development；It all uses dry etch process removal and is removed successively in same dry etching equipment for PR layers, SHB layers and ODL layers in rework preocess.The present invention can reduce the step of rework preocess, improve do over again efficiency and quality.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit manufacture methods, more particularly to a kind of dual damascene (Dual
Damsecene, DD) through-hole (VIA) technique reworking method.
Background technology
As shown in Figure 1, being the device architecture schematic diagram finished in existing dual damascene via technique after through-hole development；It is existing
There is method after through-hole development if it find that abnormal, can do over again, the step of existing rework preocess includes：
Step 1: as shown in Figure 1, the through-hole of dual damascene passes through the first low K dielectric layer 4, in the described first low dielectric
The second dielectric antireflective coatings (DARC) layer 5, the shape on the surface of second darc layer 5 are formed on constant (K) dielectric layer 4
At there is patterned third metal hard mask layer 7.
The mask arrangement for defining the through-hole includes the three-decker based on coating, and three-decker is respectively organic underlayer knot
Structure (Organic Under Layer, ODL) layer 9, siloxy hard mask interlayer structure (Si-O-based Hard Mask,
SHB) layer 10 and photoresist (PR) layer 11.
It is coated with the three-decker on second darc layer 5 for being formed with the third metal hard mask layer 7.
The material of first low K dielectric layer 4 includes BD or BD II.In 65nm nodes processing procedure below, low K dielectric layer
Material generally use BD and BD II, BD is by C, H, O, and the dielectric material of the elements such as Si composition, K values are 2.5~3.3.BDⅡ
It is the modified version that BD has changed.
Second darc layer 5 is different for the DARC of SiON or nitrogen-free anti-reflection coating (NFDARC) and SiON compositions,
It is not nitrogenous in NFDARC.
The second nitrogen doped silicon carbide (N is formed between second darc layer 5 and first low K dielectric layer 4
Doped SiC, NDC) layer (not shown).
The third metal hard mask layer 7 is TiN, in the TiN and the 2nd DARC of the third metal hard mask layer 7
It is formed with Ti i.e. Ti layers 6 between layer 5；It is formed with oxide layer 8 in the top surface of the TiN of the third metal hard mask layer 7；Institute
The third metal hard mask layer 7 for stating through-hole forming region is opened and directly exposes the surface of second darc layer 5.
For the ODL layers 9 using carbon coating (Spin-On-Carbon, SOC), SOC is the polymer of high-carbon content, described
SHB layers 10 are using silicon bottom antireflective coating (BARC).
First low K dielectric layer 4 is formed in 3 surface of the first NDC layers, and the first NDC layers 3 are formed in semiconductor substrate
Surface is formed with bottom metal layer 2 on the semiconductor substrate, and being isolated between the bottom metal layer 2 has bottom dielectric film
1.1 generally use SiCOH of the bottom dielectric film.
First low K dielectric layer 4 is contacted by TEOS layers of (not shown) and 3 surface of the first NDC layers.TEOS layers are
The silicon oxide layer formed using the sources TEOS effect Si, TEOS layers of K values are 3.9~4.2, are higher than the K values of BD.
Step 2: the photoetching development of the through-hole is carried out, by the formation area of the through-hole in the PR floor 11 after development
It opens in domain.
Step 3: detecting (ADI) after being developed, the three-layered node is removed when detecting over range after the development
The rework preocess of structure.
The step of existing rework preocess includes：
Described PR layers of photoresist decrement (Resist Reduction Coating, RRC) technique dissolving removal is used first
11。
Later, it needs to carry out wafer cassette (Foup) replacement, replaces and arrive the corresponding Foup of process for copper.
Later, the SHB layers 10 are removed using dry etch process.
Later, the ODL layers 9 are removed using dry etch process.
It carries out again later as follows：
Carry out wet-cleaning；
Carry out Wafer Backside Cleaning.
From the foregoing, it will be observed that in existing rework preocess, the technique for removing three-decker is discontinuous, needs three separated steps point
It does not carry out, this can make the complex process for removing three-decker, and the process time is longer, less efficient, and technological effect can also reduce.
Invention content
Technical problem to be solved by the invention is to provide a kind of reworking methods of dual damascene via technique, can reduce
The step of rework preocess, improves do over again efficiency and quality.
In order to solve the above technical problems, the reworking method of dual damascene via technique provided by the invention includes following step
Suddenly：
Step 1: the through-hole of dual damascene passes through the first low K dielectric layer, it is formed on first low K dielectric layer
Second darc layer is formed with patterned third metal hard mask layer on the surface of second darc layer.
The mask arrangement for defining the through-hole includes the three-decker based on coating, and three-decker is respectively ODL layers, SHB
Layer and PR layers.
It is coated with the three-decker on second darc layer for being formed with the third metal hard mask layer.
Step 2: the photoetching development of the through-hole is carried out, by the forming region of the through-hole in the PR layers after development
It opens.
Step 3: being detected after being developed, the three-decker is removed when detecting over range after the development
Rework preocess；It removes described in the rework preocess of the three-decker PR layers, described SHB layers and described ODL layers and all uses dry method
Etching technics removes and is removed successively in same dry etching equipment.
A further improvement is that the etching gas for removing PR layers of the dry etching in step 3 uses the gas based on O2
Body.
A further improvement is that the rf frequency for removing PR layers of the dry etching in step 3 is 60MHZ.
A further improvement is that the etching gas that SHB layers of the dry etching is removed in step 3 use based on CF4 and
The gas of CHF3.
A further improvement is that the rf frequency for removing SHB layers of the dry etching in step 3 uses bifrequency, lead to
The pressure for overregulating dry etching adjusts the uniformity of etching, when removing the end condition use of SHB layers of the dry etching
Between control or using end point determination control.
A further improvement is that the etching gas that ODL layers of the dry etching is removed in step 3 use based on O2 or
Gas based on N2 and H2.
A further improvement is that the rf frequency for removing ODL layers of the dry etching in step 3 is 60MHZ, pass through
The pressure for adjusting dry etching adjusts the uniformity of etching.
A further improvement is that in the rework preocess of step 3, the three-decker is being removed using dry etching
Further include later：
Carry out wet-cleaning；
Carry out Wafer Backside Cleaning.
A further improvement is that the material of first low K dielectric layer includes BD or BD II.
A further improvement is that second darc layer is SiON or NFDARC.
A further improvement is that being formed with the 2nd NDC between second darc layer and first low K dielectric layer
Layer.
A further improvement is that the third metal hard mask layer is TiN, in the TiN of the third metal hard mask layer
It is formed with Ti between second darc layer；It is formed with oxidation in the top surface of the TiN of the third metal hard mask layer
Layer；The third metal hard mask layer of the through-hole forming region is opened and directly that the surface of second darc layer is sudden and violent
Dew.
A further improvement is that described ODL layers uses SOC, described SHB layers uses silicon BARC.
A further improvement is that first low K dielectric layer is formed in the first NDC layer surfaces, the described first NDC layers of formation
In semiconductor substrate surface, it is formed with bottom metal layer on the semiconductor substrate, being isolated between the bottom metal layer has
Bottom dielectric film.
A further improvement is that first low K dielectric layer is contacted by TEOS layers and the first NDC layer surfaces.
The present invention is in the rework preocess of the corresponding three-decker of the mask arrangement of through-hole, three-decker all uses dry method to carve
Etching technique removes and is removed successively in same dry etching equipment, so the removal of the three-decker of the present invention is equivalent to and adopts
It is completed with same dry etch step, does not need to replace dry etching equipment in dry etching, it is only necessary to carry out dry etching
Etching gas, rf frequency and pressure switch over and can be realized, therefore the step of present invention can reduce rework preocess, raising is returned
Work efficiency rate；The etching terminal of corresponding level can be monitored well in the dry etch process of the present invention, so as to carry
Height is done over again quality.
Description of the drawings
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments：
Fig. 1 is the device architecture schematic diagram finished in existing dual damascene via technique after through-hole development；
Fig. 2 is the flow chart of the reworking method of dual damascene via technique of the embodiment of the present invention；
Fig. 3 A- Fig. 3 C be the reworking method of the embodiment of the present invention it is each step by step in device architecture schematic diagram.
Specific implementation mode
As shown in Fig. 2, being the flow chart of the reworking method of dual damascene via technique of the embodiment of the present invention；Rework preocess
Shown in device architecture before please refers to Fig.1；It is each substep of the reworking method of the embodiment of the present invention as shown in Fig. 3 A to Fig. 3 C
Device architecture schematic diagram in rapid, the reworking method of dual damascene via technique of the embodiment of the present invention include the following steps：
Step 1: as shown in Figure 1, the through-hole of dual damascene passes through the first low K dielectric layer 4, in first low-K dielectric
It is formed with the second darc layer 5 on layer 4, patterned third metal hard mask is formed on the surface of second darc layer 5
Layer 7.
The mask arrangement for defining the through-hole includes the three-decker based on coating, and three-decker is respectively ODL layers 9, SHB
10 and PR of layer layers 11.
It is coated with the three-decker on second darc layer 5 for being formed with the third metal hard mask layer 7.
In the embodiment of the present invention, the material of first low K dielectric layer 4 includes BD or BD II.
Second darc layer 5 is SiON or NFDARC.
The 2nd NDC layers of (not shown) are formed between second darc layer 5 and first low K dielectric layer 4.
The third metal hard mask layer 7 is TiN, in the TiN and the 2nd DARC of the third metal hard mask layer 7
It is formed with Ti i.e. Ti layers 6 between layer 5；It is formed with oxide layer 8 in the top surface of the TiN of the third metal hard mask layer 7；Institute
The third metal hard mask layer 7 for stating through-hole forming region is opened and directly exposes the surface of second darc layer 5.
The ODL layers 9 use SOC, and the SHB layers 10 are using silicon BARC.
First low K dielectric layer 4 is formed in 3 surface of the first NDC layers, and the first NDC layers 3 are formed in semiconductor substrate
Surface is formed with bottom metal layer 2 on the semiconductor substrate, and being isolated between the bottom metal layer 2 has bottom dielectric film
1。
First low K dielectric layer 4 is contacted by TEOS layers of (not shown) and 3 surface of the first NDC layers.
Step 2: the photoetching development of the through-hole is carried out, by the formation area of the through-hole in the PR floor 11 after development
It opens in domain.
Step 3: being detected after being developed, the three-decker is removed when detecting over range after the development
Rework preocess；PR layers described in the rework preocess of the three-decker 11, SHB layers 10 and ODL layers 9 is removed all to use
Dry etch process removes and is removed successively in same dry etching equipment.
In the embodiment of the present invention, the etching gas for removing the dry etching of the PR layers 11 uses the gas based on O2.It goes
Except the rf frequency of the dry etching of the PR layers 11 is 60MHZ.Fig. 3 A are device architecture signal when removing PR layers 11
Figure.
The etching gas for removing the dry etching of the SHB layers 10 uses the gas based on CF4 and CHF3.Described in removal
The rf frequency of the dry etching of SHB layers 10 uses bifrequency, and the pressure by adjusting dry etching adjusts the uniformity of etching,
The end condition for removing the dry etching of the SHB layers 10 is controlled using time control or using end point determination.Fig. 3 B are removal
Device architecture schematic diagram when SHB layers 10.
The etching gas of the dry etching of the ODL layers 9 is removed using the gas based on O2 or based on N2 and H2.Removal institute
The rf frequency for stating the dry etching of ODL layers 9 is 60MHZ, and the pressure by adjusting dry etching adjusts the uniformity of etching.Figure
3C is device architecture schematic diagram when removing SHB layers 10.
Further include after removing the three-decker using dry etching：
Carry out wet-cleaning；
Carry out Wafer Backside Cleaning.
After above-mentioned rework preocess is completed, it can be re-formed on the basis of Fig. 3 C shown in FIG. 1 by ODL layers 9, SHB
The three-decker that 10 and PR of layer layers 11 are formed by stacking, and photoetching development again is carried out, and detected after development, until being examined after development
It surveys correct；It carries out the etching technics of subsequent through-hole after being detected correctly after development and completes the making of through-hole.Later in through-hole
Middle filling metal such as copper completes dual damascene via technique.
The present invention has been described in detail through specific embodiments, but these not constitute the limit to the present invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these are also answered
It is considered as protection scope of the present invention.
Claims (15)
1. a kind of reworking method of dual damascene via technique, which is characterized in that include the following steps：
Step 1: the through-hole of dual damascene passes through the first low K dielectric layer, second is formed on first low K dielectric layer
Darc layer is formed with patterned third metal hard mask layer on the surface of second darc layer；
The mask arrangement for defining the through-hole includes the three-decker based on coating, three-decker be respectively ODL layers, SHB layers and
PR layers；
It is coated with the three-decker on second darc layer for being formed with the third metal hard mask layer；
Step 2: carrying out the photoetching development of the through-hole, the forming region of the through-hole is opened in the PR layers after development；
Step 3: being detected after being developed, doing over again for the three-decker is removed when detecting over range after the development
Technique；It removes described in the rework preocess of the three-decker PR layers, described SHB layers and described ODL layers and all uses dry etching
Technique removes and is removed successively in same dry etching equipment.
2. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：Institute is removed in step 3
The etching gas for stating PR layers of dry etching uses the gas based on O2.
3. the reworking method of dual damascene via technique as claimed in claim 2, it is characterised in that：Institute is removed in step 3
The rf frequency for stating PR layers of dry etching is 60MHZ.
4. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：Institute is removed in step 3
The etching gas for stating SHB layers of dry etching uses the gas based on CF4 and CHF3.
5. the reworking method of dual damascene via technique as claimed in claim 4, it is characterised in that：Institute is removed in step 3
The rf frequency for stating SHB layers of dry etching uses bifrequency, and the pressure by adjusting dry etching adjusts the uniformity of etching,
The end condition for removing SHB layers of the dry etching is controlled using time control or using end point determination.
6. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：Institute is removed in step 3
The etching gas of ODL layers of dry etching is stated using the gas based on O2 or based on N2 and H2.
7. the reworking method of dual damascene via technique as claimed in claim 6, it is characterised in that：Institute is removed in step 3
The rf frequency for stating ODL layers of dry etching is 60MHZ, and the pressure by adjusting dry etching adjusts the uniformity of etching.
8. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：The described of step 3 returns
In work technique, further include after removing the three-decker using dry etching：
Carry out wet-cleaning；
Carry out Wafer Backside Cleaning.
9. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：The first low K is situated between
The material of matter layer includes BD or BD II.
10. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：2nd DARC
Layer is SiON or NFDARC.
11. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：Described second
The 2nd NDC layers are formed between darc layer and first low K dielectric layer.
12. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：The third metal
Hard mask layer is TiN, and Ti is formed between the TiN and second darc layer of the third metal hard mask layer；Described
The top surface of the TiN of third metal hard mask layer is formed with oxide layer；The third metallic hard of the through-hole forming region
Mask layer is opened and directly exposes the surface of second darc layer.
13. the reworking method of dual damascene via technique as described in claim 1, it is characterised in that：The ODL layers of use
SOC, described SHB layers uses silicon BARC.
14. the reworking method of dual damascene via technique as claimed in claim 9, it is characterised in that：The first low K is situated between
Matter layer is formed in the first NDC layer surfaces, the described first NDC layers be formed in semiconductor substrate surface, on the semiconductor substrate
It is formed with bottom metal layer, being isolated between the bottom metal layer has bottom dielectric film.
15. the reworking method of dual damascene via technique as claimed in claim 14, it is characterised in that：The first low K
Dielectric layer is contacted by TEOS layers and the first NDC layer surfaces.
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| CN111128692A (en) * | 2019-12-05 | 2020-05-08 | 上海华力集成电路制造有限公司 | Reworking process method for three-layer thin film stacking structure sheet of photoetching station |
| CN111524854A (en) * | 2020-04-27 | 2020-08-11 | 华虹半导体(无锡)有限公司 | Etching method applied to subsequent process |
| CN111584348A (en) * | 2020-05-28 | 2020-08-25 | 上海华力集成电路制造有限公司 | Reworking method of three-layer photoetching material |
| CN113130308A (en) * | 2021-03-01 | 2021-07-16 | 上海华力集成电路制造有限公司 | Method for forming ion implantation region |
| CN113394080A (en) * | 2021-05-10 | 2021-09-14 | 上海华力集成电路制造有限公司 | Method for reducing photoresist poisoning by double patterning process |
| CN113594026A (en) * | 2021-07-29 | 2021-11-02 | 上海华力微电子有限公司 | Reworking method of photoetching material and photoetching method of substrate |
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| CN111128692A (en) * | 2019-12-05 | 2020-05-08 | 上海华力集成电路制造有限公司 | Reworking process method for three-layer thin film stacking structure sheet of photoetching station |
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| CN113130308A (en) * | 2021-03-01 | 2021-07-16 | 上海华力集成电路制造有限公司 | Method for forming ion implantation region |
| CN113394080A (en) * | 2021-05-10 | 2021-09-14 | 上海华力集成电路制造有限公司 | Method for reducing photoresist poisoning by double patterning process |
| CN113594026A (en) * | 2021-07-29 | 2021-11-02 | 上海华力微电子有限公司 | Reworking method of photoetching material and photoetching method of substrate |
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