CN108399895A

CN108399895A - Display panel and its driving method, display device

Info

Publication number: CN108399895A
Application number: CN201810552445.9A
Authority: CN
Inventors: 陈亮; 王磊; 刘冬妮; 肖丽; 陈小川; 玄明花; 杨盛际; 卢鹏程; 赵德涛; 丛宁
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2018-05-31
Filing date: 2018-05-31
Publication date: 2018-08-14
Anticipated expiration: 2038-05-31
Also published as: WO2019227946A1; US11508298B2; US20210375203A1; CN108399895B

Abstract

A kind of display panel and its driving method, display device.The display panel includes the multiple sub-pixel unit groups being arranged in array, array includes rows and columns, each sub-pixel unit group includes the N number of sub-pixel unit and pixel-driving circuit being arranged along column direction, each sub-pixel unit includes illuminating circuit, pixel-driving circuit is electrically connected with the illuminating circuit in N number of sub-pixel unit, and the illuminating circuit being configured as into N number of sub-pixel unit provides light emission drive current；Display panel further includes the gating circuit being correspondingly arranged for every row sub-pixel unit group and light emitting control line, gating circuit is configured as under the control for the LED control signal that gate control signal and light emitting control line provide, and the illuminating circuit timesharing for controlling N number of sub-pixel unit in the sub-pixel unit group of corresponding row is driven by pixel-driving circuit to shine；N is the integer more than or equal to 2.The display panel can improve the resolution ratio of display.

Description

Display panel and its driving method, display device

Technical field

The embodiment of the present disclosure is related to a kind of display panel and its driving method, display device.

Background technology

Organic Light Emitting Diode (Organic Light Emitting Diode, OLED) display device is due to visual angle It is wide, contrast is high, fast response time and compared to the higher light emission luminance of inorganic light emitting displays part, lower driving voltage Etc. advantages and gradually get more and more people's extensive concerning.Due to These characteristics, Organic Light Emitting Diode (OLED) can be adapted for hand Machine, display, laptop, digital camera, instrument and meter etc. have the device of display function.

Pixel-driving circuit in OLED display generally uses matrix driving mode, is according in each pixel unit No insertion switch component be divided into active matrix (Active Matrix, AM) driving and passive matrix (Passive Matrix, PM it) drives.PMOLED is although simple for process, cost is relatively low, but because of the shortcomings of there are cross-talk, high power consumption, low service life, cannot Meets the needs of high Resolution and Large Size display.In contrast, AMOLED is in the pixel-driving circuit of each pixel unit It is all integrated with a cluster film transistor and storage capacitance, passes through the drive control to thin film transistor (TFT) and storage capacitance, realization pair The control for flowing through the electric current of OLED, to make OLED shine as needed.Compared to PMOLED, driving current needed for AMOLED is small, Low in energy consumption, longer life expectancy, the large scale that can meet the more gray scales of high-resolution show demand.Meanwhile AMOLED visible angle, Reduction, power consumption and response time of color etc. have apparent advantage, are suitable for high information content, high-resolution aobvious Showing device.

Invention content

A disclosure at least embodiment provides a kind of display panel, including the multiple sub-pixel unit groups being arranged in array, The array includes rows and columns, each sub-pixel unit group include N number of sub-pixel unit for be arranged along column direction with Pixel-driving circuit, each sub-pixel unit includes illuminating circuit, the pixel-driving circuit and N number of sub-pixel list Illuminating circuit electrical connection in member, and the illuminating circuit being configured as into N number of sub-pixel unit provides the driving electricity that shines Stream；The display panel further includes the gating circuit and light emitting control line for sub-pixel unit group is correspondingly arranged described in every row, The gating circuit be electrically connected with the light emitting control line and the sub-pixel unit group with corresponding row described in N number of sub- picture The illuminating circuit of plain unit is electrically connected, and is configured as the luminous control provided in gate control signal and the light emitting control line Under the control of signal processed, the illuminating circuit of N number of sub-pixel unit described in the sub-pixel unit group of the corresponding row is controlled Timesharing is driven by the pixel-driving circuit to shine；N is the integer more than or equal to 2.

For example, in the display panel that one embodiment of the disclosure provides, the sub- picture of the gating circuit and corresponding row The light emitting control end of the illuminating circuit of N number of sub-pixel unit described in plain unit group is electrically connected, and being configured as will be described LED control signal timesharing is applied to the light emitting control of the illuminating circuit of N number of sub-pixel unit described in the sub-pixel unit group End.

For example, the display panel that one embodiment of the disclosure provides further includes gating drive circuit.The gating drive circuit Including multiple cascade gating drive sub-circuits, the sub-pixel unit group of often going is correspondingly arranged a gating driving son electricity Road, the gating drive sub-circuits are configured as described in the corresponding gating circuit offer of the sub-pixel unit group to corresponding row Gate control signal.

For example, the display panel that one embodiment of the disclosure provides further includes light emitting control driving circuit.The light emitting control Driving circuit includes multiple cascade light emitting control drive sub-circuits, and the sub-pixel unit group of often going is correspondingly arranged described in one Light emitting control drive sub-circuits, the light emitting control drive sub-circuits are corresponding with the sub-pixel unit group of corresponding row to shine Control line is electrically connected, and is configured as providing the LED control signal to the light emitting control line.

For example, the display panel that one embodiment of the disclosure provides further includes gate driving circuit.The gate driving circuit Including multiple cascade shift register cells, the sub-pixel unit group of often going is correspondingly arranged a shift register list Member, the pixel-driving circuit that the shift register cell is configured as into the sub-pixel unit group of corresponding row provide grid Pole scanning signal.

For example, in the display panel that one embodiment of the disclosure provides, the pixel-driving circuit includes the driving electricity that shines Road, data write circuit, compensation circuit, reset circuit and emission control circuit；The light emission drive circuit includes drive control End, first end and second end, and it is configured as the light emission drive current that control flows through the first end and the second end； The data write circuit is configured to respond to the drive that the light emission drive circuit is written in data-signal by gated sweep signal Dynamic control terminal；The compensation circuit is configured as the data-signal of storage write-in and in response to the gated sweep signal pair The light emission drive circuit compensates；The reset circuit is configured to respond to reset signal and resetting voltage is applied to institute State the drive control end of light emission drive circuit；And the emission control circuit is configured to respond to the LED control signal First voltage is applied to the first end of the light emission drive circuit.

For example, in the display panel that one embodiment of the disclosure provides, the light emission drive circuit includes the first transistor, The grid of the first transistor is connected as the drive control end of the light emission drive circuit with first node, and described first is brilliant First pole of body pipe is connected as the first end of the light emission drive circuit with second node, the second pole of the first transistor Second end as the light emission drive circuit is connected with third node；The data write circuit includes second transistor, institute The grid for stating second transistor is configured as being connected with scanning signal end to receive the gated sweep signal, second crystal First pole of pipe is configured to be connected with data signal end to receive the data-signal, the second pole of the second transistor and institute State second node connection；The compensation circuit includes third transistor and storage capacitance, the grid of the third transistor by with It is set to and is connected with scanning signal end to receive the gated sweep signal, the first pole of the third transistor and the third section Point connection, the second pole of the third transistor are connected with the first pole of the storage capacitance, the second pole of the storage capacitance It is configured as connecting with first voltage end；The reset circuit includes the 4th transistor, the grid of the 4th transistor by with It being set to and is connected with reseting controling end to receive the reset signal, the first pole of the 4th transistor is connected with first node, Second pole of the 4th transistor is configured to be connected with resetting voltage end to receive the resetting voltage；And the luminous control Circuit processed includes the 5th transistor, and the grid of the 5th transistor is configured as connecting to receive with the light emitting control line LED control signal is stated, the first pole of the 5th transistor is configured to connect to receive described first with the first voltage end Second pole of voltage, the 5th transistor is connected with second node.

For example, in the display panel that one embodiment of the disclosure provides, N=2, two in each sub-pixel unit group A sub-pixel unit respectively includes the first luminous sub-circuit and the second luminous sub-circuit, and the first luminous sub-circuit includes first Switching circuit and the first light-emitting component, the second luminous sub-circuit include second switch circuit and the second light-emitting component, described First switch circuit and the second switch circuit are electrically connected with the second end of the light emission drive circuit.

For example, in the display panel that one embodiment of the disclosure provides, the first switch circuit includes the 6th transistor, The grid of 6th transistor is configured as receiving the LED control signal, the first pole of the 6th transistor and described The second end of light emission drive circuit connects, and the second pole of the 6th transistor and the first pole of first light-emitting component connect It connects, the second pole of first light-emitting component is connected with second voltage end to receive second voltage；The second switch circuit packet The 7th transistor is included, the grid of the 7th transistor is configured as receiving the LED control signal, the 7th transistor The first pole connected with the second end of the light emission drive circuit, the second pole of the 7th transistor and it is described second shine member First pole of part connects, and the second pole of second light-emitting component is connected with second voltage end to receive second voltage.

For example, in the display panel that one embodiment of the disclosure provides, the gating circuit includes the first gating sub-circuit With the second gating sub-circuit, the first gating sub-circuit and the light emitting control line and the first switch circuit are electrically connected It connects, the second gating sub-circuit and the light emitting control line and the second switch circuit are electrically connected.

For example, in the display panel that one embodiment of the disclosure provides, the gate control signal includes that the first gating is controlled Signal processed；The first gating sub-circuit includes the 8th transistor, and the grid of the 8th transistor is configured as described in reception First gate control signal, the first pole of the 8th transistor and light emitting control line electrical connection, the 8th transistor The second pole and the first switch circuit electrical connection；The second gating sub-circuit includes the 9th transistor, and the described 9th is brilliant The grid of body pipe is configured as receiving first gate control signal, the first pole of the 9th transistor and the luminous control Line electrical connection processed, the second pole of the 9th transistor and second switch circuit electrical connection；Wherein, the 8th transistor It is P-type transistor with one in the 9th transistor, another is N-type transistor.

For example, in the display panel that one embodiment of the disclosure provides, the gate control signal includes that the first gating is controlled Signal processed and the second gate control signal；The first gating sub-circuit includes the 8th transistor, the grid of the 8th transistor Pole is configured as receiving first gate control signal, and the first pole of the 8th transistor and the light emitting control line are electrically connected It connects, the second pole of the 8th transistor and first switch circuit electrical connection；The second gating sub-circuit includes the 9th Transistor, the grid of the 9th transistor are configured as receiving second gate control signal, the 9th transistor First pole and light emitting control line electrical connection, the second pole of the 9th transistor and second switch circuit electrical connection.

For example, in the display panel that one embodiment of the disclosure provides, the first gating sub-circuit further includes the tenth crystalline substance Body pipe, the grid of the tenth transistor are configured as receiving second gate control signal, and the of the tenth transistor One pole is connected with the second pole of the 8th transistor, and the second pole of the tenth transistor is connected with tertiary voltage end to receive Tertiary voltage；The second gating sub-circuit further includes the 11st transistor, and the grid of the 11st transistor is configured as First gate control signal is received, the first pole of the 11st transistor and the second pole of the 9th transistor connect It connects, the second pole of the 11st transistor is connected with the tertiary voltage end to receive the tertiary voltage.

A disclosure at least embodiment also provides a kind of display device, including any display described in embodiment of the disclosure Panel.

A disclosure at least embodiment also provides a kind of driving method of display panel, including：The display scanning of one frame is drawn It is divided into N number of subframe；In N number of subframe so that the pixel-driving circuit of each sub-pixel unit group is according to offer The illuminating circuit of N number of sub-pixel unit into each sub-pixel unit group provides the luminous driving electricity to data-signal respectively Stream, the gating circuit control the son of the corresponding row under the control of gate control signal and the LED control signal The illuminating circuit timesharing of N number of sub-pixel unit described in pixel unit group is driven by the pixel-driving circuit to shine.

For example, in the display panel that one embodiment of the disclosure provides, N=2 is located in the sub-pixel unit of odd-numbered line Illuminating circuit and the illuminating circuit in the sub-pixel unit of even number line are sent out in two different subframes respectively Light.

Description of the drawings

In order to illustrate more clearly of the technical solution of the embodiment of the present disclosure, will simply be situated between to the attached drawing of embodiment below It continues, it should be apparent that, the accompanying drawings in the following description merely relates to some embodiments of the present disclosure, rather than the limitation to the disclosure.

Fig. 1 is a kind of schematic diagram of display panel；

Fig. 2 is a kind of circuit diagram of pixel-driving circuit；

Fig. 3 is a kind of schematic diagram for display panel that one embodiment of the disclosure provides；

Fig. 4 is the schematic diagram for another display panel that one embodiment of the disclosure provides；

Fig. 5 is a kind of schematic diagram for gating drive circuit that one embodiment of the disclosure provides；

Fig. 6 is a kind of schematic diagram for light emitting control driving circuit that one embodiment of the disclosure provides；

Fig. 7 is a kind of schematic diagram for gate driving circuit that one embodiment of the disclosure provides；

Fig. 8 is a kind of schematic block diagram for pixel-driving circuit that one embodiment of the disclosure provides；

Fig. 9 is the schematic block diagram for the gating circuit that one embodiment of the disclosure provides；

Figure 10 is pixel-driving circuit in a kind of display panel that one embodiment of the disclosure provides, gating circuit and shines The circuit diagram of the implementation example of circuit；

Figure 11 is pixel-driving circuit, gating circuit and hair in another display panel that one embodiment of the disclosure provides The circuit diagram of the implementation example of optical circuit；

Figure 12 A are the signal timing diagram corresponding to Figure 10 and Figure 11；

Figure 12 B are the signal timing diagram for the gate control signal that adjacent two-stage gates drive sub-circuits output；

Figure 13 is pixel-driving circuit, gating circuit and hair in another display panel that one embodiment of the disclosure provides The circuit diagram of the implementation example of optical circuit；

Figure 14 is the signal timing diagram corresponding to Figure 13；

Figure 15 is a kind of schematic diagram for display device that one embodiment of the disclosure provides.

Specific implementation mode

To keep the purpose, technical scheme and advantage of the embodiment of the present disclosure clearer, below in conjunction with the embodiment of the present disclosure Attached drawing, the technical solution of the embodiment of the present disclosure is clearly and completely described.Obviously, described embodiment is this public affairs The a part of the embodiment opened, instead of all the embodiments.Based on described embodiment of the disclosure, ordinary skill The every other embodiment that personnel are obtained under the premise of without creative work belongs to the range of disclosure protection.

Unless otherwise defined, the technical term or scientific terminology that the disclosure uses should be tool in disclosure fields There is the ordinary meaning that the personage of general technical ability is understood." first ", " second " and the similar word used in the disclosure is simultaneously It does not indicate that any sequence, quantity or importance, and is used only to distinguish different component parts.Equally, "one", " one " or The similar word such as person's "the" does not indicate that quantity limits yet, but indicates that there are at least one." comprising " or "comprising" etc. are similar Word mean to occur the element before the word either object cover the element for appearing in the word presented hereinafter or object and its It is equivalent, and it is not excluded for other elements or object.The similar word such as " connection " or " connected " be not limited to physics or The connection of person's machinery, but may include electrical connection, either directly or indirectly."upper", "lower", " left side ", " right side " etc. is only used for indicating relative position relation, after the absolute position for being described object changes, then the relative position relation May correspondingly it change.

AMOLED uses thin film transistor (TFT) (TFT) structure light emission drive circuit to provide the corresponding driving that shines for OLED device Electric current, such as low-temperature polysilicon film transistor (LTPS TFT) or oxide thin film transistor (Oxide TFT) are mostly used, with General amorphous silicon film transistor (amorphous-Si TFT) is compared, and LTPS TFT and Oxide TFT have higher move Shifting rate and more stable characteristic are more suitably applied to during AMOLED shows.But since the limitation of transistor fabrication process is made At the electrical parameter such as threshold voltage, mobility on heterogeneity, or long-time pressurization and high temperature under, threshold value electricity Pressure be also possible to will appear drift, it is possible to cause to show it is bad, such as occur nurse draw (mura) phenomenon (display brightness unevenness It is even) or ghost phenomena.In view of the above-mentioned problems, needing that pixel-driving circuit is arranged for each sub-pixel unit, with to a certain degree The drift of the upper heterogeneity or transistor threshold voltage for eliminating transistor.

Pixel-driving circuit is arranged in each sub-pixel unit can restrict the raising of display panel resolution ratio, in one kind In the display panel for improving OLED display screen resolution ratio, it can be differentiated by being multiplexed pixel-driving circuit to improve display panel Rate.For example, as shown in Figure 1, R1, R2, R3 and R4 indicate the first row in display panel, the second row, the third line and fourth line respectively Sub-pixel unit.It is located at two sub-pixel lists of same row in the sub-pixel unit of the sub-pixel unit of the first row and the second row Member can share a pixel-driving circuit, similarly, position in the sub-pixel unit of the third line and the sub-pixel unit of fourth line A pixel-driving circuit can be shared in two sub-pixel units of same row, and so on, i.e., per two adjacent row pictures It is multiplexed pixel-driving circuit between plain unit.

For example, circuit structure shown in Fig. 2 may be used in above-mentioned pixel-driving circuit, the pixel-driving circuit is by seven Transistor (the first transistor T1 to the 7th transistor T7) and a storage capacitance C1 are constituted, wherein the first transistor T1 to the 5th Transistor T5 and storage capacitance C1 is the shared part of two sub-pixel units, and the 6th transistor and the 7th transistor are controlled respectively Two light-emitting component (D1 and D2) timesharing of system shine.When the pixel-driving circuit works, in addition to needing to the 5th transistor T5 provides LED control signal (EM3) outside, it is also necessary to which section (such as in different subframes in) is respectively to the in different times Six transistor T6 and the 7th transistor T7 provide LED control signal (EM1 and EM2).Fig. 1 is continued back at, in order to provide luminous control Signal processed, every two rows sub-pixel unit need to set three light emitting control drive sub-circuits (EOA1, EOA2 and EOA3) with point Indescribably supply three LED control signals (EM1, EM2 and EM3).For the circuit structure of Fig. 2, light emitting control driving son electricity can be made The control terminal (i.e. grid) of road EOA1 and the 6th transistor T6 is electrically connected to provide LED control signal EM1, similarly, makes to shine The control terminal for controlling drive sub-circuits EOA2 and the 7th transistor T7 is electrically connected to provide LED control signal EM2, makes the control that shines The control terminal of drive sub-circuits EOA3 and the 5th transistor T5 processed are electrically connected to provide LED control signal EM3.As shown in Fig. 2, Second transistor T2 needs to connect to receive grid with scanning signal end GATE with the control terminal (i.e. grid) of third transistor T3 Scanning signal.Correspondingly, as shown in Figure 1, every two rows sub-pixel unit needs that a shift register cell GOA, the shifting is arranged Bit register unit GOA provides gated sweep signal to pixel-driving circuit.

In the display panel of above-mentioned multiplexing pixel-driving circuit, every two adjacent row sub-pixel units are needed to correspond to Three light emitting control drive sub-circuits (EOA1, EOA2 and EOA3) and a shift register cell GOA, these circuits are set It is big to occupy backboard arrangement space, narrow frame realizes that difficulty is big, to restrict the raising of display panel resolution ratio.

A disclosure at least embodiment provides a kind of display panel.The display panel includes the multiple sub- pictures being arranged in array Plain unit group, array include rows and columns, each sub-pixel unit group include the N number of sub-pixel unit being arranged along column direction and Pixel-driving circuit, each sub-pixel unit include illuminating circuit, pixel-driving circuit and the luminous electricity in N number of sub-pixel unit Road is electrically connected, and the illuminating circuit being configured as into N number of sub-pixel unit provides light emission drive current.Display panel further includes The gating circuit and light emitting control line being correspondingly arranged for every row sub-pixel unit group, gating circuit are electrically connected with light emitting control line And be electrically connected with the illuminating circuit of N number of sub-pixel unit in the sub-pixel unit group of corresponding row, and be configured as controlling in gating Under the control for the LED control signal that signal processed and light emitting control line provide, control N number of in the sub-pixel unit group of corresponding row The illuminating circuit timesharing of sub-pixel unit is driven by pixel-driving circuit to shine；N is the integer more than or equal to 2.This public affairs The embodiment opened also provides the display device and driving method corresponding to above-mentioned display panel.

The display panel and its driving method, display device that embodiment of the disclosure provides, it is possible to reduce in multiplexing pixel The number for the light emitting control drive sub-circuits being arranged when driving circuit so that the frame of display panel is narrower, so as to improve Display panel resolution ratio.

At least one embodiment of the disclosure provides a kind of display panel 10, as shown in figure 3, the display panel 10 includes being in Multiple sub-pixel unit groups 100 of array arrangement, which includes rows and columns.It should be noted that in Fig. 3 only schematically Show that two rows, two row sub-pixel unit group 100, embodiment of the disclosure do not limit the number of sub-pixel unit group 100 It is fixed, for example, the number of 10 sub-pixel unit group 100 of display panel can be configured according to the requirement of resolution ratio.

For example, each sub-pixel unit group 100 includes the N number of sub-pixel unit 110 and pixel driver being arranged along column direction Circuit 120, each sub-pixel unit 110 include illuminating circuit 130, in pixel-driving circuit 120 and N number of sub-pixel unit 110 Illuminating circuit 130 be electrically connected, and the illuminating circuit 130 that is configured as into N number of sub-pixel unit 110 provides the driving electricity that shines Stream.Here N is the integer more than or equal to 2.

Display panel 10 further includes the gating circuit 200 being correspondingly arranged for every row sub-pixel unit group 100 and the control that shines Line EL processed, gating circuit 200 with light emitting control line EL electrical connection and with N number of sub- picture in the sub-pixel unit group 100 of corresponding row The illuminating circuit 130 of plain unit 110 is electrically connected, and is configured as the hair provided in gate control signal and light emitting control line EL Under the control of optical control signal, the illuminating circuit 130 of N number of sub-pixel unit 110 in the sub-pixel unit group 100 of corresponding row is controlled Timesharing is driven by pixel-driving circuit 120 to shine.N is the integer more than or equal to 2.

For example, in one embodiment, as shown in figure 3, each sub-pixel unit group 100 includes two be arranged along column direction A sub-pixel unit 110 (i.e. N=2), pixel-driving circuit 120 and 130 electricity of illuminating circuit in two sub-pixel units 110 Connection, that is to say, that two sub-pixel units 110 in each sub-pixel unit group 100 share a pixel-driving circuit 120.Correspondingly, the illuminating circuit of gating circuit 200 and two sub-pixel units 110 in the sub-pixel unit group 100 of corresponding row 130 electrical connections.It should be noted that illustrate only in figure 3 gating circuit 200 in corresponding row sub-pixel unit group 100 Illuminating circuit 130 in first row sub-pixel unit group 100 is electrically connected, it is readily appreciated that, gating circuit 200 also with the row sub-pixel Illuminating circuit 130 in other row sub-pixel unit groups 100 in unit group 100 is electrically connected.In addition, embodiment of the disclosure pair The installation position of gating circuit 200 is not construed as limiting, and any in every row sub-pixel unit group 100 can be arranged in gating circuit 200 One end (such as initiating terminal or end), following embodiment is identical with this, and is repeated no more.

For example, as shown in figure 3, gating circuit 200 and two sub-pixel units in the sub-pixel unit group 100 of corresponding row The light emitting control end ET of 110 illuminating circuit 130 is electrically connected, and is configured as LED control signal timesharing being applied to this The light emitting control end ET of the illuminating circuit 130 of two sub-pixel units 110 in row sub-pixel unit group 100.

For example, for display panel 10 shown in Fig. 3, when carrying out display scanning, a frame can be shown that scanning is drawn It is divided into two subframes, such as respectively the first subframe and the second subframe, such as the first subframe and the second subframe can be in sequential It is alternately.For example, for the sub-pixel unit group 100 of the first row, in the first subframe, gating circuit 200 is gating Under the action of controlling signal, the LED control signal provided on light emitting control line EL can be applied to sub-pixel unit group 100 In one of illuminating circuit 130 light emitting control end ET, the illuminating circuit 130 is opened, so that pixel-driving circuit 120 can provide the illuminating circuit 130 light emission drive current to shine；Then in the second subframe, gating circuit 200 Under the action of gate control signal, the LED control signal provided on light emitting control line EL can be applied to sub-pixel unit The light emitting control end ET of another illuminating circuit 130 in group 100, opens the illuminating circuit 130, so that pixel driver Circuit 120 can provide the illuminating circuit 130 light emission drive current to shine.For the sub-pixel unit group of other rows 100, gating circuit 200 is same as described above to the control mode of illuminating circuit 130, repeats no more.For example, by above-mentioned setting, It may be implemented in the first subframe so that the sub-pixel unit 110 for being located at the first row in display panel 10 carries out luminescence display, so Afterwards so that the sub-pixel unit 110 for being located at the second row in display panel 10 carries out luminescence display, then the in the second subframe So that the sub-pixel unit 110 for being located at the third line in display panel 10 carries out luminescence display, then in the second subframe in one subframe In so that display panel 10 in be located at fourth line sub-pixel unit 110 carry out luminescence display, and so on, that is to say, that can To realize in the first subframe so that the sub-pixel unit 110 for being located at odd-numbered line in display panel 10 carries out luminescence display, the It is aobvious to complete a frame so that the sub-pixel unit 110 for being located at even number line in display panel 10 carries out luminescence display in two subframes Show scanning.

For example, in another embodiment, (schematically showing only a line sub-pixel unit group in figure as shown in Figure 4 100), each sub-pixel unit group 100 includes three sub-pixel units 110 (i.e. N=3) being arranged along column direction, pixel driver Illuminating circuit 130 in three sub-pixel units 110 of circuit 120 and this is electrically connected, that is to say, that each sub-pixel unit group Three sub-pixel units 110 in 100 share a pixel-driving circuit 120.Correspondingly, gating circuit 200 and corresponding row The illuminating circuit 130 of three sub-pixel units 110 is electrically connected in sub-pixel unit group 100.

For example, as shown in figure 4, gating circuit 200 and three sub-pixel units in the sub-pixel unit group 100 of corresponding row The light emitting control end ET of 110 illuminating circuit 130 is electrically connected, and is configured as LED control signal timesharing being applied to this The light emitting control end ET of the illuminating circuit 130 of three sub-pixel units 110 in row sub-pixel unit group 100.

For example, for display panel 10 shown in Fig. 4, when carrying out display scanning, a frame can be shown that scanning is drawn It is divided into three subframes, such as respectively the first subframe, the second subframe and third subframe, such as the first subframe, the second subframe and Three subframes can be alternately in sequential.For example, for the sub-pixel unit group 100 of the first row, in the first subframe, In two subframes and third subframe, gating circuit 200 can will provide under the action of gate control signal on light emitting control line EL LED control signal be respectively applied to the light emitting control end ET of three illuminating circuits 130 in sub-pixel unit group 100, open Corresponding illuminating circuit 130, so that pixel-driving circuit 120 can provide the driving that shines to the illuminating circuit 130 of unlatching Electric current is to shine.For the sub-pixel unit group 100 of other rows, control mode of the gating circuit 200 to illuminating circuit 130 It is same as described above, it repeats no more.For example, by above-mentioned setting, may be implemented to make position in display panel 10 in the first subframe Luminescence display is carried out in the sub-pixel unit 110 of 3n-2 rows, so that being located at 3n-1 in display panel 10 in the second subframe Capable sub-pixel unit 110 carries out luminescence display, so that being located at the sub-pixel of 3n rows in display panel 10 in third subframe Unit 110 carries out luminescence display, and to complete frame display scanning, n is the integer more than zero.

It should be noted that Fig. 3 and Fig. 4 only diagrammatically illustrate the embodiment of N=2 and N=3, but the implementation of the disclosure Example is not construed as limiting the value of N, as long as N is the integer more than or equal to 2.For example, in embodiment of the disclosure, per height picture Plain unit group 100 can also include four, five, or more sub-pixel unit 110.

In the display panel that embodiment of the disclosure provides, by being multiplexed pixel-driving circuit and setting gating electricity Road can provide LED control signal so that multiple illuminating circuit for multiple illuminating circuit timesharing in sub-pixel unit group It can shine in different subframes, to the situation constant in the number of the pixel-driving circuit of display panel setting Under, correspond to each pixel-driving circuit, more sub-pixel units can be set, so as to improve point of display panel Resolution.

It should be noted that in embodiment of the disclosure, it can be equal to the often row sub-pixel unit group in display panel Gating circuit is set, to improve entire display panel whole region resolution ratio, embodiment of the disclosure includes but unlimited In this, such as can also gating circuit only be arranged to the sub-pixel unit group in the subregion of display panel, so as to only Improve the resolution ratio of the subregion.

For example, the display panel 10 that embodiment of the disclosure provides further includes gating drive circuit 300, as shown in figure 5, should Gating drive circuit includes multiple cascade gating drive sub-circuits 310.As shown in Figure 3 and Figure 4, every row sub-pixel unit group 100 are correspondingly arranged a gating drive sub-circuits 310, and gating drive sub-circuits 310 are configured as the sub-pixel list to corresponding row 100 corresponding gating circuit 200 of tuple provides gate control signal.For example, two gating drive sub-circuits 310 of Adjacent Concatenation The gate control signal of offer offsets one from another a fixed time interval,

For example, the display panel 10 that embodiment of the disclosure provides further includes light emitting control driving circuit 400, such as Fig. 6 institutes Show, which includes multiple cascade light emitting control drive sub-circuits 410.As shown in Figure 3 and Figure 4, often Row sub-pixel unit group 100 is correspondingly arranged a light emitting control drive sub-circuits 410, light emitting control drive sub-circuits 410 with it is right The sub-pixel unit group 100 corresponding light emitting control line EL electrical connections that should be gone, and be configured as providing hair to light emitting control line EL Optical control signal.For example, by the LED control signal of light emitting control line EL transmission other than being provided to gating circuit 200, also The pixel-driving circuit 120 being provided in every row sub-pixel unit group 100, such as opening pixel driver electricity in glow phase Thin film transistor (TFT) in road 120.

In the display panel that embodiment of the disclosure provides, often row sub-pixel unit group only needs to be correspondingly arranged a hair Photocontrol drive sub-circuits 410 can further decrease the border width of display panel, be differentiated so as to further increase Rate.

For example, the display panel 10 that embodiment of the disclosure provides further includes gate driving circuit 500, as shown in fig. 7, should Gate driving circuit 500 includes multiple cascade shift register cells 510.As shown in Figure 3 and Figure 4, every row sub-pixel unit Group 100 is correspondingly arranged a shift register cell 510, and shift register cell 510 is configured as the sub-pixel to corresponding row Pixel-driving circuit 120 in unit group 100 provides gated sweep signal.The grid that cascade shift register cell 510 provides Pole scanning signal shifts step by step, so that the multirow sub-pixel unit group of display panel can shine line by line Display.It should be noted that conventional design may be used in the gate driving circuit 500 in embodiment of the disclosure, as long as can To provide the gated sweep signal shifted step by step.

In embodiment of the disclosure, pixel-driving circuit 120 is the pixel-driving circuit with compensation function, the compensation Function can be realized by voltage compensation, current compensation or mixed compensation, and the pixel circuit with compensation function for example can be with For 4T1C or 4T2C etc..In one embodiment of the disclosure, in example as shown in Figure 8, pixel-driving circuit 120 includes hair Light drive circuit 121, data write circuit 122, compensation circuit 123, reset circuit 124 and emission control circuit 125.

The light emission drive circuit 121 includes drive control end 1210, first end 1211 and second end 1212, and is configured as Control flows through the light emission drive current of first end 1211 and second end 1212.For example, in glow phase, light emission drive circuit 121 Light emission drive current can be provided to the light-emitting component in illuminating circuit 130 to drive light-emitting component to shine, and can root It shines according to " gray scale " of needs.

The data write circuit 122 is configured to respond to gated sweep signal and light emission drive circuit is written in data-signal 121 drive control end 1210.For example, data write circuit 122 and scanning signal end GATE and data signal end DATA connect It connects, such as in data write-in and compensated stage, the gated sweep that data write circuit 122 is inputted in response to scanning signal end GATE Signal and open, the drive control end of light emission drive circuit 121 is written in the data-signal to input data signal end DATA 1210, and be stored in compensation circuit 123, to generate driving illuminating circuit according to the data-signal in such as glow phase 130 luminous light emission drive currents.

The compensation circuit 123 is configured as the data-signal of storage write-in and in response to gated sweep signal to the driving that shines Circuit 121 compensates.For example, in the case of compensation circuit 123 includes storage capacitance, such as rank is written and compensated in data Section, compensation circuit 123 can be opened in response to the gated sweep signal that scanning signal end GATE is inputted, so as to by data The data-signal that write circuit 122 is written is stored in storage capacitance.For example, simultaneously in data write-in and compensated stage, compensation The drive control end 1210 of light emission drive circuit 121 and second end 1212 can be electrically connected by circuit 123, so as to so as to shine The relevant information of the threshold voltage of driving circuit 121 also respectively, may be stored in storage capacitance, to for example glow phase can To be controlled light emission drive circuit 121 including data-signal and threshold voltage using storage so that shine driving electricity Road 121 is compensated.

The reset circuit 124 is configured to respond to reset signal and resetting voltage is applied to light emission drive circuit 121 Drive control end 1210.For example, reset circuit 124 is connected with reseting controling end RST and resetting voltage end VINT, such as multiple In the position stage, reset circuit 124 can be opened in response to the reset signal of reseting controling end RST inputs, so as to reset The resetting voltage of voltage end VINT inputs is applied to the drive control end 1210 of light emission drive circuit 121.It should be noted that In another example of embodiment of the disclosure, the reset in pixel-driving circuit 120 in the sub-pixel unit group 100 of one's own profession Circuit 124 can not also be connect with reseting controling end RST, and with the pixel-driving circuit in lastrow sub-pixel unit group 100 Scanning signal end GATE connections in 120, i.e., using corresponding to lastrow sub-pixel unit group 100 gated sweep signal as Reset signal.Embodiment of the disclosure is not construed as limiting the applying mode of reset signal.

The emission control circuit 125 is configured to respond to LED control signal and first voltage is applied to the driving electricity that shines The first end 1211 on road 121.For example, emission control circuit 125 and the EL electrical connections of light emitting control line, so as to receive luminous control The LED control signal provided on line EL processed, emission control circuit 125 are also connected with first voltage end VDD to receive the first electricity Pressure.For example, in glow phase, emission control circuit 125 can be opened in response to LED control signal, so as to by first Voltage is applied to the first end 1211 of light emission drive circuit 121, when light emission drive circuit 121 is connected, it is readily appreciated that, second The current potential at end 1212 is also first voltage.Then, this first voltage is applied in illuminating circuit 130 by light emission drive circuit 121 Light-emitting component to provide driving voltage, to drive light-emitting component shine.For example, first voltage can be driving voltage, example Such as it is high voltage.

As described above, the pixel-driving circuit 120 that embodiment of the disclosure provides is not limited to the example in Fig. 8, pixel is driven Dynamic circuit 120 can also use other conventional pixel-driving circuits, as long as correspondingly may be implemented in embodiment of the disclosure Described function.

In fig. 8, illuminating circuit 130 is connected between pixel-driving circuit 120 and second voltage end VSS, and pixel is driven The voltage input end of dynamic circuit 120 is connected to first voltage end VDD, it is possible thereby to which illuminating circuit 130 is driven to shine.It is right with this It answers, in other examples, illuminating circuit 130 can be connected between pixel-driving circuit 120 and first voltage end VDD, and picture The voltage input end of plain driving circuit 120 is connected to second voltage end VSS, it is possible thereby to which illuminating circuit 130 is driven to shine.

For example, in one example, as shown in Figure 10, pixel-driving circuit 120 shown in fig. 8 can be implemented as Figure 10 Shown in circuit structure.As shown in Figure 10, which includes：First to the 5th transistor T1, T2, T3, T4, T5 and storage capacitance C1.For example, the first transistor T1 is used as driving transistor, other second to the 5th transistors It is used as switching transistor.

For example, as shown in Figure 10, in more detail, light emission drive circuit 121 can be implemented as the first transistor T1.First is brilliant The grid of body pipe T1 is connected as the drive control end 1210 of light emission drive circuit 121 with first node N1, the first transistor T1 The first pole connected with second node N2 as the first end 1211 of light emission drive circuit 121, the second pole of the first transistor T1 Second end 1212 as light emission drive circuit 121 is connected with third node N3.

Data write circuit 122 can be implemented as second transistor T2.The grid of second transistor T2 is configured as and sweeps Signal end GATE connections are retouched to receive grid scanning signal, the first pole of second transistor T2 is configured to and data signal end DATA To receive data-signal, the second pole of second transistor T2 is connect with second node N2 for connection.

Compensation circuit 123 can be implemented as including third transistor T3 and storage capacitance C1.The grid of third transistor T3 It is configured as being connected with scanning signal end GATE to receive grid scanning signal, the first pole of third transistor T3 and third node N3 connections, the second pole of third transistor T3 and the first pole connection (being connect with first node N1) of storage capacitance C1, storage The second pole of capacitance C1 is configured as connecting to receive first voltage with first voltage end VDD.

Reset circuit 124 can be implemented as the 4th transistor T4.The grid of 4th transistor T4 is configured as and resets control RST connections in end processed are to receive reset signal, and the first pole of the 4th transistor T4 is connected with first node N1, the 4th transistor T4's Second pole is configured to connect to receive resetting voltage with resetting voltage end VINT.It should be noted that being not provided with resetting voltage In the case of holding VINT, the grid of the 4th transistor T4 can be with the pixel-driving circuit in lastrow sub-pixel unit group 100 Scanning signal end GATE connections in 120, i.e., using corresponding to lastrow sub-pixel unit group 100 gated sweep signal as Reset signal.Embodiment of the disclosure is not construed as limiting the applying mode of reset signal.

Emission control circuit 125 can be implemented as the 5th transistor T5.The grid of 5th transistor T5 is configured as and sends out To receive LED control signal, the first pole of the 5th transistor T5 is configured to connect with first voltage end VDD for photocontrol line EL connections It connects to receive first voltage, the second pole of the 5th transistor T5 is connected with second node N2.

In one embodiment of the disclosure, such as N=2, i.e., each sub-pixel unit group 100 includes two sub-pixels Unit 110.As shown in figure 9, in a sub-pixel unit group 100, it is clear in order to describe, in the sub-pixel unit group 100 Two sub-pixel units 110 illuminating circuit 130 for including be referred to as the first luminous sub-circuit 131 and the second luminous sub-circuit 132.First luminous sub-circuit 131 includes first switch circuit 1311 and the first light-emitting component D1, the second luminous sub-circuit 132 packet Include second switch circuit 1322 and the second light-emitting component D2, first switch circuit 1311 and second switch circuit 1322 with shine The second end 1212 of driving circuit 121 is electrically connected.

Light-emitting component (the first light-emitting component D1 and the second light-emitting component D2) in embodiment of the disclosure may be used OLED, embodiment of the disclosure include but not limited to this, and following embodiment is illustrated by taking OLED as an example, is repeated no more. The OLED can be various types, such as top emitting, bottom emitting etc., can glow, green light, blue light or white light etc., the disclosure Embodiment this is not restricted.

For example, in one embodiment of the disclosure, as shown in Figure 10, first switch circuit 1311 can be implemented as the 6th Transistor T6.The grid of 6th transistor T6 be configured as receive LED control signal, for example, the grid of the 6th transistor T6 and Gating circuit connects, to receive the LED control signal that light emitting control line EL is provided when gating circuit is connected.6th The first pole of transistor T6 and the second end 1212 of light emission drive circuit 121 connect (being connect with third node N3), and the 6th is brilliant The second pole of body pipe T6 and the connection of the first pole (i.e. anode) of the first light-emitting component D1, the second pole of the first light-emitting component D1 is (i.e. Cathode) it is connected with second voltage end VSS to receive second voltage.For example, second voltage end VSS can be grounded, i.e. second voltage For 0V.

As shown in Figure 10, second switch circuit 1322 can be implemented as the 7th transistor T7.The grid of 7th transistor T7 It is configured as receiving LED control signal, for example, the grid of the 7th transistor T7 is connected with gating circuit, in gating circuit The LED control signal that light emitting control line EL is provided can be received when conducting.The first pole of 7th transistor T7 and the driving electricity that shines The second end connection (being connect with third node N3) on road 121, the second pole of the 7th transistor T7 and the second light-emitting component D2's First pole (i.e. anode) connects, and the second pole (i.e. cathode) of the second light-emitting component D2 is connected with second voltage end VSS to receive the Two voltages.

In one embodiment, as shown in figure 9, gating circuit 200 includes the first gating gating of sub-circuit 210 and second Circuit 220.First gating sub-circuit 210 and light emitting control line EL and first switch circuit 1311 are electrically connected, to first When gating the conducting of sub-circuit 210, the LED control signal that can provide light emitting control line EL is applied to first switch circuit 1311 so that first switch circuit 1311 is opened, so that light emission drive current can be provided to by pixel-driving circuit 120 First light-emitting component D1.Second gating sub-circuit 220 and light emitting control line EL and second switch circuit 1322 are electrically connected, to When the second gating sub-circuit 220 is connected, the LED control signal that can provide light emitting control line EL is applied to second switch Circuit 1322 so that second switch circuit 1322 is opened, so that pixel-driving circuit 120 can carry light emission drive current It is supplied to the second light-emitting component D2.

For example, in one example, as shown in Figure 10, the first gating sub-circuit 210 can be implemented as the 8th transistor T8, The grid of 8th transistor T8 is configured as receiving the first gate control signal CK, the first pole of the 8th transistor T8 and the control that shines To receive LED control signal, the second pole of the 8th transistor T8 and first switch circuit 1311 are electrically connected for line EL electrical connections processed, Such as in the case of first switch circuit 1311 is embodied as six transistors, the second pole of the 8th transistor T8 and the 6th crystal The grid of pipe T6 connects.

Second gating sub-circuit 220 can be implemented as the 9th transistor T9, and the grid of the 9th transistor T9 is configured as connecing The first pole and the light emitting control line EL electrical connections of the first gate control signal CK, the 9th transistor T9 are received to receive light emitting control letter Number, the second pole of the 9th transistor T9 and second switch circuit 1322 are electrically connected, such as are embodied as in second switch circuit 1322 In the case of 7th transistor T7, the second pole of the 9th transistor T9 is connected with the grid of the 7th transistor T7.

It should be noted that the transistor used in embodiment of the disclosure all can be thin film transistor (TFT) or field-effect crystalline substance Body pipe or other characteristics identical switching device are illustrated by taking thin film transistor (TFT) as an example in embodiment of the disclosure.Here The source electrode of the transistor of use, drain electrode can be symmetrical in structure, so its source electrode, drain electrode can not have in structure Difference.In embodiment of the disclosure, in order to distinguish the two poles of the earth of transistor in addition to grid, wherein one is directly described extremely First pole, another extremely the second pole.In addition, transistor can be divided into N-type and P-type crystal by the characteristic differentiation according to transistor Pipe.When transistor is P-type transistor, cut-in voltage is low level voltage (for example, 0V, -5V, -10V or other suitable electricity Pressure), closing voltage is high level voltage (for example, 5V, 10V or other suitable voltages)；When transistor is N-type transistor, Cut-in voltage be high level voltage (for example, 5V, 10V or other suitable voltages), closings voltage for low level voltage (for example, 0V, -5V, -10V or other suitable voltages).

In addition, it is necessary to illustrate, the transistor used in the pixel-driving circuit 120 provided in embodiment of the disclosure It is illustrated by taking P-type transistor as an example, embodiment of the disclosure includes but not limited to this, such as pixel-driving circuit Transistor can also use N-type transistor some or all of in 120.

With reference to signal timing diagram shown in Figure 12 A, the operation principle of circuit structure shown in Figure 10 is said It is bright.For example, as illustrated in fig. 12, frame display scanning is divided into the first subframe and the second subframe.Figure 12 A show institute in Figure 10 The sequential of the sequential of each signal end of the pixel-driving circuit 120 shown and the gate control signal of control gating circuit 200, For example, the first light-emitting component D1 is driven to shine in the first subframe, the second light-emitting component D2 is driven to shine in the second subframe.

In the first subframe, since the first gate control signal CK is always maintained at low level, so in the first subframe Eight transistor T8 (P-type transistor) are held on, and the 9th transistor T9 (N-type transistor) keeps cut-off.

In reseting stage 1, reseting controling end RST input low level signals, the 4th transistor T4 conductings can will reset The resetting voltage of voltage end VINT inputs is applied to the grid of the first transistor T1, to complete the reset of the first transistor T1.

In data write-in and compensated stage 2, scanning signal end GATE input low level signals, second transistor T2 and the Three transistor T3 conductings, the first transistor T1 is since the reset in last stage is also held on, to which data signal end DATA is defeated The data-signal entered fills storage capacitance C1 after second transistor T2, the first transistor T1 and third transistor T3 Electricity, until the first transistor T1 cut-offs charging process terminates.Can will include data after data write-in and compensated stage 2 The information storage of the threshold voltage of signal and the first transistor T1 is in storage capacitance C1, in follow-up glow phase, Gray scale display data is provided and the threshold voltage of the first transistor T1 is compensated.

In glow phase 3, the LED control signal that light emitting control line EL is provided is low level signal, due to the 8th crystal Pipe T8 is held in the first subframe, so the low level signal is after-applied to the 6th transistor T6 by the 8th transistor T8 Grid so that the 6th transistor T6 conducting, while the 5th transistor T5 is also switched on.The of first voltage end VDD inputs One voltage can be applied to the first light-emitting component D1 by the 5th transistor T5, the first transistor T1 and the 6th transistor T6, To which the first transistor T1 can provide the luminous drive for keeping the first light-emitting component D1 luminous according to first voltage and data-signal Streaming current.

In dwell period 4, the LED control signal that light emitting control line EL is provided becomes high level signal, due to the 8th crystalline substance Body pipe T8 is held in the first subframe, so the high level signal is after-applied to the 6th transistor by the 8th transistor T8 The grid of T6, so that the 6th transistor T6 cut-offs.It is first to send out in order to prevent by the 6th transistor T6 cut-offs in this stage Optical element D1 shines in the second subframe, bad to avoid occurring showing.

In the second subframe, since the first gate control signal CK (n) is always maintained at high level, so in the first subframe 9th transistor T9 is held on, and the 8th transistor T8 keeps cut-off.About the reseting stage 5 in the second subframe, data write-in Description with compensated stage 6, glow phase 7 and dwell period 8 can refer to reseting stage 1, number in the first subframe respectively According to the corresponding description in write-in and compensated stage 2, glow phase 3 and dwell period 4, which is not described herein again.

It should be noted that in circuit structure shown in Fig. 10, wherein the 8th transistor T8 uses P-type transistor, and 9th transistor T9 uses N-type crystal, and the grid of the two is made to receive the first gate control signal CK simultaneously, so that the Eight transistor T8 and the 9th transistor T9 can be connected in two subframes respectively.Embodiment of the disclosure includes but not limited to This, such as in other embodiments, the 8th transistor T8 can also use N-type transistor, and the 9th transistor T9 can be with Using P-type transistor, correspondingly, the grid of the 8th transistor T8 and the 9th transistor T9 receives the second gating control simultaneously at this time Signal CB (as shown in the CB in Figure 12 A), it is also possible that the 8th transistor T8 and the 9th transistor T9 are respectively in two subframes Middle conducting, to complete corresponding function.

In another embodiment of the disclosure, as shown in figure 11, the difference of the embodiment and embodiment shown in Fig. 10 Including：8th transistor T8 and the 9th transistor T9 is all made of P-type transistor, and the grid of the 8th transistor T8 is configured as connecing The first gate control signal CK is received, and the grid of the 9th transistor T9 is configured as receiving the second gate control signal CB.

With reference to signal timing diagram shown in Figure 12 A, the operation principle of circuit structure shown in Figure 11 is said It is bright.For example, in the first subframe, since the first gate control signal CK is always maintained at low level, so in the first subframe Eight transistor T8 are held on；Since the second gate control signal CB is always maintained at high level, so the 9th in the second subframe Transistor T9 keeps cut-off.In the second subframe, since the first gate control signal CK is always maintained at high level, so first The 8th transistor T8 keeps cut-off in subframe；Since the second gate control signal CB is always maintained at low level, so in the second son The 9th transistor T9 is held in frame.8th transistor T8 may be implemented using aforesaid way and the 9th transistor T9 exists respectively It is connected in two subframes, to complete corresponding timesharing display function.It should be noted that pixel-driving circuit 120 is each Operation principle in subframe is identical with the accordingly description in embodiment shown in Figure 10, and which is not described herein again.

It should be noted that in the circuit structure shown in Figure 11, the 8th transistor T8 and the 9th transistor T9 can be with It is all made of N-type transistor, correspondingly, the grid of the 8th transistor T8 is configured as receiving the second gate control signal CB, and the The grid of nine transistor T9 is configured as receiving the first gate control signal CK.

The first gating control letter of the gating circuit 200 for being applied to a line sub-pixel unit group 100 is illustrated only in Figure 12 A The gating circuit for being applied to adjacent rows sub-pixel unit group 100 is shown in number CK and the second gate control signal CB, Figure 12 B Relationship between 200 the first gate control signal and the second gate control signal.As shown in Figure 12 B, CK (n) expressions correspond to The first gate control signal that n-th grade of gating drive sub-circuits 310 of line n sub-pixel unit group 100 provide, CK (n+1) table Show the first gating control letter that (n+1)th grade of gating drive sub-circuits 310 corresponding to the (n+1)th row sub-pixel unit group 100 provide Number, such as CK (n) and CK (n+1) can be staggered a Fixed Time Interval T1 each other, which for example can be grid The opening time T2 for the gated sweep signal that driving circuit 500 provides.CB (n) indicates to correspond to line n sub-pixel unit group 100 N-th grade gating drive sub-circuits 310 provide the second gate control signal, CB (n+1) indicate correspond to the (n+1)th row sub-pixel The second gate control signal that (n+1)th grade of gating drive sub-circuits 310 of unit group 100 provide, such as CB (n) and CB (n+1) Can be staggered a Fixed Time Interval T1 each other, which for example can be the grid that gate driving circuit 500 provides The opening time T2 of scanning signal.Following embodiment is identical with this, and is repeated no more.

In another embodiment of the disclosure, as shown in figure 13, the difference of the embodiment and embodiment shown in Figure 11 Including：First gating sub-circuit 210 further includes the tenth transistor T10, and the grid of the tenth transistor T10 is configured as reception second Gate control signal CB, the first pole of the tenth transistor T10 are connected with the second pole of the 8th transistor T8, the tenth transistor T10 The second pole connected with tertiary voltage end VGH to receive tertiary voltage；Second gating sub-circuit 220 further includes the 11st transistor The grid of T11, the 11st transistor T11 be configured as receive the first gate control signal CK, the first of the 11st transistor T11 Pole is connected with the second pole of the 9th transistor T9, and the second pole of the 11st transistor T11 is connected with tertiary voltage end VGH to receive Tertiary voltage.For example, tertiary voltage is high voltage, which can make the 6th transistor T6 and the 7th transistor T7 keep Cut-off.

With reference to signal timing diagram shown in Figure 14, the operation principle of circuit structure shown in Figure 13 is said It is bright.For example, in the first subframe, since the first gate control signal CK is always maintained at low level, so in the first subframe Eight transistor T8 and the 11st transistor T11 are held on, and the LED control signal that light emitting control line EL is provided can be by the Eight transistor T8 are applied to the grid of the 6th transistor T6, to which the 6th transistor T6 is connected in glow phase.Third electricity simultaneously The grid of 7th transistor T7 during the tertiary voltage (high voltage) that pressure side VGH is provided can be applied by the 11st transistor T11, So that the 7th transistor T7 keeps cut-off in the first subframe, it can prevent the second light-emitting component D2 from being sent out in the first subframe Light, it is bad to avoid occurring showing.In addition in the first subframe, since the second gate control signal CB is always maintained at high electricity It is flat, so the 9th transistor T9 and the tenth transistor T10 keep cut-off in the second subframe.

For example, in the second subframe, since the second gate control signal CB is always maintained at low level, so in the second subframe In the 9th transistor T9 and the tenth transistor T10 be held on, the LED control signal that light emitting control line EL is provided can pass through 9th transistor T9 is applied to the grid of the 7th transistor T7, to which the 7th transistor T7 is connected in glow phase.Third simultaneously The grid of 6th transistor T6 during the tertiary voltage (high voltage) that voltage end VGH is provided can be applied by the tenth transistor T10, So that the 6th transistor T6 keeps cut-off in the first subframe, it can prevent the first light-emitting component D1 from being sent out in the second subframe Light, it is bad to avoid occurring showing.In addition in the second subframe, since the first gate control signal CK is always maintained at high electricity It is flat, so the 8th transistor T8 and the 11st transistor T11 keep cut-off in the second subframe.

It should be noted that reseting stage 1 of the pixel-driving circuit 120 shown in Figure 13 in the first subframe, data are write Enter identical with the accordingly description in embodiment shown in Figure 10 with the operation principle in compensated stage 2 and glow phase 3；Class As, reseting stage 4 of the pixel-driving circuit 120 shown in Figure 13 in the second subframe, data write-in and compensated stage 5 and Operation principle in glow phase 6 is identical with the accordingly description in embodiment shown in Figure 10；Which is not described herein again.

Embodiment of the disclosure also provides a kind of display device 1, and as shown in figure 15, which includes the disclosure Any display panel 10 that embodiment provides.For example, embodiment of the disclosure provide display device 1 can be display, Oled panel, OLED TVs, mobile phone, tablet computer, laptop, Digital Frame, navigator etc. are any to have display function Product or component.The display device that embodiment of the disclosure provides can improve the resolution ratio of display.

Embodiment of the disclosure also provides a kind of driving method, the display that can be used for that embodiment of the disclosure is driven to provide Panel 10 and the display device 1 for using the display panel 10.For example, the driving method includes following operation.

Step S100：The display scanning of one frame is divided into N number of subframe；And

Step S200：In N number of subframe so that the pixel-driving circuit 120 of each sub-pixel unit 100 is according to offer Into each sub-pixel unit group 100, the illuminating circuit 130 of N number of sub-pixel unit 110 provides the driving that shines to data-signal respectively Electric current, gating circuit 200 control the sub-pixel unit of corresponding row under the control of gate control signal and LED control signal 130 timesharing of illuminating circuit of N number of sub-pixel unit 110 is driven by pixel-driving circuit 120 to shine in group 100.

For example, for display panel shown in Fig. 3, in the step s 100, a frame can be shown that scanning is divided into two Subframe (such as the first subframe and second subframe), i.e. N=2.Correspondingly, in step s 200, it is provided by light emitting control line EL LED control signal is to gating circuit 200 and pixel-driving circuit 120；It gates drive sub-circuits 310 and gate control signal is provided (such as first gate control signal CK and the second gate control signal CB) is to gating circuit 200；Gating circuit 200 is controlled in gating Under the control of signal and LED control signal processed, the illuminating circuit of two sub-pixel units 110 in control sub-pixel unit group 100 130 are driven by pixel-driving circuit 120 to shine in the first subframe and the second subframe respectively.

For example, being divided into the situation of two subframes by frame display scanning, it is located at the sub-pixel unit 110 of odd-numbered line In illuminating circuit 130 and illuminating circuit 130 in the sub-pixel unit 110 of even number line respectively in two different subframes Inside shine.

It should be noted that the detailed description and technique effect about the driving method can refer to embodiment of the disclosure In for display panel 10 operation principle description, which is not described herein again.

More than, the only specific implementation mode of the disclosure, but the protection domain of the disclosure is not limited thereto, the disclosure Protection domain should be subject to the protection scope in claims.

Claims

1. a kind of display panel, including multiple sub-pixel unit groups for being arranged in array, the array includes rows and columns, often A sub-pixel unit group includes the N number of sub-pixel unit and pixel-driving circuit being arranged along column direction, each sub- picture Plain unit includes illuminating circuit, and the pixel-driving circuit is electrically connected with the illuminating circuit in N number of sub-pixel unit, and by The illuminating circuit being configured into N number of sub-pixel unit provides light emission drive current；

The display panel further includes the gating circuit and light emitting control line for sub-pixel unit group is correspondingly arranged described in every row, The gating circuit be electrically connected with the light emitting control line and the sub-pixel unit group with corresponding row described in N number of sub- picture The illuminating circuit of plain unit is electrically connected, and is configured as the luminous control provided in gate control signal and the light emitting control line Under the control of signal processed, the illuminating circuit of N number of sub-pixel unit described in the sub-pixel unit group of the corresponding row is controlled Timesharing is driven by the pixel-driving circuit to shine；

N is the integer more than or equal to 2.

2. display panel according to claim 1, wherein the sub-pixel unit group of the gating circuit and corresponding row Described in the light emitting control end of illuminating circuit of N number of sub-pixel unit be electrically connected, and be configured as the light emitting control Signal timesharing is applied to the light emitting control end of the illuminating circuit of N number of sub-pixel unit described in the sub-pixel unit group.

3. display panel according to claim 1 or 2 further includes gating drive circuit, wherein

The gating drive circuit includes multiple cascade gating drive sub-circuits, and the sub-pixel unit group of often going is correspondingly arranged One gating drive sub-circuits,

The gating drive sub-circuits are configured as providing institute to the corresponding gating circuit of the sub-pixel unit group of corresponding row State gate control signal.

4. display panel according to claim 3 further includes light emitting control driving circuit, wherein

The light emitting control driving circuit includes multiple cascade light emitting control drive sub-circuits, often the capable sub-pixel unit group The light emitting control drive sub-circuits are correspondingly arranged,

Light emitting control drive sub-circuits light emitting control line electrical connection corresponding with the sub-pixel unit group of corresponding row, and It is configured as providing the LED control signal to the light emitting control line.

5. display panel according to claim 4 further includes gate driving circuit, wherein

The gate driving circuit includes multiple cascade shift register cells, and the sub-pixel unit group of often going is correspondingly arranged One shift register cell,

The pixel-driving circuit that the shift register cell is configured as into the sub-pixel unit group of corresponding row provides Gated sweep signal.

6. display panel according to claim 1 or 2, wherein the pixel-driving circuit includes light emission drive circuit, number According to write circuit, compensation circuit, reset circuit and emission control circuit；

The light emission drive circuit includes drive control end, first end and second end, and is configured as control and flows through described first The light emission drive current at end and the second end；

The data write circuit is configured to respond to gated sweep signal and the light emission drive circuit is written in data-signal Drive control end；

The compensation circuit is configured as the data-signal of storage write-in and in response to the gated sweep signal to described Light emission drive circuit compensates；

The reset circuit is configured to respond to the driving that resetting voltage is applied to the light emission drive circuit by reset signal Control terminal；And

The emission control circuit is configured to respond to the LED control signal and first voltage is applied to the luminous drive The first end of dynamic circuit.

7. display panel according to claim 6, wherein

The light emission drive circuit includes the first transistor, and the grid of the first transistor is as the light emission drive circuit Drive control end is connected with first node, the first pole of the first transistor as the light emission drive circuit first end and Second node connects, and the second pole of the first transistor connects as the second end and third node of the light emission drive circuit It connects；

The data write circuit includes second transistor, and the grid of the second transistor is configured as connecting with scanning signal end It connects to receive the gated sweep signal, the first pole of the second transistor is configured to connect to receive with data signal end Data-signal is stated, the second pole of the second transistor is connect with the second node；

The compensation circuit includes third transistor and storage capacitance, and the grid of the third transistor is configured as and scans letter Number end connection to receive the gated sweep signal, the first pole of the third transistor is connected with the third node, described Second pole of third transistor is connected with the first pole of the storage capacitance, and the second pole of the storage capacitance is configured as and One voltage end connects；

The reset circuit includes the 4th transistor, the grid of the 4th transistor be configured as connecting with reseting controling end with The reset signal is received, the first pole of the 4th transistor is connected with first node, the second pole of the 4th transistor It is configured to be connected with resetting voltage end to receive the resetting voltage；And

The emission control circuit includes the 5th transistor, and the grid of the 5th transistor is configured as and the light emitting control Line is connected to receive the LED control signal, and the first pole of the 5th transistor is configured to connect with the first voltage end To receive the first voltage, the second pole of the 5th transistor is connected with second node.

8. display panel according to claim 6, wherein N=2,

Two sub-pixel units in each sub-pixel unit group respectively include the first luminous sub-circuit and the second luminous son Circuit,

The first luminous sub-circuit includes first switch circuit and the first light-emitting component,

The second luminous sub-circuit includes second switch circuit and the second light-emitting component,

The first switch circuit and the second switch circuit are electrically connected with the second end of the light emission drive circuit.

9. display panel according to claim 8, wherein

The first switch circuit includes the 6th transistor, and the grid of the 6th transistor is configured as receiving the luminous control First pole of signal processed, the 6th transistor is connected with the second end of the light emission drive circuit, the 6th transistor Second pole is connected with the first pole of first light-emitting component, and the second pole of first light-emitting component is connected with second voltage end To receive second voltage；

The second switch circuit includes the 7th transistor, and the grid of the 7th transistor is configured as receiving the luminous control First pole of signal processed, the 7th transistor is connected with the second end of the light emission drive circuit, the 7th transistor Second pole is connected with the first pole of second light-emitting component, and the second pole of second light-emitting component is connected with second voltage end To receive second voltage.

10. display panel according to claim 8, wherein the gating circuit includes the first gating sub-circuit and second Sub-circuit is gated,

The first gating sub-circuit and the light emitting control line and first switch circuit electrical connection,

The second gating sub-circuit and the light emitting control line and second switch circuit electrical connection.

11. display panel according to claim 10, wherein the gate control signal includes the first gating control letter Number；

The first gating sub-circuit includes the 8th transistor, and the grid of the 8th transistor is configured as receiving described first Gate control signal, the first pole of the 8th transistor and light emitting control line electrical connection, the of the 8th transistor Two poles and first switch circuit electrical connection；

The second gating sub-circuit includes the 9th transistor, and the grid of the 9th transistor is configured as receiving described first Gate control signal, the first pole of the 9th transistor and light emitting control line electrical connection, the of the 9th transistor Two poles and second switch circuit electrical connection；

Wherein, one in the 8th transistor and the 9th transistor is P-type transistor, another is N-type transistor.

12. display panel according to claim 10, wherein the gate control signal includes the first gate control signal With the second gate control signal；

The second gating sub-circuit includes the 9th transistor, and the grid of the 9th transistor is configured as receiving described second Gate control signal, the first pole of the 9th transistor and light emitting control line electrical connection, the of the 9th transistor Two poles and second switch circuit electrical connection.

13. display panel according to claim 12, wherein

The first gating sub-circuit further includes the tenth transistor, and the grid of the tenth transistor is configured as receiving described the First pole of two gate control signals, the tenth transistor is connected with the second pole of the 8th transistor, and the described tenth is brilliant Second pole of body pipe is connected with tertiary voltage end to receive tertiary voltage；

The second gating sub-circuit further includes the 11st transistor, and the grid of the 11st transistor is configured as receiving institute The first gate control signal is stated, the first pole of the 11st transistor is connected with the second pole of the 9th transistor, described Second pole of the 11st transistor is connected with the tertiary voltage end to receive the tertiary voltage.

14. a kind of display device, including claim 1-13 any one of them display panels.

15. a kind of driving method of display panel as described in claim 1, including：

The display scanning of one frame is divided into N number of subframe；

In N number of subframe so that the pixel-driving circuit of each sub-pixel unit group is according to the data-signal of offer Into each sub-pixel unit group, the illuminating circuit of N number of sub-pixel unit provides the light emission drive current respectively, described Gating circuit controls the sub-pixel unit of the corresponding row under the control of gate control signal and the LED control signal The illuminating circuit timesharing of N number of sub-pixel unit described in group is driven by the pixel-driving circuit to shine.

16. driving method according to claim 15, wherein N=2 is located at shining in the sub-pixel unit of odd-numbered line Circuit and the illuminating circuit in the sub-pixel unit of even number line shine in two different subframes respectively.