CN108390657B - Active inductance-based broadband analog equalizer integrated circuit - Google Patents
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Abstract
The invention discloses a broadband analog equalizer integrated circuit based on active inductance, which comprises a main amplifier, an auxiliary amplifier and a low-pass filter amplifier, wherein the main amplifier is a differential amplifier which adopts the active inductance as a load, the active inductance provides a zero point in a transmission equation, and the main amplifier is used as a main amplification channel for compensating the gain of a high-frequency signal; the auxiliary amplifier and the low pass filtered amplifier form a feed forward path for rejecting high frequency signals and amplifying low frequency signals. The equalizer adopts the active inductor as a load to enhance the high-frequency gain of a signal; the feedforward low-pass filter amplifier path is adopted to restrain the low-frequency gain of the signal, so that the working bandwidth of the equalizer can be effectively improved.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to an active inductance-based broadband analog equalizer integrated circuit.
Background
With the high-speed development of modern information technology, people have higher and higher requirements on the speed of signal transmission, and high-speed signals are transmitted more and more frequently among electronic systems, electronic modules, circuit boards and chips. However, since the attenuation of the high frequency signal on the transmission cable, the PCB, or even the bonding wire at the chip level is much greater than that of the low frequency signal, as a result, the signal components of different frequencies in the signal have different signal attenuations, and the attenuation difference between the high frequency signal and the low frequency signal is more obvious when the transmission rate of the signal is higher.
The conventional analog equalizer circuit generally implements control of the high-frequency gain of the equalizer by adjusting the zero position in the transmission equation, and there are various general implementation methods, such as changing the value of a variable capacitor (varactor), controlling a capacitor array, adjusting the bias current of an amplifier, and the like. The conventional implementation method only compensates for the high-frequency gain, but does not control the low-frequency gain, so that the conventional implementation method has certain limitations, and the equalizer is difficult to be capable of performing signal transmission at a rate of more than 10 Gbps.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides an active inductance-based broadband analog equalizer integrated circuit.
The technical scheme adopted by the invention is as follows:
a broadband analog equalizer integrated circuit based on active inductance comprises a main amplifier, an auxiliary amplifier and a low-pass filter amplifier, wherein the main amplifier is a differential amplifier which adopts the active inductance as a load, the active inductance provides a zero point in a transmission equation, and the main amplifier is used as a main amplification channel and is used for compensating the gain of a high-frequency signal; the auxiliary amplifier and the low-pass filter amplifier form a feed-forward path which is used for suppressing high-frequency signals and amplifying low-frequency signals;
the main amplifier comprises an active inductor, a current source and two transistors, two input ends of an analog signal are respectively connected with two input ends of a low-pass filter amplifier, two output ends of the low-pass filter amplifier are connected with two input ends of an auxiliary amplifier, two output ends of the auxiliary amplifier are respectively and correspondingly connected with two output ends of the active inductor, each output end of the active inductor is respectively connected with a drain electrode of one transistor, a grid electrode of each transistor is respectively connected with one input end of the analog signal, source electrodes of the two transistors are jointly connected with one end of the current source, the other end of the current source is grounded, and the current source is used for adjusting gain and bandwidth of the main amplifier.
Further, the main amplifier comprises a variable current source Ib1NMOS transistors N1-N4, a capacitor C1, a capacitor C2, a resistor R1 and a resistor R2; the NMOS transistor N3, the capacitor C1 and the resistor R1 form an active inductor which is used as a load of the output end ON of the main amplifier; the NMOS transistor N4, the capacitor C2 and the resistor R2 form another active inductor which is used as a load of the output end OP of the main amplifier;
the source electrode of the NMOS transistor N3 is used as the output end ON of the main amplifier, the grid electrode of the NMOS transistor N3 is respectively connected with one end of a capacitor C1 and one end of a resistor R1, and the drain electrode of the NMOS transistor N3 is connected with a power supply VDD; the other end of the capacitor C1 is connected with the source electrode of the NMOS transistor N3; the other end of the resistor R1 is connected with a power supply VGG;
the source of the NMOS transistor N4 is used as the other output OP of the main amplifier; the gate of the NMOS transistor N4 is connected with one end of the capacitor C2 and the resistor R2, and the drain of the NMOS transistor N4 is connected with the power supply VDD; the other end of the capacitor C2 is connected with the source electrode of the NMOS transistor N4; the other end of the resistor R2 is connected with a power supply VGG;
the source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2;
the source of the NMOS transistor N3 is connected to the drain of the NMOS transistor N1;
the gate of the NMOS transistor N1 is connected with the input end INP of the analog signal, and the gate of the NMOS transistor N2 is connected with the input end INN of the analog signal;
NMOS transistor N1 and NMOS transistor N2Are connected in common to a current source Ib1An output end Nd 0; current source Ib1And the other end of the same is grounded.
Further, the auxiliary amplifier comprises a variable current source Ib2NMOS transistor N5 and NMOS transistor N6, current source Ib2One end is grounded, and the current source Ib2The other end of the first transistor is respectively connected with the source electrodes of the NMOS transistor N5 and the NMOS transistor N6; the gate of the NMOS transistor N5 is connected with the output end ON1 of the low-pass filter amplifier, and the drain of the NMOS transistor N5 is connected with the output end ON of the main amplifier; the gate of the NMOS transistor N6 is connected to the output OP1 of the low pass filter amplifier, and the drain of the NMOS transistor N6 is connected to the output OP of the main amplifier.
Further, the low-pass filter amplifier comprises a variable current source Ib3NMOS transistor N7, NMOS transistor N8, capacitor C3, capacitor C4, resistor R3 and resistor R4, and current source Ib3One end is grounded, and the current source Ib3The other end is connected with the sources of the NMOS transistor N7 and the NMOS transistor N8; the gate of the NMOS transistor N7 is connected to the analog signal input terminal INP, and the drain of the NMOS transistor N7 serves as the output terminal ON1 of the low-pass filter amplifier; the gate of the NMOS transistor N8 is connected to the analog signal input terminal INN, and the drain of the NMOS transistor N8 is used as the output terminal OP1 of the low-pass filter amplifier; one end of the capacitor C3 is connectedThe other end of the capacitor C3 is connected with a power supply VDD; one end of the resistor R3 is connected with the drain of the NMOS transistor N7, and the other end of the resistor R3 is connected with a power supply VDD; one end of the capacitor C4 is connected with the drain of the NMOS transistor N8, and the other end of the capacitor C4 is connected with a power supply VDD; one end of the resistor R4 is connected with the drain of the NMOS transistor N8, and the other end of the resistor R4 is connected with a power supply VDD; the capacitor C3 and the resistor R3 form a low-pass load impedance; the capacitor C4 and the resistor R4 form another low-pass load impedance.
Further, the impedance of each active inductor of the main amplifier is:
wherein, gmFor the exaggeration of the NMOS transistor N3, R is the resistance value of the resistor R1, CtotC of capacitor C1 and NMOS transistor N3gsSumming; or gmFor the exaggeration of the NMOS transistor N4, R is the resistance value of the resistor R2, CtotC of capacitor C2 and NMOS transistor N4gsSumming;
as can be seen from equation (1), the impedance of each active inductor produces a pole and a zero, which is used for high frequency gain compensation.
Further, the low-pass load impedance is represented as:
wherein R is34Is a resistance R3Resistance value of C34Is a capacitor C3The capacitance value of (a); or R34Is a resistance R4Resistance value of C34Is a capacitor C4The capacitance value of (a);
as can be seen from equation (2), the impedance exhibits a low-pass filtering characteristic.
Further, the transfer function of the wideband analog equalizer is represented as:
F(s)＝(-gm2ZRC)-(-gm1ZL)+(-gm0ZL)＝(gm2gm1ZRC-gm0)ZL (3)
wherein when Z isLZ represents an active inductor consisting of an NMOS transistor N3, a capacitor C1 and a resistor R1RCG represents the low-pass load impedance formed by the capacitor C3 and the resistor R3m0Is a quart of NMOS transistor N1, gm1Is a quart of NMOS transistor N5, gm2Is a quart of the NMOS transistor N7; when Z isLZ represents an active inductor consisting of an NMOS transistor N4, a capacitor C2 and a resistor R2RCG represents the low-pass load impedance formed by the capacitor C4 and the resistor R4m0Is a quart of NMOS transistor N2, gm1Is a quart of NMOS transistor N6, gm2Is an exaggeration of the NMOS transistor N8.
The invention adopts the technical scheme that the main amplification path is formed by a main amplifier, the main amplifier is a differential amplifier which adopts an active inductor as a load, and the active inductor can provide a zero point in a transmission equation to compensate the gain of a high-frequency signal. The low-pass filter amplifier and the auxiliary amplifier form a feed-forward path of signals, suppress high-frequency signals and amplify low-frequency signals, the feed-forward path signals are finally connected to the output node of the main amplifier and act with the output signal of the main amplifier, but the phase difference between the output signals of the feed-forward path and the output signal of the main amplifier is 180 degrees, so that the two path signals realize the subtraction of low-frequency signal components on the output node of the main amplifier. The load of the main amplifier is an impedance based on an active inductance network, and has the effect of promoting high-frequency gain. The circuit structure of the invention respectively carries out gain compensation on high-frequency components in a channel and carries out gain suppression on low-frequency signals through two paths, thereby obviously improving the working bandwidth of the equalizer. The equalizer adopts the active inductor as a load to enhance the high-frequency gain of a signal; the feedforward low-pass filter amplifier path is adopted to restrain the low-frequency gain of the signal, so that the working bandwidth of the equalizer can be effectively improved.
Drawings
The invention is described in further detail below with reference to the accompanying drawings and the detailed description;
FIG. 1 is a block diagram of an active inductor-based wideband analog equalizer IC according to the present invention;
fig. 2 is a schematic structural diagram of an integrated circuit of a wideband analog equalizer based on active inductance according to the present invention.
Detailed Description
As shown in fig. 1 or 2, the present invention discloses an active inductance-based wideband analog equalizer integrated circuit, which includes a main amplifier, an auxiliary amplifier and a low-pass filter amplifier, wherein the main amplifier is a differential amplifier using an active inductance as a load, the active inductance provides a zero point in a transmission equation, and the main amplifier is used as a main amplification path for compensating a gain of a high-frequency signal; the auxiliary amplifier and the low-pass filter amplifier form a feed-forward path which is used for suppressing high-frequency signals and amplifying low-frequency signals;
the main amplifier comprises an active inductor, a current source and two transistors, two input ends of an analog signal are respectively connected with two input ends of a low-pass filter amplifier, two output ends of the low-pass filter amplifier are connected with two input ends of an auxiliary amplifier, two output ends of the auxiliary amplifier are respectively and correspondingly connected with two output ends of the active inductor, each output end of the active inductor is respectively connected with a drain electrode of one transistor, a grid electrode of each transistor is respectively connected with one input end of the analog signal, source electrodes of the two transistors are jointly connected with one end of the current source, the other end of the current source is grounded, and the current source is used for adjusting gain and bandwidth of the main amplifier.
Further, the main amplifier comprises a variable current source Ib1NMOS transistors N1-N4, a capacitor C1, a capacitor C2, a resistor R1 and a resistor R2; the NMOS transistor N3, the capacitor C1 and the resistor R1 form an active inductor which is used as a load of the output end ON of the main amplifier; the NMOS transistor N4, the capacitor C2 and the resistor R2 form another active inductor which is used as a load of the output end OP of the main amplifier;
the source electrode of the NMOS transistor N3 is used as the output end ON of the main amplifier, the grid electrode of the NMOS transistor N3 is respectively connected with one end of a capacitor C1 and one end of a resistor R1, and the drain electrode of the NMOS transistor N3 is connected with a power supply VDD; the other end of the capacitor C1 is connected with the source electrode of the NMOS transistor N3; the other end of the resistor R1 is connected with a power supply VGG;
the source of the NMOS transistor N4 is used as the other output OP of the main amplifier; the gate of the NMOS transistor N4 is connected with one end of the capacitor C2 and the resistor R2, and the drain of the NMOS transistor N4 is connected with the power supply VDD; the other end of the capacitor C2 is connected with the source electrode of the NMOS transistor N4; the other end of the resistor R2 is connected with a power supply VGG;
the source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2;
the source of the NMOS transistor N3 is connected to the drain of the NMOS transistor N1;
the gate of the NMOS transistor N1 is connected with the input end INP of the analog signal, and the gate of the NMOS transistor N2 is connected with the input end INN of the analog signal;
NMOS transistor N1 and NMOS transistor N2Are connected in common to a current source Ib1An output end Nd 0; current source Ib1And the other end of the same is grounded.
Further, the auxiliary amplifier comprises a variable current source Ib2NMOS transistor N5 and NMOS transistor N6, current source Ib2One end is grounded, and the current source Ib2The other end of the first transistor is respectively connected with the source electrodes of the NMOS transistor N5 and the NMOS transistor N6; the gate of the NMOS transistor N5 is connected with the output end ON1 of the low-pass filter amplifier, and the drain of the NMOS transistor N5 is connected with the output end ON of the main amplifier; the gate of the NMOS transistor N6 is connected to the output OP1 of the low pass filter amplifier, and the drain of the NMOS transistor N6 is connected to the output OP of the main amplifier.
Further, the low-pass filter amplifier comprises a variable current source Ib3NMOS transistor N7, NMOS transistor N8, capacitor C3, capacitor C4, resistor R3 and resistor R3, and current source Ib3One end is grounded, and the current source Ib3The other end is connected with the sources of the NMOS transistor N7 and the NMOS transistor N8; the gate of the NMOS transistor N7 is connected to the analog signal input terminal INP, and the drain of the NMOS transistor N7 serves as the output terminal ON1 of the low-pass filter amplifier; the gate of the NMOS transistor N8 is connected to the analog signal input terminal INN, and the drain of the NMOS transistor N8 is used as the output terminal OP1 of the low-pass filter amplifier; one end of the capacitor C3 is connected to the drain of the NMOS transistor N7, and the other end of the capacitor C3 is connected to the groundA source VDD; one end of the resistor R3 is connected with the drain of the NMOS transistor N7, and the other end of the resistor R3 is connected with a power supply VDD; one end of the capacitor C4 is connected with the drain of the NMOS transistor N8, and the other end of the capacitor C4 is connected with a power supply VDD; one end of the resistor R4 is connected with the drain of the NMOS transistor N8, and the other end of the resistor R4 is connected with a power supply VDD; the capacitor C3 and the resistor R3 form a low-pass load impedance; the capacitor C4 and the resistor R4 form another low-pass load impedance.
Further, the impedance of each active inductor of the main amplifier is:
wherein, gmFor the exaggeration of the NMOS transistor N3, R is the resistance value of the resistor R1, CtotC of capacitor C1 and NMOS transistor N3gsSumming; or gmFor the exaggeration of the NMOS transistor N4, R is the resistance value of the resistor R2, CtotC of capacitor C2 and NMOS transistor N4gsSumming;
as can be seen from equation (1), the impedance of each active inductor produces a pole and a zero, which is used for high frequency gain compensation.
Further, the low-pass load impedance is represented as:
wherein R is34Is a resistance R3Resistance value of C34Is a capacitor C3The capacitance value of (a); or R34Is a resistance R4Resistance value of C34Is a capacitor C4The capacitance value of (a);
as can be seen from equation (2), the impedance exhibits a low-pass filtering characteristic.
Further, the transfer function of the wideband analog equalizer is represented as:
F(s)＝(-gm2ZRC)(-gm1ZL)+(-gm0ZL)＝(gm2gm1ZRC-gm0)ZL (3)
wherein when Z isLZ represents an active inductor consisting of an NMOS transistor N3, a capacitor C1 and a resistor R1RCG represents the low-pass load impedance formed by the capacitor C3 and the resistor R3m0Is a quart of NMOS transistor N1, gm1Is a quart of NMOS transistor N5, gm2Is a quart of the NMOS transistor N7; when Z isLZ represents an active inductor consisting of an NMOS transistor N4, a capacitor C2 and a resistor R2RCG represents the low-pass load impedance formed by the capacitor C4 and the resistor R4m0Is a quart of NMOS transistor N2, gm1Is a quart of NMOS transistor N6, gm2Is an exaggeration of the NMOS transistor N8.
The invention adopts the technical scheme that the main amplification path is formed by a main amplifier, the main amplifier is a differential amplifier which adopts an active inductor as a load, and the active inductor can provide a zero point in a transmission equation to compensate the gain of a high-frequency signal. The low-pass filter amplifier and the auxiliary amplifier form a feed-forward path of signals, suppress high-frequency signals and amplify low-frequency signals, the feed-forward path signals are finally connected to the output node of the main amplifier and act with the output signal of the main amplifier, but the phase difference between the output signals of the feed-forward path and the output signal of the main amplifier is 180 degrees, so that the two path signals realize the subtraction of low-frequency signal components on the output node of the main amplifier. The load of the main amplifier is an impedance based on an active inductance network, and has the effect of promoting high-frequency gain. The circuit structure of the invention respectively carries out gain compensation on high-frequency components in a channel and carries out gain suppression on low-frequency signals through two paths, thereby obviously improving the working bandwidth of the equalizer. The equalizer adopts the active inductor as a load to enhance the high-frequency gain of a signal; the feedforward low-pass filter amplifier path is adopted to restrain the low-frequency gain of the signal, so that the working bandwidth of the equalizer can be effectively improved.
Claims (7)
1. An active inductance based wideband analog equalizer integrated circuit, comprising: the high-frequency signal compensation circuit comprises a main amplifier, an auxiliary amplifier and a low-pass filter amplifier, wherein the main amplifier is a differential amplifier which adopts an active inductor as a load, the active inductor provides a zero point in a transmission equation, and the main amplifier is used as a main amplification channel and is used for compensating the gain of a high-frequency signal; the auxiliary amplifier and the low-pass filter amplifier form a feed-forward path which is used for suppressing high-frequency signals and amplifying low-frequency signals;
the main amplifier comprises an active inductor, a current source and two transistors, two input ends of an analog signal are respectively connected with two input ends of a low-pass filter amplifier, two output ends of the low-pass filter amplifier are connected with two input ends of an auxiliary amplifier, two output ends of the auxiliary amplifier are respectively and correspondingly connected with two output ends of the active inductor, each output end of the active inductor is respectively connected with a drain electrode of one transistor, a grid electrode of each transistor is respectively connected with one input end of the analog signal, source electrodes of the two transistors are jointly connected with one end of the current source, the other end of the current source is grounded, and the current source is used for adjusting gain and bandwidth of the main amplifier.
2. The active inductance based wideband analog equalizer integrated circuit of claim 1, wherein: the main amplifier comprises a variable current source Ib1NMOS transistors N1-N4, a capacitor C1, a capacitor C2, a resistor R1 and a resistor R2; the NMOS transistor N3, the capacitor C1 and the resistor R1 form an active inductor which is used as a load of the output end ON of the main amplifier; the NMOS transistor N4, the capacitor C2 and the resistor R2 form another active inductor which is used as a load of the output end OP of the main amplifier;
the source electrode of the NMOS transistor N3 is used as the output end ON of the main amplifier, the grid electrode of the NMOS transistor N3 is respectively connected with one end of a capacitor C1 and one end of a resistor R1, and the drain electrode of the NMOS transistor N3 is connected with a power supply VDD; the other end of the capacitor C1 is connected with the source electrode of the NMOS transistor N3; the other end of the resistor R1 is connected with a power supply VGG;
the source of the NMOS transistor N4 is used as the other output OP of the main amplifier; the gate of the NMOS transistor N4 is connected with one end of the capacitor C2 and the resistor R2, and the drain of the NMOS transistor N4 is connected with the power supply VDD; the other end of the capacitor C2 is connected with the source electrode of the NMOS transistor N4; the other end of the resistor R2 is connected with a power supply VGG;
the source of the NMOS transistor N4 is connected to the drain of the NMOS transistor N2;
the source of the NMOS transistor N3 is connected to the drain of the NMOS transistor N1;
the gate of the NMOS transistor N1 is connected with the input end INP of the analog signal, and the gate of the NMOS transistor N2 is connected with the input end INN of the analog signal;
NMOS transistor N1 and NMOS transistor N2Are connected in common to a current source Ib1An output end NdO; current source Ib1And the other end of the same is grounded.
3. The active inductance based wideband analog equalizer integrated circuit of claim 2, wherein: the auxiliary amplifier comprises a variable current source Ib2NMOS transistor N5 and NMOS transistor N6, current source Ib2One end is grounded, and the current source Ib2The other end of the first transistor is respectively connected with the source electrodes of the NMOS transistor N5 and the NMOS transistor N6; the gate of the NMOS transistor N5 is connected with the output end ON1 of the low-pass filter amplifier, and the drain of the NMOS transistor N5 is connected with the output end ON of the main amplifier; the gate of the NMOS transistor N6 is connected to the output OP1 of the low pass filter amplifier, and the drain of the NMOS transistor N6 is connected to the output OP of the main amplifier.
4. The active inductance based wideband analog equalizer integrated circuit of claim 3, wherein: the low-pass filter amplifier comprises a variable current source Ib3NMOS transistor N7, NMOS transistor N8, capacitor C3, capacitor C4, resistor R3 and resistor R4, and current source Ib3One end is grounded, and the current source Ib3The other end is connected with the sources of the NMOS transistor N7 and the NMOS transistor N8; the gate of the NMOS transistor N7 is connected to the analog signal input terminal INP, and the drain of the NMOS transistor N7 serves as the output terminal ON1 of the low-pass filter amplifier; the gate of the NMOS transistor N8 is connected to the analog signal input terminal INN, and the drain of the NMOS transistor N8 is used as the output terminal OP1 of the low-pass filter amplifier; one end of the capacitor C3 is connected with the drain electrode of the NMOS transistor N7, and the other end of the capacitor C3 is connected with a power supply VDD; one end of the resistor R3 is connected to the drain of the NMOS transistor N7The other end of the resistor R3 is connected with a power supply VDD; one end of the capacitor C4 is connected with the drain of the NMOS transistor N8, and the other end of the capacitor C4 is connected with a power supply VDD; one end of the resistor R4 is connected with the drain of the NMOS transistor N8, and the other end of the resistor R4 is connected with a power supply VDD; the capacitor C3 and the resistor R3 form a low-pass load impedance; the capacitor C4 and the resistor R4 form another low-pass load impedance.
5. The active inductance based wideband analog equalizer integrated circuit of claim 4, wherein: the impedance of each active inductor of the main amplifier is:
wherein, gmIs transconductance of an NMOS transistor N3, R is resistance value of a resistor R1, CtotC of capacitor C1 and NMOS transistor N3gsSumming; or gmIs transconductance of an NMOS transistor N4, R is resistance value of a resistor R2, CtotC of capacitor C2 and NMOS transistor N4gsSumming;
as can be seen from equation (1), the impedance of each active inductor produces a pole and a zero, which is used for high frequency gain compensation.
6. The active inductance based wideband analog equalizer integrated circuit of claim 5, wherein: the low-pass load impedance is expressed as:
wherein R is34Is a resistance R3Resistance value of C34Is a capacitor C3The capacitance value of (a); or R34Is a resistance R4Resistance value of C34Is a capacitor C4The capacitance value of (a);
as can be seen from equation (2), the impedance exhibits a low-pass filtering characteristic.
7. The active inductance based wideband analog equalizer integrated circuit of claim 6, wherein: the transfer function of the wideband analog equalizer is expressed as:
F(s)＝(-gm2ZRC)(-gm1ZL，i)+(-gm0ZL，i)＝(gm2gm1ZRC-gm0)ZL，i (3)
wherein when Z isL，iZ represents an active inductor consisting of an NMOS transistor N3, a capacitor C1 and a resistor R1RCG represents the low-pass load impedance formed by the capacitor C3 and the resistor R3m0Transconductance of NMOS transistor N1, gm1Transconductance of NMOS transistor N5, gm2Is the transconductance of NMOS transistor N7; when Z isL，iZ represents an active inductor consisting of an NMOS transistor N4, a capacitor C2 and a resistor R2RCG represents the low-pass load impedance formed by the capacitor C4 and the resistor R4m0Transconductance of NMOS transistor N2, gm1Transconductance of NMOS transistor N6, gm2Is the transconductance of NMOS transistor N8.
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