CN108270402A - Voltage detecting and control circuit - Google Patents
Voltage detecting and control circuit Download PDFInfo
- Publication number
- CN108270402A CN108270402A CN201810199958.6A CN201810199958A CN108270402A CN 108270402 A CN108270402 A CN 108270402A CN 201810199958 A CN201810199958 A CN 201810199958A CN 108270402 A CN108270402 A CN 108270402A
- Authority
- CN
- China
- Prior art keywords
- voltage
- module
- output terminal
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/301—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in MOSFET amplifiers
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16576—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing DC or AC voltage with one threshold
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Amplifiers (AREA)
Abstract
Voltage detecting and control circuit belong to Analogous Integrated Electronic Circuits technical field.Including reference voltage output buffer module, voltage operational module and comparator module, the input terminal connection reference voltage of reference voltage output buffer module, output terminal connects the second input terminal of voltage operational module；The external adjustment voltage of first input end connection of voltage operational module is handled to obtain the first input end that comparison signal is output to comparator module by the input signal to its first input end and the second input terminal；Second input terminal of comparator module connects voltage to be detected, and a control signal is obtained as voltage detecting and the output signal of control circuit by comparing voltage to be detected and comparison signal.Detection range of the present invention is big, applied widely；Dynamic amplifier is particularly suitable for, in certain variation range of supply voltage, obtains the dynamic amplifier amplification factor not changed with mains voltage variations, so as to obtain the gain stabilization dynamic amplifier of anti-mains fluctuations.
Description
Technical field
The invention belongs to Analogous Integrated Electronic Circuits technical fields, are related to a kind of voltage detecting and control circuit, are particularly suitable for
The correction of gain under the detection and mains fluctuations of dynamic amplifier mains fluctuations.
Background technology
Digital circuit operating rate is continuously improved in the progress of integrated circuit technology, and integration density constantly increases, power supply electricity
Pressure continuously decreases, and the data of characterization digital circuit comprehensive performance significantly improve；However, technique progress, supply voltage are reduced and are deteriorated
The performances of many important analog modules influences maximum to surely belong to amplifier.As widely applied in analog circuit
Basic module, on the one hand, technique progress produces the non-ideal effects of many cmos devices, this influences sensitive analog circuit
Larger, on the other hand, supply voltage reduction causes the structure choice of amplifier to be restricted.In view of this, dynamic amplifier into
For the hot spot for designing and studying, dynamic amplifier is simple in structure and without quiescent dissipation, has well adapted to low supply voltage, greatly
Reduce power consumption, thus be applied in many circuits, such as analog-digital converter (ADC)；But the increasing of dynamic amplifier
Benefit is easily influenced by mains fluctuations, and in actual circuit, the fluctuation of supply voltage is difficult to avoid that, this is just greatly limited
The performance and the scope of application of dynamic amplifier are made, therefore when design is using dynamic amplifier, needed to consider to be reduced or eliminated
Influence of the mains fluctuations to gain.
A kind of dynamic amplifier with common mode detection is as shown in Figure 1, in Fig. 1, the dynamic amplifier is mainly multiple by being used for
The 4th PMOS tube M1, the 5th PMOS tube M2, the 6th PMOS tube M3 of position are used as and input the third NMOS tube M4 to pipe, the 4th
NMOS tube M5 controls the 5th NMOS tube M6, the 6th NMOS tube M7 of amplification process, for detecting the second electricity of capacitance of output common mode
Hold C1, third capacitance C2, the first votage control switch SW1 and the second votage control switch SW2 of control output access and the 4th of expression load the
Capacitance CLN, the 5th capacitance CLPComposition.External timing signal clk controls dynamic amplifier resetting and amplifying two stages in figure
Switching, common mode detector C MD is to output common mode VxIt is detected, works as VxWhen point voltage is more than the fixed voltage of setting, V is exportedctrl
For high level, work as VxWhen point voltage is less than the fixed voltage of setting, V is exportedctrlFor low level；Signal V is controlled by outputctrl
Change the control amplification of the 5th NMOS tube M6 grid ends voltage to terminate, the pressures of the first votage control switch SW1 and second of load are connect by control
Control switch SW2 disconnects load and dynamic amplifier output.
Wherein, in reseting stage, the signal clk by external clock control is low level, for the 4th PMOS tube of reset
M1, the 5th PMOS tube M2, the 6th PMOS tube M3 are opened, while are turned off by the 6th NMOS tube M7 of clk controls, in dynamic amplifier
Portion node V1、V2、VxIt is charged to supply voltage, the V of common mode detector C MD outputsctrlFor high level, the 5th NMOS tube M6 is led
Logical, the first votage control switch SW1 and the second votage control switch SW2 are closed, the 4th capacitance C of output loadingLN, the 5th capacitance CLPWith put
Big device is connected directly and is charged to supply voltage, this is reset state.
When external timing signal clk becomes high level, which starts to amplify, and detailed process is：By it is external when
The 4th PMOS tube M1, the 5th PMOS tube M2, the 6th PMOS tube M3 of clock signal clk controls are directly turned off, at this time VxKeep high resistant,
Then VxNode total amount of electric charge remains unchanged, and is opened by the 6th NMOS tube M7 of clk controls, by the input remained unchanged during amplification
Signal Vip、VinThird NMOS tube M4, the 4th NMOS tube M5 of control start to V1、V2Two nodes discharge, if it is considered to setting
Fixed common-mode voltage is Vdet, it is V that dynamic amplifier, which is inputted to the NMOS threshold voltages of pipe,th, β=Cox* μ * W/L, wherein CoxFor
Unit area gate oxide capacitance, μ are carrier mobility, and W/L is metal-oxide-semiconductor breadth length ratio, load capacitance CLP=CLN=CL, then
Voutn, Voutp2 points of voltage change is with the relationship of input signal and time：
In V1、V2Discharge process in, VxThe voltage of point can pass through the second capacitance C1, third capacitance C2Follow V1、V2Variation,
Usually take C1=C2, then V in discharge processxPoint voltage change expression formula be：
VxThe voltage of point is with V1、V2Electric discharge constantly decline, when the common-mode voltage for dropping to setting, then VctrlBy high electricity
It is flat to become low level, the 5th NMOS tube M6 shutdowns of dynamic amplifier are controlled in this way, cut off V1、V2Discharge path, simultaneously switch off
First votage control switch SW1 and the second votage control switch SW2 disconnects the output of load capacitance and dynamic amplifier, is put so as to preserve
Voltage after big, amplification time VxFrom supply voltage VDDThe time t of the common-mode voltage of setting is discharged into, can be expressed as：
Correspondingly, gain can be determined by amplification time：
V in above formulacmFor input differential signal VipAnd VinCommon mode electrical level, work as VipAnd VinDifference it is smaller when, gain table
It can be reduced to up to formula：
Obviously, by gain expressions it can be found that gain and the V of the dynamic amplifierDDCorrelation, in making for actual circuit
With in the process, supply voltage is very likely in different DC voltages, even if carrying out voltage stabilizing, supply voltage using voltage-stablizer
Fluctuation also influence whether the gain of dynamic amplifier, this is hidden for the circuit application of fixed gain amplifier is needed to bring
Suffer from, input signal amplification factor is caused to change.
Invention content
Part against the above deficiency, the present invention proposes a kind of voltage detecting and control circuit, for detecting voltage and passing through
Testing result provides control signal, is particularly suitable for increasing under the mains fluctuations detection and mains fluctuations of dynamic amplifier
Voltage detecting provided by the invention and control circuit are replaced the common mode detector C MD in dynamic amplifier, overcome by the correction of benefit
The variation of above-mentioned dynamic amplifier supply voltage and fluctuate the influence to gain.
The technical scheme is that：
Voltage detecting and control circuit export buffer module 402, voltage operational module 403 including reference voltage and compare
Device module 404,
The input terminal connection reference voltage of the reference voltage output buffer module 402, output terminal connect the voltage
Second input terminal of computing module 403；
The first input end of the comparator module 404 connects the output terminal of the voltage operational module 403, and second is defeated
Enter end and connect voltage to be detected, output terminal of the output terminal as the voltage detecting and control circuit；
The voltage operational module 403 include the first phase inverter INV1, the second phase inverter INV2, third phase inverter INV3,
First capacitance C3, the first NMOS tube MN1, the second NMOS tube MN2, the first PMOS tube MP1 and the second PMOS tube MP2,
First input end connection external adjustment electricity of the source electrode of first PMOS tube MP1 as the voltage operational module 403
Pressure, grid connect the output terminal of the first phase inverter INV1, drain electrode connection the first NMOS tube MN1's and the second PMOS tube MP2
Drain electrode and the first capacitance C3Top crown；
The input terminal of second phase inverter INV2 connects the input terminal of the first phase inverter INV1 and connects external timing signal
Clk, output terminal connect the grid of the first NMOS tube MN1；
The source electrode of second PMOS tube MP2 connects the source electrode of the first NMOS tube MN1 and as the voltage operational module 403
Second input terminal, the input terminal of grid connection third phase inverter INV3 simultaneously connect external timing signal clk；
The output terminal of the grid connection third phase inverter INV3 of second NMOS tube MN2, the first capacitance C of drain electrode connection3's
Bottom crown and as the output terminal of the voltage operational module 403, source electrode ground connection.
Specifically, the reference voltage output buffer module 402 includes operational amplifier, first resistor R1 and the 3rd PMOS
Pipe MP3,
The positive input of operational amplifier connects the reference voltage, negative input connection third PMOS tube MP3
Drain electrode and first resistor R1 one end and as the reference voltage output buffer module 402 output terminal, output terminal connect
The grid of third PMOS tube MP3 is connect, the source electrode of third PMOS tube MP3 connects supply voltage, the other end ground connection of first resistor R1.
Specifically, the comparator module 404 includes a comparator 405, the negative input of the comparator 405 connects
Connect the output terminal of the voltage operational module 403, positive input connects the voltage to be detected, described in output terminal is used as
The output terminal of voltage detecting and control circuit.
Specifically, the external adjustment voltage VYVoltage value be more than the reference voltage output buffer module 402 export
The voltage value V at endrefbuf。
The present invention operation principle be：
Reference voltage VrefBe one not with supply voltage, temperature, technique change accurate voltage, pass through benchmark electricity
A buffering reference voltage V is obtained after pressure output buffer module 402refbuf；Voltage operational module 403 is in external timing signal clk
Control under, to outside adjustment voltage VYWith buffering reference voltage VrefbufIt is handled, obtains a comparison signal Vdet=VY-
Vrefbuf；By comparing voltage V to be detectedXWith comparison signal VdetVoltage value control output control signal VctrlFor low level
Or high level, by adjusting comparison signal VdetValue adjustment control signal VctrlCondition for high level.
Beneficial effects of the present invention are：Voltage detecting and control circuit detection range provided by the invention is big, the scope of application
Extensively, dynamic amplifier is particularly suitable for, by adjusting the comparison signal V under mains fluctuationsdetVoltage value, so as to adjust
The amplification time of dynamic amplifier under whole different electrical power voltage, in certain variation range of supply voltage, obtains not with power supply
The dynamic amplifier amplification factor of voltage change variation, so as to obtain the gain stabilization dynamic amplifier of anti-mains fluctuations.
Description of the drawings
Fig. 1 is the circuit diagram of the charge transfer type dynamic amplifier of conventional belt common mode detection.
Fig. 2 is suitable for charge transfer type dynamic amplifier correcting gain for voltage detecting provided by the invention and control circuit
When circuit diagram.
Fig. 3 is the internal module composition schematic diagram of voltage detecting provided by the invention and control circuit.
Fig. 4 is the internal structure schematic diagram that reference voltage exports buffer module in embodiment.
Fig. 5 is the internal structure schematic diagram of voltage operational module in the present invention.
Fig. 6 is the internal structure schematic diagram of comparator module in embodiment.
Fig. 7 is that the present invention is suitable for charge transfer type dynamic amplifier in embodiment to realize gain stabilization under voltage fluctuation
Circuit diagram.
Fig. 8 is the circuit diagram when present invention to be used for voltage monitoring in embodiment.
Specific embodiment
It further illustrates the present invention in the following with reference to the drawings and specific embodiments.
As shown in figure 3, the present invention includes reference voltage output buffer module 402, voltage operational module 403 and comparator mould
Block 404, the input terminal connection reference voltage V of reference voltage output buffer module 402ref, output terminal output buffering reference voltage
VrefbufTo the second input terminal of voltage operational module 403；The external adjustment electricity of first input end connection of voltage operational module 403
Press VY, the signal of its first input end and the second input terminal is handled under the control of external timing signal clk, obtains one
A comparison signal Vdet=VY-VrefbufIt is output to the first input end of comparator module 404；The second of comparator module 404 is defeated
Enter end and connect voltage V to be detectedX, by comparing voltage V to be detectedXWith comparison signal VdetBe worth to one control signal
Vctrl。
Voltage detecting and control circuit provided by the invention are by adjusting reference voltage VrefWith outside adjustment voltage VYValue
Obtain different comparison signal VdetValue, so as to realize the output of different condition control signal V as neededctrlGeneration,
Comparison signal VdetMay range from 0~VDD, detection range is big.
As shown in Figure 2 and Figure 7, voltage detecting and control circuit provided by the invention can be replaced in conventional dynamic amplifier
Common mode detector C MD be applied in dynamic amplifier, the first input end of voltage detecting and control circuit connection dynamic is amplified
Output common mode electrical voltage point in device, the second input terminal connection supply voltage VDD, i.e., voltage V to be detectedXFor output common mode voltage,
Outside adjustment voltage VYFor supply voltage VDD, the control signal V of outputctrlControl the amplification process of dynamic amplifier.Embodiment
Middle charge transfer type dynamic amplifier includes the 4th PMOS tube M1, the 5th PMOS tube M2, the 6th PMOS tube M3, third NMOS tube
M4, the 4th NMOS tube M5, the 5th NMOS tube M6, the 6th NMOS tube M7, the second capacitance C1, third capacitance C2, the 4th capacitance CLN,
Five capacitance CLP, the first votage control switch SW1 and the second votage control switch SW2.Third NMOS tube M4 and the 4th NMOS tube M5 is put for dynamic
The input of big device is to pipe, and the grid of third NMOS tube M4 is the normal phase input end of dynamic amplifier, the grid of the 4th NMOS tube M5
For the negative-phase input of dynamic amplifier, the source electrode connection source electrode of the 4th NMOS tube M5 and third NMOS tube of third NMOS tube M4
The drain electrode of M6, the grid connection control signal V of third NMOS tube M6ctrl, the drain electrode of the 6th NMOS tube M7 of source electrode connection, the 6th
The grid connection external timing signal clk of NMOS tube M7, source electrode ground connection.The drain electrode of third NMOS tube M4 connects the 4th PMOS tube
The drain electrode of M1, the second capacitance C1Top crown and the first votage control switch SW1 input terminal, be dynamic amplifier negative output end
V1, the drain electrode of the 6th PMOS tube M3 of drain electrode connection of the 4th NMOS tube M5, third capacitance C2Top crown and the second votage control switch
The input terminal of SW2 is the positive output end V of dynamic amplifier2, the second capacitance C of drain electrode connection of the 5th PMOS tube M21And third
Capacitance C2Bottom crown and the first input end of voltage detecting provided by the invention and control circuit, the 4th PMOS tube M1, the 5th
The grid of PMOS tube M2 and the 6th PMOS tube M3 all connect external timing signal clk, the 4th PMOS tube M1, the 5th PMOS tube M2 and
The source electrode of 6th PMOS tube M3 all connects supply voltage VDD, the control signal V of the invention exportedctrlControl the first votage control switch
The open and close of SW1 and the second votage control switch SW2, the output terminal of the first votage control switch SW1 connect the 4th capacitance CLNUpper pole
Plate, the output terminal of the second votage control switch SW2 connect the 5th capacitance CLPTop crown, the 4th capacitance CLNWith the 5th capacitance CLPUnder
Pole plate is grounded.
The circuit structure diagram of reference voltage output buffer module 402 in the present embodiment is illustrated in figure 4, including operation amplifier
Device, first resistor R1 and third PMOS tube MP3, the positive input connection reference voltage V of operational amplifierref, negative sense input
The drain electrode of end connection third PMOS tube MP3 and one end of first resistor R1 and the output terminal that buffer module is exported as reference voltage
Output buffering reference voltage Vrefbuf, the grid of output terminal connection third PMOS tube MP3, the source electrode of third PMOS tube MP3 connects electricity
Source voltage VDD, the other end ground connection of first resistor R1.Since the arithmetic operation process in voltage operational module 403 needs to buffer base
Quasi- voltage VrefbufHas higher response speed, it is therefore desirable to by reference voltage VrefBuffering obtains buffering reference voltage Vrefbuf,
It, which is acted on, mainly improves driving force, so as to meet in concrete application to the requirement of response speed.
Fig. 5 show the structure diagram of voltage operational module 403 in the present invention.Fig. 6, which is shown in the present embodiment, to be compared
The circuit structure diagram of device module 404, including a comparator 405, the negative input of the comparator 405 connects the voltage
The output terminal of computing module, positive input connect voltage V to be detectedX, output terminal is as the voltage detecting and control
The output terminal of circuit, as voltage V to be detectedXMore than comparison signal VdetVoltage value when, control signal VctrlIt exports as high level；
As voltage V to be detectedXLess than comparison signal VdetVoltage value when, control signal VctrlIt exports as low level.
When external timing signal clk is low level, the grid of the 4th PMOS tube M1 that are connected by external timing signal clk
Pole, the grid of the 5th PMOS tube M2, the 6th PMOS tube M3 grid be low level, the 4th PMOS tube in dynamic amplifier
M1, the 5th PMOS tube M2, the 6th PMOS tube M3 conductings, the grid of the 6th NMOS tube M7 of external timing signal clk connections are also
Low level, the 6th NMOS tube M7 shutdowns, the negative output end V of dynamic amplifier1, positive output end V2With internal node VxIt is filled
Electricity arrives supply voltage VDD, same external timing signal clk is connected to voltage operational module 403, and wherein external timing signal clk connects
The grid of the 5th PMOS tube M9 is connect, the 5th PMOS tube M9 is connected, outside control clock clk the first phase inverters of connection INV1, the
The input terminal of two phase inverter INV2, third phase inverter INV3, outside control clock clk connect the output terminal of the second phase inverter INV2
The grid of the first NMOS tube MN1 connect is high level, so as to which the first NMOS tube MN1 be controlled to be connected；External timing signal clk makes
The grid of first PMOS tube MP1 of the output terminal connection of one phase inverter INV1 is high level, so as to which the first PMOS tube MP1 be controlled to close
It is disconnected；External timing signal clk makes the grid of the second NMOS tube MN2 that the output terminal of third phase inverter INV3 connects for high level,
So as to which the second NMOS tube MN2 be controlled to be connected, then, the first capacitance C3Top crown voltage be charged to reference voltage output buffering
The benchmark buffer voltagc V that module 402 exportsrefbuf, the first capacitance C3Bottom crown voltage be discharged into ground, then, voltage operational
The internal node V of module 403topWith comparison signal VdetVoltage can be expressed as：
Vtop=Vrefbuf
Vdet=0
The negative-phase input voltage of comparator 405 inside comparator module 404 is what voltage operational module 403 exported
Comparison voltage Vdet, for comparator 405, the drain terminal section of the 5th PMOS tube M2 in the dynamic amplifier of normal phase input end connection
Point is the first input end V of voltage detecting and control circuitxIt is charged to supply voltage VDD, there is VDD>Vdet, comparator 405 it is defeated
Outlet connects the output terminal of comparator module 404, makes the control signal V of outputctrlVoltage rise to high level, so as to control
First votage control switch SW1, the second votage control switch SW2 are closed, and make the negative output end V of dynamic amplifier1It is connected to the 4th capacitance
CLNTop crown, the positive output end V of dynamic amplifier2It is connected to the 5th capacitance CLPTop crown, then the 4th capacitance CLN,
Five capacitance CLPTop crown voltage be supply voltage VDD, with controlling signal Vctrl5th NMOS tube of connected dynamic amplifier
The grid voltage of M6 is high level, then the 5th NMOS tube M6 is connected, but because the 6th NMOS tube M7 is turned off, therefore entire dynamic
Amplifier is in reseting stage, and the positive output end of dynamic amplifier and the voltage of negative output end are：
Voutn=V1=VDD
Voutp=V2=VDD
When external timing signal clk becomes high level from low level, dynamic amplifier proceeds by amplification, detailed process
For the grid of the 4th PMOS tube M1, grid, the 6th PMOS tube M3 of the 5th PMOS tube M2 connected by external timing signal clk
Grid become high level, the 4th PMOS tube M1 of control, the 5th PMOS tube M2 and the 6th PMOS tube M3 are turned off, meanwhile, outside
Portion clock signal clk makes the grid of the 6th NMOS tube M7 become high level, and the 6th NMOS tube M7 conductings are inputted to the 3rd NMOS of pipe
Pipe M4, the 4th NMOS tube M5 grid meet positive input voltage V respectivelyip, negative input voltage Vin, start to the 4th capacitance CLN
Top crown voltage VoutnWith the 5th capacitance CLPTop crown voltage VoutpDischarged (positive input voltage VipWith negative input voltage
VinRemained unchanged during amplification), it is equal and be all V to define third NMOS tube M4, the threshold voltage of the 4th NMOS tube M5th, two
β=C of personox* μ * W/L are also equal, and output voltage is with the variation relation of input voltage and time：
Same external timing signal clk is connected to mains fluctuations detection module 403, wherein external timing signal clk
The grid of the second PMOS tube MP2 is connected, turns off the second PMOS tube MP2, external timing signal clk the first phase inverters of connection
INV1, the second phase inverter INV2, third phase inverter INV3 input terminal, external timing signal clk makes the second phase inverter INV2's
The grid of first NMOS tube MN1 of output terminal connection is low level, and the first NMOS tube MN1 of control is turned off, external timing signal clk
Make the grid of the first PMOS tube MP1 that the output terminal of the first phase inverter INV1 connects for low level, so as to control the first PMOS tube
MP1 is connected, and external timing signal clk makes the grid of the second NMOS tube MN2 that the output terminal of third phase inverter INV3 connects be low
Level, control the second NMOS tube MN2 shutdowns, then, the first capacitance C3Top crown voltage be charged to supply voltage VDD, the 5th
Capacitance C3Bottom crown voltage VdetIt is expressed as：
Vdet=VDD-Vrefbuf
The negative-phase input voltage of comparator 405 inside comparator module 404 is the output of voltage operational module 403
Comparison signal VdetVoltage, for comparator 405, normal phase input end is connected to the 5th PMOS tube M2 in dynamic amplifier
Drain terminal Vx, VxThe voltage of point is expressed as in amplification process：
In amplification process, the normal phase input end voltage V of the comparator 405 inside comparator module 404xWith under amplification time
Drop, negative-phase input are the comparison signal V that voltage operational module 403 exportsdet, the normal phase input end voltage V of comparator 405xFrom
VDDIt is gradually reduced, once the positive input voltage V of comparator 405xLess than negative-phase input voltage Vdet, what comparator 405 exported
Control signal VctrlIt can become low level from high level, the first votage control switch SW1 of control, the second votage control switch SW2 shutdowns disconnect
The negative output end of dynamic amplifier and the 4th capacitance CLNThe connection of top crown disconnects the positive output end and of dynamic amplifier
Five capacitance CLPThe connection of top crown, simultaneously turns off the 5th NMOS tube M6, amplification time by comparator 405 normal phase input end voltage
VxFrom VDDDrop to VdetTime t determine：
After first votage control switch SW1, the second votage control switch SW2 shutdown, the 4th capacitance CLNWith the 5th capacitance CLPTop crown
Voltage is exactly the negative output voltage of amplified dynamic amplifier and positive output voltage, and is no longer changed before being resetted in next time
Become, the corresponding obtained gain of dynamic amplifier is expressed as：
V in above formulacmFor input differential signal VipAnd VinCommon mode electrical level, work as VipAnd VinDifference it is smaller when, gain table
It can be reduced to up to formula：
By above-mentioned sequence of operations it can be found that the gain of the dynamic amplifier is kept not under mains fluctuations
Become, it should be noted that reference voltage output buffer module 402 normal phase input end for the module-external generate not with voltage
The reference voltage V of variationref, the obtained V of buffer module 402 is exported by reference voltagerefbufIt by design structure and can set
The difference of meter parameter, which is adjusted, (designs V in the present embodimentrefbuf=Vref)。
In conclusion voltage detecting and control circuit 401 are instead of the common mode in conventional dynamic amplifier in the present embodiment
Detector C MD detects the variation of supply voltage by voltage operational module 403 and obtains different comparison signal VdetValue, lead to
The combination of comparator module 404 and dynamic amplifier corresponding operating is crossed, changes the amplification time of dynamic amplifier, calibration power supply electricity
The amplification factor of the lower dynamic amplifier of pressure fluctuation, so as to obtain the dynamic amplification with gain stabilization characteristic under voltage fluctuation
Device overcomes the variation of conventional dynamic APS amplifier power supply voltage and fluctuates the influence to gain, optimizes this to a certain extent
The performance of dynamic amplifier extends the application range of the dynamic amplifier.
What deserves to be explained is voltage detecting provided by the invention and control circuit can be used in dynamic amplifier surely incessantly
Determine the gain of dynamic amplifier, can be also used for other suitable scenes, for detecting voltage and providing control letter as needed
Number.The voltage monitoring field that applies the invention to is illustrated in figure 8 in embodiment, and reference voltage exports the input terminal of buffer module
Connect an external reference voltages Vref2, the second input terminal of output terminal connection voltage operational module；Voltage operational module
First input end connects another external reference voltages Vref1, clock signal input terminal connection external timing signal clk；Compare
The output terminal of the positive input connection voltage operational module of device module, the external voltage V to be detected of negative input connectioni。
When external timing signal clk is low level, voltage detecting and control circuit in the present embodiment, which are in, resets shape
State, the output signal V of voltage operational moduledet=0, it can voluntarily select external reference voltages V according to actual needs at this timeref1
And Vref2Value, treat its stabilization after selected, external timing signal clk be set as high level, monitoring function is opened, then is passed through
The V that voltage operational resume module obtainsdet=Vref1-Vref2, at this time the basic function of the circuit can be expressed as：In normal condition
Lower Vi>Vdet, output control signal VctrlFor high level, once V occurs during monitoringi<Vdet, output control signal VctrlBecome
For low level, which, which can be used as, judges ViWith VdetThe marking signal cooperation peripheral circuit of magnitude relationship realizes voltage monitoring
Basic function.
The dynamic amplifier structure with gain calibration module of above-described embodiment is suitable for each adhesive integrated circuit (IC) system
In, it can also be used as independent intellectual property IP (Intellectual Property).
Although a kind of dynamic amplifier gain correction circuit content of reactance voltage fluctuation of the present invention is with the shape of example
Formula discloses as above, however is not limited to the present invention, if those skilled in the art, is done in the spirit for not departing from the present invention
Unsubstantiality be altered or modified, should all belong in the claims in the present invention protection domain.
Claims (4)
1. voltage detecting and control circuit, including reference voltage output buffer module (402), voltage operational module (403) and ratio
Compared with device module (404),
The input terminal connection reference voltage of the reference voltage output buffer module (402), output terminal connect the voltage fortune
Calculate the second input terminal of module (403)；
The first input end of the comparator module (404) connects the output terminal of the voltage operational module (403), and second is defeated
Enter end and connect voltage to be detected, output terminal of the output terminal as the voltage detecting and control circuit；
It is characterized in that, the voltage operational module (403) includes the first phase inverter (INV1), the second phase inverter (INV2),
Three phase inverters (INV3), the first capacitance (C3), the first NMOS tube (MN1), the second NMOS tube (MN2), the first PMOS tube (MP1) and
Second PMOS tube (MP2),
First input end connection external adjustment electricity of the source electrode of first PMOS tube (MP1) as the voltage operational module (403)
Pressure, grid connect the output terminal of the first phase inverter (INV1), drain electrode the first NMOS tube of connection (MN1) and the second PMOS tube
(MP2) drain electrode and the first capacitance (C3) top crown；
The input terminal of second phase inverter (INV2) connects the input terminal of the first phase inverter (INV1) and connects external timing signal
(clk), output terminal connects the grid of the first NMOS tube (MN1)；
The source electrode of second PMOS tube (MP2) connects the source electrode of the first NMOS tube (MN1) and is used as the voltage operational module (403)
The second input terminal, grid connection third phase inverter (INV3) input terminal simultaneously connect external timing signal (clk)；
The output terminal of the grid connection third phase inverter (INV3) of second NMOS tube (MN2), the first capacitance (C of drain electrode connection3)
Bottom crown and as the output terminal of the voltage operational module (403), source electrode ground connection.
2. voltage detecting according to claim 1 and control circuit, which is characterized in that the reference voltage output buffering mould
Block (402) includes operational amplifier, first resistor (R1) and third PMOS tube (MP3),
The positive input of operational amplifier connects the reference voltage, negative input connection third PMOS tube (MP3)
One end of drain electrode and first resistor (R1) and the output terminal that buffer module (402) is exported as the reference voltage, output terminal
Connect the grid of third PMOS tube (MP3), the source electrode of third PMOS tube (MP3) connects supply voltage, first resistor (R1) it is another
End ground connection.
3. voltage detecting according to claim 1 and control circuit, which is characterized in that comparator module (404) packet
A comparator (405) is included, the negative input of the comparator (405) connects the output of the voltage operational module (403)
End, positive input connect the voltage to be detected, output terminal of the output terminal as the voltage detecting and control circuit.
4. voltage detecting according to claim 1 and control circuit, which is characterized in that the voltage of the external adjustment voltage
Value is more than the voltage value of reference voltage output buffer module (402) output terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810199958.6A CN108270402B (en) | 2018-03-12 | 2018-03-12 | Voltage detection and control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810199958.6A CN108270402B (en) | 2018-03-12 | 2018-03-12 | Voltage detection and control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108270402A true CN108270402A (en) | 2018-07-10 |
| CN108270402B CN108270402B (en) | 2021-02-12 |
Family
ID=62774976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810199958.6A Active CN108270402B (en) | 2018-03-12 | 2018-03-12 | Voltage detection and control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108270402B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109917176A (en) * | 2019-04-04 | 2019-06-21 | 上海东软载波微电子有限公司 | Drive over-current detection circuit |
| CN112782453A (en) * | 2020-12-29 | 2021-05-11 | 广东高云半导体科技股份有限公司 | Voltage sensor, chip and electronic equipment |
| CN112953420A (en) * | 2021-03-22 | 2021-06-11 | 电子科技大学 | Dynamic operational amplifier circuit with input tube in linear region |
| CN113884747A (en) * | 2021-09-07 | 2022-01-04 | 中国电力科学研究院有限公司 | Overvoltage measuring device of electronic transformer |
| CN116185119A (en) * | 2023-04-23 | 2023-05-30 | 深圳市九天睿芯科技有限公司 | CIM-based voltage regulating circuit, chip and electronic equipment |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004015830A (en) * | 2003-09-09 | 2004-01-15 | Innotech Corp | Solid-state image pickup device and driving method therefor |
| CN1636315A (en) * | 2002-02-21 | 2005-07-06 | 艾利森公司 | Current modulator with dynamic amplifier impedance compensation |
| CN101040441A (en) * | 2004-10-12 | 2007-09-19 | 索尼株式会社 | Sample hold circuit, and pipeline ad converter using the circuit |
| CN106999715A (en) * | 2014-10-10 | 2017-08-01 | 鲁斯技术有限公司 | Implantable cardiac defibrillator (ICD), Endermic implantating defibrillator (SICD) and wave type energy control system |
| CN107085132A (en) * | 2017-05-18 | 2017-08-22 | 东南大学 | A kind of positive voltage power under high-precision detection of negative pressure circuit |
| US20170302237A1 (en) * | 2016-04-13 | 2017-10-19 | Broadcom Corporation | Linearized dynamic amplifier |
-
2018
- 2018-03-12 CN CN201810199958.6A patent/CN108270402B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1636315A (en) * | 2002-02-21 | 2005-07-06 | 艾利森公司 | Current modulator with dynamic amplifier impedance compensation |
| JP2004015830A (en) * | 2003-09-09 | 2004-01-15 | Innotech Corp | Solid-state image pickup device and driving method therefor |
| CN101040441A (en) * | 2004-10-12 | 2007-09-19 | 索尼株式会社 | Sample hold circuit, and pipeline ad converter using the circuit |
| CN106999715A (en) * | 2014-10-10 | 2017-08-01 | 鲁斯技术有限公司 | Implantable cardiac defibrillator (ICD), Endermic implantating defibrillator (SICD) and wave type energy control system |
| US20170302237A1 (en) * | 2016-04-13 | 2017-10-19 | Broadcom Corporation | Linearized dynamic amplifier |
| CN107085132A (en) * | 2017-05-18 | 2017-08-22 | 东南大学 | A kind of positive voltage power under high-precision detection of negative pressure circuit |
Non-Patent Citations (2)
| Title |
|---|
| HE-GONG WEI等: "A process- and temperature- insensitive current-controlled delay generator for sampled-data systems", 《2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS》 * |
| MINGLEI ZHANG等: "A Temperature Compensation Technique for a Dynamic", 《IEEE SOLID-STATE CIRCUITS LETTERS》 * |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109917176A (en) * | 2019-04-04 | 2019-06-21 | 上海东软载波微电子有限公司 | Drive over-current detection circuit |
| CN109917176B (en) * | 2019-04-04 | 2023-12-15 | 上海东软载波微电子有限公司 | Drive overcurrent detection circuit |
| CN112782453A (en) * | 2020-12-29 | 2021-05-11 | 广东高云半导体科技股份有限公司 | Voltage sensor, chip and electronic equipment |
| CN112953420A (en) * | 2021-03-22 | 2021-06-11 | 电子科技大学 | Dynamic operational amplifier circuit with input tube in linear region |
| CN112953420B (en) * | 2021-03-22 | 2022-09-09 | 电子科技大学 | Dynamic operational amplifier circuit with input tube in linear region |
| CN113884747A (en) * | 2021-09-07 | 2022-01-04 | 中国电力科学研究院有限公司 | Overvoltage measuring device of electronic transformer |
| CN113884747B (en) * | 2021-09-07 | 2023-12-26 | 中国电力科学研究院有限公司 | Overvoltage measuring device of electronic transformer |
| CN116185119A (en) * | 2023-04-23 | 2023-05-30 | 深圳市九天睿芯科技有限公司 | CIM-based voltage regulating circuit, chip and electronic equipment |
| CN116185119B (en) * | 2023-04-23 | 2023-07-21 | 深圳市九天睿芯科技有限公司 | CIM-based voltage regulating circuit, chip and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108270402B (en) | 2021-02-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108270402A (en) | Voltage detecting and control circuit | |
| TWI470939B (en) | Analog-to-digital converter and related calibratable comparator | |
| US7127368B2 (en) | On-chip temperature sensor for low voltage operation | |
| US10394261B2 (en) | Voltage reference generator and a method for controlling a magnitude of a variation of an output voltage of a voltage reference generator | |
| CN106959724B (en) | Reference voltage circuit | |
| TWI579544B (en) | Thermal detection circuit and method | |
| CN104270152B (en) | The insensitive common mode charge control devices of PVT for charge coupling assembly line analog to digital converter | |
| CN110442180B (en) | Power-cycle voltage reference | |
| CN106292824B (en) | Low-dropout regulator circuit | |
| KR20080082460A (en) | Voltage regulator circuit and control method therefor | |
| US7190291B2 (en) | Programmable error amplifier for sensing voltage error in the feedback path of digitially programmable voltage sources | |
| CN114355027A (en) | Detection circuit and chip | |
| US20100244908A1 (en) | Semiconductor device having a complementary field effect transistor | |
| CN101540497B (en) | Thermal-shutdown circuit and method thereof | |
| Mehta et al. | A programmable, multi-GHz, wide-range duty cycle correction circuit in 45nm CMOS process | |
| TWI344755B (en) | Over-temperature protection circuit and method thereof | |
| CN108426648A (en) | CMOS temperature measuring circuits | |
| US8471630B2 (en) | Fast settling reference voltage buffer and method thereof | |
| CN115033047B (en) | Band gap reference voltage source with single point calibration | |
| TWI322565B (en) | Automatic-gain control circuit | |
| TWI508437B (en) | Voltage adjusting circuit for amplifier circuit and method thereof | |
| KR102628843B1 (en) | power failure detection circuit | |
| EP3971589A1 (en) | On-chip, low-voltage, current sensing circuit | |
| Šovčík et al. | Digital calibration of low-voltage and low-power analog ics | |
| CN106533402B (en) | Current comparator with hysteresis function |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |