CN108231711B - 半导体存储器件以及具有其的芯片堆叠封装 - Google Patents

半导体存储器件以及具有其的芯片堆叠封装 Download PDF

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CN108231711B
CN108231711B CN201711326167.7A CN201711326167A CN108231711B CN 108231711 B CN108231711 B CN 108231711B CN 201711326167 A CN201711326167 A CN 201711326167A CN 108231711 B CN108231711 B CN 108231711B
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heat
pattern
substrate
chip
heat dissipation
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CN108231711A (zh
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孙钟弼
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Abstract

本公开提供了半导体存储器件以及具有其的芯片堆叠封装。一种半导体存储器件包括：集成电路(IC)芯片结构，其中IC芯片结构包括基板、设置在基板中的存储单元以及设置在基板中的局部阱，其中局部阱的导电类型不同于基板的导电类型；布线堆叠结构，设置在IC芯片结构上，其中布线堆叠结构包括通过信号互连器连接到存储单元的信号传送图案以及通过热互连器连接到局部阱的散热图案；以及热传递结构，连接到散热图案用于将热从热源传递到散热图案。

Description

半导体存储器件以及具有其的芯片堆叠封装
技术领域
本发明构思涉及半导体存储器件，更具体地，涉及具有散热回路(thermaldispersion circuit)的半导体存储器件以及具有该半导体存储器件的芯片堆叠封装。
背景技术
由于小型移动装置诸如智能电话和平板个人计算机(PC)正变得被广泛使用，对于应用处理器(AP)的需求迅速增加。AP可以包括结合在一个半导体封装中的具有中央处理单元(CPU)、数字信号处理器(DSP)和/或微控制器的逻辑芯片以及用于存储数字数据的至少一个存储器件。
根据AP的任务和性能要求，各种另外的芯片可以被添加到AP的逻辑芯片。AP的运行热会影响其性能。
包括在AP中的芯片的一些会产生比其它芯片更多的热。因此，多个热点(hotspot)会存在于AP中。
例如，图形处理单元(GPU)可以被包括在AP中。然而，当执行图形相关的操作时，GPU会产生大量的热。换言之，GPU会作为AP中的热点起作用。这样的热点会导致AP的操作故障，并可能导致其中设置该热点的移动装置的关闭。
发明内容
根据本发明构思的示范性实施方式，一种半导体存储器件包括：集成电路(IC)芯片结构，其中IC芯片结构包括基板、设置在基板中的存储单元以及设置在基板中的局部阱，其中局部阱的导电类型不同于基板的导电类型；布线堆叠结构，设置在IC芯片结构上，其中布线堆叠结构包括通过信号互连器连接到存储单元的信号传送图案以及通过热互连器连接到局部阱的散热图案；以及热传递结构，连接到散热图案用于将热从热源传递到散热图案。
根据本发明构思的示范性实施方式，一种半导体存储器件包括：IC芯片结构，其中IC芯片结构包括基板以及设置在基板中的存储单元；布线堆叠结构，设置在IC芯片结构上，其中布线堆叠结构包括通过信号互连器连接到存储单元的信号传送图案以及通过热互连器连接到基板的散热图案，其中信号互连器传送操作信号到存储单元；散热器，设置在基板上并且连接到散热图案使得热通过散热器从散热图案消散；以及热传递结构，连接到散热图案并将热从热源传递到散热图案。
根据本发明构思的示范性实施方式，一种芯片堆叠封装包括：电路板，包括至少一个导电图案；第一管芯，安装在电路板上，第一管芯包括第一芯片和产生比第一芯片更多的热的至少一个第二芯片，其中第一管芯的由至少一个第二芯片加热的部分是热点；以及第二管芯，堆叠在第一管芯上并且连接到第一管芯。第二管芯包括：IC芯片结构，在其上存储数据；布线堆叠结构，该布线堆叠结构包括连接到IC芯片结构用于传递操作信号到IC芯片结构的信号传送图案以及消散来自热点的热的散热图案；以及热传递结构，用于将热从所述热点传递到散热图案。
根据本发明构思的示范性实施方式，一种半导体存储器件包括：IC芯片结构，其中IC芯片结构包括基板、设置在基板中的存储单元、以及设置在基板中的局部阱，其中局部阱的导电类型不同于基板的导电类型；布线堆叠结构，设置在IC芯片结构上，其中布线堆叠结构包括信号传送图案、散热图案、第一绝缘层和堆叠在第一绝缘层上的第二绝缘层，其中信号传送图案包括设置在第一绝缘层上的第一金属图案、设置在第二绝缘层上的第二金属图案、以及连接到存储单元以及第一金属图案和第二金属图案的信号互连器，其中散热图案包括设置在第一绝缘层上的第三金属图案、设置在第二绝缘层上的第四金属图案、以及连接到局部阱以及第三金属图案和第四金属图案的热互连器；以及热传递结构，连接到热互连器用于传递热到第三金属图案和第四金属图案。
附图说明
通过参照附图详细描述本发明构思的示范性实施方式，本发明构思的以上和其它的特征将变得更加明显，附图中：
图1是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图；
图2A是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图；
图2B是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图；
图3是示出根据本发明构思的一示范性实施方式的图2A和图2B所示的热传递回路的部分“A”的放大图；
图4A是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图；
图4B是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图；
图5是示出根据本发明构思的一示范性实施方式的具有图1的半导体存储器件的芯片堆叠封装的截面图；
图6是示出根据本发明构思的一示范性实施方式的具有半导体存储器件的芯片堆叠封装的截面图；
图7是示出根据本发明构思的一示范性实施方式的具有半导体存储器件的芯片堆叠封装的截面图；以及
图8是示出根据本发明构思的一示范性实施方式的具有半导体存储器件的芯片堆叠封装的截面图。
具体实施方式
现在将参照附图更充分地描述本发明构思的示范性实施方式。在整个说明书中，相同的附图标记可以指的是相同的部件。
图1是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图。
参照图1，半导体存储器件500可以包括：集成电路(IC)芯片结构100，包括在基板101中的多个存储单元110；布线堆叠结构200，设置在IC芯片结构100上并用于传送操作信号到存储单元110；以及热传递结构300，用于传递来自热源的热。多个局部阱120可以设置在基板101中并可以具有与基板101的导电类型不同的导电类型。
例如，IC芯片结构100可以包括多个存储单元110，该多个存储单元110可以通过前端(FEOL)工艺设置在具有第一导电类型的基板101中。
基板101可以包括半导体基板诸如硅(Si)基板、镓-砷(Ga-As)基板和硅-锗(Si-Ge)基板，并可以具有根据掺杂剂的电传导性的导电类型。例如，当正掺杂剂被掺杂到基板101中时基板101可以是p型基板，当负掺杂剂被掺杂到基板101中时基板101可以是n型基板。此外，基板101可以包括绝缘体上硅(SOI)基板，其中一对p型或n型基板可以通过绝缘体彼此分隔。各种半导体板/基板可以用作基板101。例如，可以使用具有p型或n型半导体特性的各种半导体板/基板。
具有栅极绝缘层和堆叠在栅极绝缘层上的导电层的栅结构可以形成在基板101上。杂质可以被注入到栅结构周围的基板101中以形成晶体管。晶体管可以具有栅结构以及源结区和漏结区。此外，电容器可以形成在基板101上以对应于每个晶体管。因此，可以形成半导体存储器件500的存储单元110。存储单元110可以例如是动态随机存取存储器(DRAM)器件。可选地或另外地，存储单元110可以包括在基板101上的多个晶体管，单位存储块包括串选择晶体管、多个单元晶体管和接地选择晶体管。
存储单元110可以经由接触焊盘112和互连结构114连接到布线堆叠结构200，接触焊盘112可以设置在基板101的有源面处。因此，存储单元110可以通过布线堆叠结构200连接到另一电路。例如，互连结构114可以包括与基板101的漏结区接触的漏极插塞以及与基板101的源结区接触的源极插塞。
存储单元110的数目和配置可以根据IC芯片结构100的要求和特性而改变。例如，根据接触焊盘在基板101中的相对位置，存储单元110可以布置在基板101的有源面的中心或边缘处。
多个局部阱120可以设置在基板101的有源面处。局部阱120可以与存储单元110间隔开并可以具有可与基板101的导电类型不同的导电类型。
例如，在形成存储单元110之后，具有与基板101的导电类型不同的导电类型的一些掺杂剂可以被注入到基板101的有源面的一些局部区域中。因此，局部阱120可以与基板101电分隔。例如，当存储单元110包括p型金属氧化物半导体(PMOS)晶体管时，局部阱120可以包括n型掺杂剂(N阱)，并且当存储单元110包括n型金属氧化物半导体(NMOS)晶体管时，局部阱120可以包括p型掺杂剂(P阱)。
布线堆叠结构200可以设置在IC芯片结构100上。例如，布线堆叠结构200可以包括金属堆叠结构，该金属堆叠结构可以通过绝缘夹层图案210而与IC芯片结构100电绝缘。金属堆叠结构可以通过后端(BEOL)工艺形成，其中布线工艺和绝缘工艺可以被重复。
例如，布线堆叠结构200可以包括覆盖IC芯片结构100的绝缘夹层图案210、穿过绝缘夹层图案210连接到接触焊盘112的信号传送结构220、以及穿过绝缘夹层图案210连接到局部阱120的散热结构250。
第一绝缘夹层可以形成在基板101的可包括接触焊盘112和局部阱120的有源面上，并且第一金属图案M1可以形成在绝缘夹层图案210的第一绝缘夹层上。第一金属图案M1可以通过互连器穿过绝缘夹层图案210的第一绝缘夹层而连接到接触焊盘112和局部阱120。绝缘夹层图案210的第二绝缘夹层可以形成在第一金属图案M1上，第二金属图案M2可以形成在绝缘夹层图案210的第二绝缘夹层上。第二金属图案M2可以通过互连器穿过绝缘夹层图案210的第二绝缘夹层而连接到第一金属图案M1。绝缘夹层图案210的第三绝缘夹层可以形成在第二金属图案M2上，并且互连器可以穿过绝缘夹层图案210的第三绝缘夹层形成。因此，布线堆叠结构200可以包括可在基板101的有源面上向上堆叠的多个金属图案层。金属图案层可以通过绝缘夹层图案210彼此分隔。将第一金属图案M1连接到第二金属图案M2的互连器包括导热材料，例如金属。此外，如图1所示，连接到接触焊盘112或者局部阱120的第一金属图案M1可以交叠对应的第二金属图案M2。
尽管本发明构思的本示范性实施方式公开了布线堆叠结构200包括2层金属堆叠图案(例如堆叠在第一金属图案M1上的第二金属图案M2)，但是根据半导体存储器件500的存储特性，布线堆叠结构200可以包括3层或更多层金属堆叠图案。
金属图案和与接触焊盘112接触的互连器可以是用于传送操作信号到存储单元110的信号传送结构220，并且金属图案和与局部阱120接触的互连器可以是用于分散来自热源的热的散热结构250。
在本发明构思的示范性实施方式中，信号传送结构220可以包括信号传送图案222诸如用于传送操作信号的金属布线图案以及连接到信号传送图案222的信号互连器224。散热结构250可以包括用于传递并消散来自热源的热的散热图案252以及连接到散热图案252的热互连器254。
信号传送图案222和散热图案252可以通过使用相同的金属图案化工艺形成在相同的绝缘夹层上，使得信号传送图案222和散热图案252的每个层级(或者层)可以设置在绝缘夹层图案210的相同的层级上并可以包括相同的材料。信号互连器224和热互连器254可以在相同的工艺期间同时形成并可以包括相同的材料。
在本发明构思的示范性实施方式中，信号传送图案222和散热图案252可以包括相同的导电金属图案，并且信号互连器224和热互连器254可以包括相同的导电通路结构。
信号传送结构220可以连接到接触焊盘112以传送操作信号到存储单元110或者从存储单元110传送数据信号。例如，信号传送结构220可以传送用于从存储单元110读取数据/向存储单元110编程数据的数据存取信号、用于施加驱动电力到存储单元110的电力信号、以及用于将存储单元110电接地的接地信号。散热结构250可以连接到局部阱120。可选地或者另外地，热传递结构300可以传递从热源产生的热。例如，热传递结构300可以传递来自热点的过热(例如在某一温度以上的热)以将过热分散和存储到散热结构250中。因此，散热结构250可以用作用于消散来自热点的过热的热路径或者临时散热器，并且散热结构250可以与IC芯片结构100电分隔。
因此，尽管热源或热点以及IC芯片结构100可以由相同的电源驱动，但是从热源或者热点产生的热可以被充分地分散和/或消散而没有由信号干扰和噪声引起的对IC芯片结构100的任何破坏。
此外，当半导体存储器件500与其它器件(诸如具有热点的逻辑器件)结合以形成芯片堆叠封装时，从热点产生的过热可以从逻辑器件充分地分散而没有用于热消散的任何额外工艺。这是因为散热结构250可以通过使用相同的金属图案化工艺而与信号传送结构220同时形成在基板101上。因此，散热结构250可以用于通过吸收和消散来自逻辑器件的过热而减少或者防止对包括半导体存储器件500和逻辑器件的芯片堆叠封装的热损伤。
如将在下面详细描述的，从逻辑器件产生的热可以被分散到散热结构250中并可以通过可提供在半导体存储器件500中提供的散热器而被选择性地向外(或者远离逻辑器件)消散。
热传递结构300可以设置在布线堆叠结构200下面并可以与热源接触使得从热源产生的热可以通过热传递结构300传递到散热结构250。
钝化层可以形成在布线堆叠结构200上。与信号传送结构220接触的接触端子以及与散热结构250接触的热传递结构300可以形成在钝化层上。
根据半导体存储器件500的外部接触端子的结构和特性，接触端子和热传递结构300可以具有各种配置和结构。当半导体存储器件500与具有热点的逻辑器件(诸如图形处理单元(GPU))结合时，半导体存储器件500可以以倒装芯片结构与逻辑器件结合。凸块结构诸如焊料凸块和/或微凸块可以用作接触端子并用作热传递结构300。因此，半导体存储器件500和逻辑器件可以以高的机械稳定性彼此电结合和热结合。
在本发明构思的示范性实施方式中，热传递结构300可以包括与散热结构250接触的至少一个热凸块310。
例如，散热结构250可以包括与最上面的热互连器254接触的凸块焊盘312以及可通过回流工艺与凸块焊盘312接触的热凸块310。
热凸块310可以设置在钝化层上以对应于与半导体存储器件500结合的逻辑器件的热点的位置使得热凸块310可以与芯片堆叠封装中的逻辑器件的热点接触。因此，热凸块310的位置可以根据半导体存储器件500和具有热点的逻辑器件的封装配置、逻辑器件中的热点的位置以及半导体存储器件500的散热结构250的布置而改变。
半导体存储器件500可以与包括热点的各种其它器件(诸如逻辑器件)结合。半导体存储器件500可以被制造为各种半导体封装。在半导体封装中，从热点产生的过热可以被充分地分散到半导体存储器件500的散热结构250中。
在包括半导体存储器件500的半导体封装中，操作信号可以通过接触端子传送到IC芯片结构100，并且从热点产生的过热可以通过热凸块310传递到散热结构250。分散在散热结构250中的热可以通过散热器被进一步向外消散，如下面所述。因此，可以充分地防止由过热引起的半导体封装的热损伤。
散热结构250可以连接到其导电类型可与基板101的导电类型不同的局部阱120，所以散热结构250可以与IC芯片结构100电分隔。因此，当逻辑器件和半导体存储器件500可以通过相同的电源运行时，存储单元110可以被充分地保护不受信号干扰和噪声的影响。
此外，散热结构250可以在相同的工艺中与信号传送结构220同时形成。因此不需要额外的工艺来制造用于消散来自逻辑器件的热点的过热的散热结构250。
热传递结构300可以被不同地改变，用于消除散热结构250和热点的位置的限制。例如，半导体存储器件500可以在布线堆叠结构200下面提供有重定向层结构，从而散热结构250可以设置在某一位置而与逻辑器件的热点的位置或者布置无关。
图2A是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图。图2B是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图。分别在图2A和图2B中示出的半导体存储器件501和502可以基本上类似于图1中示出的半导体存储器件500，除了用于将散热结构与热点连接的热传递结构之外。没有在图2A和图2B中描述的元件可以被假定为与参照图1描述的对应元件相同或基本上相同。
参照图2A，半导体存储器件501可以包括具有热凸块310和热传递回路320的热传递结构300。
绝缘覆盖层可以形成在布线堆叠结构200上，并且将热凸块310和散热结构250互连的路径线可以设置在绝缘覆盖层中。例如，通路孔和沟槽可以通过图案化工艺形成在绝缘覆盖层中使得散热结构250和热凸块310可以彼此连接。通路孔和沟槽可以用导电材料填充以在通路孔和沟槽中形成热传递线。因此，热传递回路可以设置在散热结构250与位于布线堆叠结构200下面的热凸块310之间。
当具有热点的外部器件诸如逻辑器件与半导体存储器件501结合以形成半导体封装时，半导体存储器件501和外部器件可以彼此结合而与热点和散热结构250的位置无关。因此，可以提高半导体封装中的器件结合的自由度(DOF)。
因此，尽管半导体存储器件501可以被提供为中心焊盘型，但是散热结构250可以设置在基板101的边缘部分处，并且热点可以设置在外部器件的中心部分处，散热结构250和外部器件的热点可以通过热传递回路320彼此连接使得来自热点的热通过热传递回路320传递到散热结构250。
参照图2B，半导体存储器件502可以包括具有热凸块310(或者310a和310b，在下面描述)和层叠的热传递回路320的热传递结构300。
在本发明构思的示范性实施方式中，第一绝缘覆盖层和第二绝缘覆盖层可以形成在布线堆叠结构200上，并且分别将多个热凸块310a和310b与多个散热结构250a和250b互连的多个堆叠路径线可以设置在第一和第二绝缘覆盖层的每个中。因此，外部器件的多个热点可以个别地连接到半导体存储器件502的相应的散热结构250。
例如，第一绝缘覆盖层可以通过图案化工艺形成为具有通路孔和沟槽的第一覆盖图案，使得第一散热结构250a和第一热凸块310a可以彼此连接。通路孔和沟槽可以用导电材料填充以在第一覆盖图案的通路孔和沟槽中形成第一热传递线321。然后，第二绝缘覆盖层可以形成在第一覆盖图案上使得第一热传递线321可以被第二绝缘覆盖层覆盖。第二绝缘覆盖层可以通过图案化工艺形成为具有另一通路孔和另一沟槽的第二覆盖图案使得第二散热结构250b和第二热凸块310b可以彼此连接。另一通路孔和另一沟槽可以用导电材料填充以在第二覆盖图案的通路孔和沟槽中形成第二热传递线322。因此，第一热传递线321和第二热传递线322可以在布线堆叠结构200下面垂直地堆叠并通过堆叠的覆盖图案301彼此分隔。
第一和第二热传递线321和322可以被部分地断开以防止对堆叠的覆盖图案301中的信号线的干扰。在这种情况下，热传递回路320还可以包括用于连接热传递线的一对相邻的断开部分的桥接线和用于连接桥接线与断开的热传递线的桥接通路。
图3是示出根据本发明构思的一示范性实施方式的图2A和图2B所示的热传递回路的部分“A”的放大图。
参照图3，热传递回路320可以通过信号线SL被部分地断开，操作信号可以通过信号线SL传送到信号传送结构220。例如，热传递线可以被断开为一对断开线320A使得信号线SL可以插置在该对断开线320A之间。桥接线320B可以设置在信号线SL周围。桥接通路320C可以设置在每个桥接线320B与它的相应的断开线320A之间。
当信号线SL和热传递线可以在覆盖图案301中彼此交叉时，热传递线可以被断开为断开线320A以防止对信号线SL的任何损伤。然后，断开线320A可以通过桥接线320B和桥接通路320C彼此连接。因此，热传递回路320可以与散热结构250和热凸块310连接而没有对信号线SL的任何干扰。
当半导体存储器件502与具有热点的外部器件结合以形成半导体封装时，在运行半导体封装时从热点产生的过热可以被充分地分散到半导体存储器件502的散热结构250中。因此，具有半导体存储器件502的半导体封装可以不遭受来自热点的过热的损伤。
散热结构250中的热可以通过下面描述的各种散热构件向外消散。
图4A是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图。图4B是示出根据本发明构思的一示范性实施方式的半导体存储器件的截面图。图4A中示出的半导体存储器件503可以基本上类似于图1所示的半导体存储器件500，除了局部阱120可以与热柱连接或者可以被热柱替代之外。图4B中示出的半导体存储器件504可以基本上类似于图2A所示的半导体存储器件501，除了局部阱120可以与热柱连接或者可以被热柱替代之外。热柱可以与用于从散热结构250向外消散热的散热器连接。
参照图4A，半导体存储器件503可以包括可连接到散热结构250的散热器400，因而热可以从散热结构250消散在半导体存储器件503外面。因此，从外部器件的热点产生的过热可以被分散到散热结构250中并可以通过散热器400向外消散。
例如，散热器400可以设置在基板101的后表面上并可以通过耐热粘合剂粘附到基板101。散热器400可以包括可涂覆在基板101的后表面上的导热膜。可选地或者另外地，散热器400可以包括可设置在基板101的后表面上的空气冷却器或者水冷却器。
在本发明构思的示范性实施方式中，散热器400可以包括可利用耐热粘合剂粘附到基板101的消散板。消散板可以具有可与基板101的热膨胀系数和杨氏模量类似的热膨胀系数和杨氏模量。消散板可以具有比耐热粘合剂的热导率高的热导率以减少由热点产生的过热以及由IC芯片结构100的运行产生的热导致的基板101的翘曲。
耐热粘合剂可以包括热干扰材料，其中可以混合环氧树脂、硬化剂和用于热传递的填充剂。
热柱150可以穿过基板101使得散热器400可以经由热柱150与散热结构250连接并且过热可以从散热结构250直接传送到散热器400。
例如，热柱150可以包括贯穿硅热通路(through-silicon thermal via)，其可以穿过基板101而与散热器400和散热结构250连接。贯穿硅热通路可以包括具有高热导率的金属诸如铜(Cu)和铝(Al)。
因此，从外部器件的热点产生的过热可以通过热凸块310分散到散热结构250中并可以通过散热器400消散在半导体存储器件503外面。因此，包括半导体存储器件503和具有热点的外部器件的半导体封装可以不遭受过热引起的损伤。
由于散热结构250可以与信号传送结构220一起提供在半导体存储器件503中，所以不需要进一步的额外工艺来制造散热结构250。因此，过热可以通过散热结构250和散热器400被迅速地消散在半导体封装外面而没有任何额外的制造工艺。
参照图4B，半导体存储器件504可以包括散热器400，散热器400可以连接到散热结构250以及具有热凸块310和热传递回路320的热传递结构300。热凸块310和热传递回路320可以具有与半导体存储器件502的热凸块和热传递回路相同的结构，所以将省略对于热凸块310和热传递回路320的任何进一步的详细描述。
多个热柱150可以设置在基板101的边缘部分处并可以穿过基板101分别连接到散热结构250。热柱150可以在基板101的边缘部分处逐一地连接到热分散结构250。热可以从散热结构250消散在半导体存储器件504外面。
因此，从外部器件的热点产生的过热可以被分散到散热结构250中并可以通过散热器400消散到半导体封装外面而没有任何额外的制造工艺。
半导体存储器件504和具有热点的外部器件可以彼此结合而与热点和散热结构250的位置无关，这可以提高半导体封装中的器件结合的DOF。
图5是示出根据本发明构思的一示范性实施方式的具有图1的半导体存储器件的芯片堆叠封装的截面图。
参照图5，根据本发明构思的一示范性实施方式的芯片堆叠封装1000可以包括具有内部电路图案711的电路板700、安装在电路板700上的第一管芯600以及堆叠在第一管芯600上并且连接到第一管芯600的第二管芯500。第一管芯600可以包括逻辑芯片610和至少一个功能芯片620(从其可产生相对更多的热作为过热)，因而第一管芯600可以在对应于功能芯片620的位置处具有热点HS，该热点HS具有相对高的温度。第二管芯500可以包括：其上可存储数字数据的IC芯片结构100；布线堆叠结构200，具有用于传送操作信号到IC芯片结构100的信号传送结构220、可分散来自热点HS的过热以降低热点HS的温度的散热结构250；以及热传递结构300，将过热从第一管芯600的热点HS传递到散热结构250。
例如，电路板700可以包括板主体710和多个内部电路图案711，板主体710具有有足够的刚度的绝缘和耐热材料。内部电路图案711可以连接到可设置在板主体710的上表面和下表面上的接合焊盘730，从而第一管芯600和外部电子***可以经由接合焊盘730和内部电路图案711彼此连接。在板主体710的上表面上的接合焊盘730可以与第一管芯600接触，在板主体710的下表面上的接合焊盘730可以与接触端子720接触。接触端子720可以连接到外部电子***。例如，接触端子720可以包括多个焊球。
板主体710可以包括热固塑料(诸如环氧树脂、聚酰亚胺)、或者涂覆有耐热有机膜(诸如液晶聚酯膜和聚酰胺膜)的板。内部电路图案711可以包括可设置在板主体710中的多个导电线或布线，并可以包括用于供给电力的电源线、用于传送数据信号的多个信号线以及用于将信号线和电源线电接地的接地线。内部电路图案711的导电线或布线可以通过绝缘层而彼此电绝缘。电路板700可以包括印刷电路板(PCB)，其中内部电路图案711可以通过使用印刷工艺形成。
例如，第一管芯600可以包括操作热可从其产生的有源器件。外部电源可以施加到有源器件。因此，各种电操作可以在有源器件中发生。作为电操作的结果，操作热可以从有源器件产生。
第一管芯600可以包括多个导电结构和多个布线结构，该多个导电结构可以堆叠在半导体基板诸如硅晶片上并可以通过多个绝缘夹层图案而彼此电分隔，该多个布线结构可以穿过绝缘夹层图案而连接到导电结构。
导电结构可以包括用于控制可与芯片堆叠封装1000结合的外部电子***的逻辑芯片610。例如，中央处理单元(CPU)、数字信号处理器(DSP)和微控制器可以被提供为逻辑芯片610以控制外部电子***的操作。
布线结构可以包括金属插塞以及可与金属插塞接触的金属布线，该金属插塞可以通过穿过绝缘夹层图案而连接到导电结构。金属布线可以包括用于传送与导电结构的通信信号的信号线、用于施加电能到导电结构的电源线、以及用于将导电结构电接地的接地线。
根据芯片堆叠封装1000的操作特性，除了逻辑芯片610之外，各种功能芯片620可以被进一步包括在第一管芯600中。逻辑芯片610和功能芯片620可以被结合成单个芯片结构或者芯片堆叠结构。
例如，功能芯片620可以包括具有GPU的图形芯片，从其可以产生相对高的操作热(过热)，与第一管芯600的其它芯片和逻辑芯片610相比。换言之，图形芯片可以导致第一管芯600的热点HS。
根据芯片堆叠封装1000的操作特性和功能，在第一管芯600中，热点HS的数目和布局可以改变。因此，热点HS可以不同地分布在第一管芯600中。
在本发明构思的示范性实施方式中，第一管芯600可以以面朝上的结构安装在电路板700上，并且第一管芯600的接触焊盘630可以通过接合引线BW连接到电路板700的接合焊盘730。可选地，第一管芯600可以以面向下的结构安装到电路板700上，并且第一管芯600的接触焊盘630可以通过凸块结构诸如多个焊料凸块而与电路板700的接合焊盘730接触。
第二管芯500可以以面向下的结构安装在第一管芯600上并可以通过凸块结构电连接到第一管芯600。第二管芯500可以包括具有用于将数字数据存储为二进制方式的存储单元110的存储器件。
例如，第二管芯500可以包括具有晶体管、电容器和快闪存储器件的DRAM器件。快闪存储器件可以包括多个存储单元块，所述多个存储单元块中的每个可以包括单个串选择晶体管、单个接地选择晶体管和多个单元晶体管。
第二管芯500可以包括：IC芯片结构100，其上可以存储数字数据；布线堆叠结构200，具有信号传送结构220和散热结构250，信号传送结构220可以连接到IC芯片结构100并可以传送操作信号到IC芯片结构100，散热结构250可以分散来自热点HS的过热以降低热点HS的温度；以及热传递结构300，用于将过热从第一管芯600的热点HS传递到散热结构250。
操作信号可以经由信号凸块SB和信号传送结构220传送到存储单元110。可从第一管芯600的图形芯片引起的热点HS产生的过热可以经由热凸块310传递到散热结构250。因此，过热可以传递到散热结构250并可以分散到第二管芯500中以降低热点HS的温度。
例如，第一管芯600的过热可以被直接传递到第二管芯500的散热结构250并可以分散在第一管芯600外面。第一管芯600中的过热的分散可以降低第一管芯600的温度以提高芯片堆叠封装1000的可靠性和稳定性。
第二管芯500可以具有与图1所示的半导体存储器件500基本上相同的结构，所以将省略对第二管芯500的任何进一步的详细描述。
在本发明构思的示范性实施方式中，第二管芯500可以被颠倒使得第二管芯500的有源面可以面向下并可以通过接触结构(诸如信号凸块SB和热凸块310)连接到第一管芯600。信号凸块SB和热凸块310可以通过回流工艺插置在第一管芯600和第二管芯500之间，并且第一管芯600和第二管芯500之间的间隙空间可以用底部填充层UF填充。
第一管芯600和第二管芯500可以通过信号凸块SB电连接到彼此并可以通过热凸块310热连接到彼此。此外，第一管芯600和第二管芯500可以通过信号凸块SB和热凸块310两者以高可靠性被机械地彼此结合。
由于第二管芯500的热凸块310与第一管芯600的热点HS接触，所以第二管芯500以这样的方式与第一管芯600结合使得热凸块310可以与热点HS对准。因此，第一管芯600和第二管芯500的堆叠结构会由第一管芯600的布局确定，这会降低芯片堆叠封装1000中的器件结合的DOF。
图6是示出根据本发明构思的一示范性实施方式的具有半导体存储器件的芯片堆叠封装的截面图。在图6中，芯片堆叠封装1001可以具有与图5所示的芯片堆叠封装1000基本上相同的结构，除了第二管芯500可以用图2A所示的半导体存储器件501代替之外。
参照图6，芯片堆叠封装1001可以包括热传递回路320，热传递回路320可以插置在第一管芯600和第二管芯500之间并可以作为热传递路径将热凸块310和散热结构250互连。
因此，第一管芯600和第二管芯500可以彼此结合，而与第一管芯600中的功能芯片620的位置和第二管芯500中的散热结构250的布局无关。因此，图6的器件结合的DOF可以提高。
如上所述，第二管芯500可以具有与图2A所示的半导体存储器件501基本上相同的结构，所以将省略对芯片堆叠封装1001的第二管芯500的任何进一步的详细描述。
辅助热凸块315可以进一步设置在第一管芯600与第二管芯500之间的覆盖图案301上，使得辅助热凸块315可以与热传递回路320和第二管芯500连接。
当热点HS的过热的一部分通过热传递回路320传递到散热结构250时，剩余的过热HS也可以通过辅助热凸块315传递到第二管芯500的冷点CS。
冷点CS可以是第二管芯500的该处的温度可低于热点HS的温度的局部区域或部分。因此，过热HS的一部分可以分散到散热结构250中并且过热HS的另一部分可以分散到冷点CS。
因此，热点HS的温度可以迅速地降低并且芯片堆叠封装1001的热可靠性可以提高。
图7是示出根据本发明构思的一示范性实施方式的具有半导体存储器件的芯片堆叠封装的截面图。在图7中，芯片堆叠封装1003可以具有与图6所示的芯片堆叠封装1001基本上相同的结构，除了横向散热器可以设置在第一管芯600和第二管芯500的侧面处之外。
参照图7，芯片堆叠封装1003可以包括横向散热器800，横向散热器800可以在相对于电路板700的上表面的垂直方向上设置在第一管芯600和第二管芯500的侧面处。
热传递回路320还可以包括可与横向散热器800接触的延长线320A，因而过热可以通过热传递回路320从热点HS传递到横向散热器800并可以通过横向散热器800消散在芯片堆叠封装1003外面。横向散热器800可以具有与半导体存储器件503的散热器400基本上相同的结构，所以将省略对横向散热器800的任何详细描述。
因此，过热可以从第一管芯600的热点HS快速地消散在芯片堆叠封装1003外面。
图8是示出根据本发明构思的一示范性实施方式的具有半导体存储器件的芯片堆叠封装的截面图。在图8中，芯片堆叠封装1004可以具有与图5所示的芯片堆叠封装1000基本上相同的结构，除了第二管芯500可以用图4A所示的半导体存储器件503代替之外。
参照图8，芯片堆叠封装1004可以包括可连接到散热结构250的散热器400，因而过热可以通过使用散热结构250消散在芯片堆叠封装1004外面。因此，从第一管芯600的热点HS产生的过热可以被分散到散热结构250中并可以通过散热器400向外消散。
热柱150可以提供在第二管芯500中使得热柱150可以穿过基板101并且散热器400可以通过热柱150而与散热结构250接触。因此，过热可以从散热结构250经由热柱150直接传递到散热器400。
例如，热柱150可以包括可穿过基板101而与散热器400和散热结构250连接的贯穿硅热通路(through-silicon thermal via)。贯穿硅热通路可以包括具有高热导率的金属，诸如铜(Cu)、铝(Al)等。
因此，从第一管芯600的热点HS产生的过热可以通过热凸块310分散到散热结构250中并可以利用热柱150通过散热器400消散在芯片堆叠封装1004外面。因此，芯片堆叠封装1004可以不遭受由第一管芯600的过热引起的热损伤。
在本发明构思的示范性实施方式中，第一管芯600可以包括具有用于处理到移动***的操作信号的CPU和用于处理到移动***的图像信号的GPU的逻辑器件，第二管芯500可以包括数字数据可响应于来自CPU的操作信号而存储到其中的存储器件。因此，以上示例芯片堆叠封装1000至1004可以被制造为用于移动***的应用处理器(AP)。
根据本发明构思的一示范性实施方式，在半导体存储器件以及包括该半导体存储器件的芯片堆叠封装中，半导体存储器件的布线堆叠结构可以包括用于传送操作信号到存储单元的信号传送结构以及用于分散来自可与半导体存储器件结合的另一器件的热点的过热的散热结构。
因此，当半导体存储器件与具有热点的逻辑器件(诸如图形芯片)结合并被制造为具有半导体存储器件和逻辑器件的芯片堆叠封装时，操作信号可以通过信号传送结构传送到存储单元并且热点的过热可以被消散到半导体存储器件的散热结构中。因此，从逻辑器件的热点产生的过热可以被分散到半导体存储器件的散热结构中，使得过热可以被广泛地分散在芯片堆叠封装中。
例如，散热结构可以连接到形成在基板中的局部阱，该局部阱具有与基板不同的导电类型，因而散热结构可以与连接到信号传送结构的存储单元电分隔。因此，当芯片堆叠封装具有一个电源并且因此半导体存储器件和逻辑器件可以通过相同的电源运行时，存储单元可以不遭受信号干扰和信号噪声。此外，散热结构可以与信号传送结构在相同的工艺中同时形成，因而可以不需要额外的工艺来制作散热结构。
重定向层结构可以被进一步提供在半导体存储器件的散热结构上，使得散热结构和热点可以彼此连接而与散热结构和热点的位置和布局无关，从而提高芯片堆叠封装中的器件结合的DOF。
尽管已经参照本发明构思的示范性实施方式具体示出和描述了本发明构思，但是对于本领域普通技术人员将是明显的，可以在其中进行形式和细节上的各种改变而没有背离本发明构思的精神和范围，本发明构思的范围由权利要求书限定。
本申请要求于2016年12月15日在韩国知识产权局提交的韩国专利申请第10-2016-0172023号的优先权，其公开内容通过引用整体地结合于此。

Claims (20)

1.一种半导体存储器件，包括：
集成电路(IC)芯片结构，
其中所述IC芯片结构包括：
基板；
存储单元，设置在所述基板中；以及
局部阱，设置在所述基板中，其中所述局部阱的导电类型不同于所述基板的导电类型；
布线堆叠结构，设置在所述IC芯片结构上，其中所述布线堆叠结构包括通过信号互连器连接到所述存储单元的信号传送图案以及通过热互连器连接到所述局部阱的散热图案；以及
热传递结构，连接到所述散热图案，用于将热从热源传递到所述散热图案，
其中所述热传递结构包括在所述热源与所述热互连器之间的至少一个热凸块。
2.如权利要求1所述的半导体存储器件，其中所述信号传送图案和所述散热图案的每个包括金属图案，其中所述信号传送图案的金属图案和所述散热图案的金属图案具有相同的堆叠结构，并且
其中所述信号互连器和所述热互连器包括相同的金属通路结构。
3.如权利要求1所述的半导体存储器件，其中所述至少一个热凸块与所述热源和所述热互连器接触。
4.如权利要求1所述的半导体存储器件，其中所述热传递结构包括：
热传递回路，与所述热凸块和所述散热图案连接。
5.如权利要求4所述的半导体存储器件，其中所述热传递回路包括：
连接到所述至少一个热凸块的第一热传递线和连接到所述散热图案的第二热传递线；
连接到所述第一热传递线的第一桥接通路和连接到所述第二热传递线的第二桥接通路；以及
桥接线，连接到所述第一桥接通路和所述第二桥接通路。
6.一种半导体存储器件，包括：
集成电路(IC)芯片结构，
其中所述IC芯片结构包括：
基板；以及
存储单元，设置在所述基板中；
布线堆叠结构，设置在所述IC芯片结构上，其中所述布线堆叠结构包括通过信号互连器连接到所述存储单元的信号传送图案以及通过热互连器连接到所述基板的散热图案，其中所述信号互连器传送操作信号到所述存储单元；
散热器，设置在所述基板上并且连接到所述散热图案使得热通过所述散热器从所述散热图案消散；以及
热传递结构，连接到所述散热图案并将热从热源传递到所述散热图案，其中所述热传递结构包括与所述热源连接的至少一个热凸块。
7.如权利要求6所述的半导体存储器件，还包括热柱，其中所述热柱穿过所述基板而与所述散热器和所述散热图案连接。
8.如权利要求6所述的半导体存储器件，其中所述热传递结构包括：
热传递回路，与所述热凸块和所述散热图案连接。
9.一种芯片堆叠封装，包括：
电路板，包括至少一个导电图案；
第一管芯，安装在所述电路板上，所述第一管芯包括第一芯片和产生比所述第一芯片更多的热的至少一个第二芯片，其中所述第一管芯的由所述至少一个第二芯片加热的部分是热点；以及
第二管芯，堆叠在所述第一管芯上并且连接到所述第一管芯，
其中所述第二管芯包括：
集成电路(IC)芯片结构，在其上存储数据；
布线堆叠结构，该布线堆叠结构包括连接到所述IC芯片结构用于传送操作信号到所述IC芯片结构的信号传送图案以及消散来自所述热点的热的散热图案；以及
热传递结构，用于将热从所述热点传递到所述散热图案。
10.如权利要求9所述的芯片堆叠封装，其中所述IC芯片结构包括：
基板；
存储单元，设置在所述基板中；以及
局部阱，设置在所述基板中，其中所述局部阱的导电类型不同于所述基板的导电类型，
其中所述布线堆叠结构设置在所述IC芯片结构上，其中所述布线堆叠结构包括通过信号互连器连接到所述存储单元的信号传送图案以及通过热互连器连接到所述局部阱的散热图案，并且
其中所述热传递结构包括接触所述热点的至少一个热凸块以及连接到所述散热图案和所述至少一个热凸块的热传递回路。
11.如权利要求10所述的芯片堆叠封装，还包括设置在所述第二管芯的至少一侧的横向散热器，
其中所述横向散热器连接到所述热传递回路使得所述热点的热通过所述横向散热器消散。
12.如权利要求9所述的芯片堆叠封装，其中所述IC芯片结构包括：
基板；
存储单元，设置在所述基板中；以及
热柱，穿过所述基板，
其中所述布线堆叠结构堆叠在所述IC芯片结构上，其中所述布线堆叠结构包括通过信号互连器连接到所述存储单元的信号传送图案以及通过热互连器连接到所述局部阱的散热图案，并且
其中所述热传递结构包括接触所述热点的至少一个热凸块以及连接到所述散热图案和所述至少一个热凸块的热传递回路。
13.如权利要求12所述的芯片堆叠封装，其中，当所述基板包括第一表面和与所述第一表面相反的第二表面并且所述存储单元设置在所述第一表面处时，所述第二管芯还包括设置在所述第二表面上的散热器，
并且其中所述散热器接触所述热柱以消散来自所述散热图案的热。
14.如权利要求9所述的芯片堆叠封装，其中所述第一管芯通过使用接合引线连接到所述电路板，并且
其中所述第二管芯通过使用导电凸块结构连接到所述第一管芯。
15.如权利要求9所述的芯片堆叠封装，其中所述第一管芯的所述第二芯片包括中央处理单元(CPU)或者图形处理单元(GPU)，所述第二管芯包括响应于来自所述CPU或所述GPU的信号将数据存储到其中的存储器件。
16.一种半导体存储器件，包括：
集成电路(IC)芯片结构，
其中所述IC芯片结构包括：
基板；
存储单元，设置在所述基板中；以及
局部阱，设置在所述基板中，其中所述局部阱的导电类型不同于所述基板的导电类型；
布线堆叠结构，设置在所述IC芯片结构上，其中所述布线堆叠结构包括信号传送图案、散热图案、第一绝缘层和堆叠在所述第一绝缘层上的第二绝缘层，
其中所述信号传送图案包括设置在所述第一绝缘层上的第一金属图案、设置在所述第二绝缘层上的第二金属图案、以及连接到所述存储单元以及所述第一金属图案和所述第二金属图案的信号互连器，
其中所述散热图案包括设置在所述第一绝缘层上的第三金属图案、设置在所述第二绝缘层上的第四金属图案、以及连接到所述局部阱以及所述第三金属图案和所述第四金属图案的热互连器；以及
热传递结构，连接到所述热互连器，用于传递热到所述第三金属图案和所述第四金属图案，
其中所述第一金属图案和所述第三金属图案相对于所述基板设置在彼此相同的层级，所述第二金属图案和所述第四金属图案相对于所述基板设置在彼此相同的层级。
17.如权利要求16所述的半导体存储器件，其中所述第一金属图案和所述第三金属图案包括相同的材料。
18.如权利要求16所述的半导体存储器件，其中所述第三金属图案和所述第四金属图案通过导热材料连接到彼此。
19.如权利要求16所述的半导体存储器件，其中所述第一金属图案交叠所述第二金属图案。
20.如权利要求16所述的半导体存储器件，其中所述第三金属图案交叠所述第四金属图案。
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