CN108022938A - A kind of manufacture method of semiconductor devices - Google Patents
A kind of manufacture method of semiconductor devices Download PDFInfo
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- CN108022938A CN108022938A CN201610927732.4A CN201610927732A CN108022938A CN 108022938 A CN108022938 A CN 108022938A CN 201610927732 A CN201610927732 A CN 201610927732A CN 108022938 A CN108022938 A CN 108022938A
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 24
- 238000005224 laser annealing Methods 0.000 claims abstract description 21
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 34
- 238000005530 etching Methods 0.000 claims description 24
- 230000008859 change Effects 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- QGZKDVFQNNGYKY-UHFFFAOYSA-O Ammonium Chemical compound [NH4+] QGZKDVFQNNGYKY-UHFFFAOYSA-O 0.000 claims 1
- 239000013039 cover film Substances 0.000 claims 1
- 125000003698 tetramethyl group Chemical group [H]C([H])([H])* 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 abstract description 78
- 230000008569 process Effects 0.000 abstract description 21
- 230000006378 damage Effects 0.000 abstract description 10
- 239000000126 substance Substances 0.000 description 13
- 239000013078 crystal Substances 0.000 description 12
- 238000000227 grinding Methods 0.000 description 8
- 238000001039 wet etching Methods 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 238000003384 imaging method Methods 0.000 description 6
- 239000007788 liquid Substances 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 5
- 238000005286 illumination Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910018557 Si O Inorganic materials 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- -1 boron ion Chemical class 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 238000003701 mechanical milling Methods 0.000 description 1
- 231100000252 nontoxic Toxicity 0.000 description 1
- 230000003000 nontoxic effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 238000009987 spinning Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Weting (AREA)
Abstract
The present invention provides a kind of manufacture method of semiconductor devices, the described method comprises the following steps：Wafer to be etched is provided, local laser annealing is carried out to the wafer, to form hot silicon oxide layer on the surface of the central area of the wafer；Spin etch is carried out to the wafer.Method using the present invention, compensates the total thickness variations of wafer, improves the performance of total thickness variations；And distributor need not be moved with 85% more than device wafers, expand process window；So as to also avoid the problem that the chuck damage thus brought, it is possible to achieve produce in enormous quantities.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of manufacture method of semiconductor devices.
Background technology
CIS (CMOS Image Sensor, cmos image sensor) device plays more next in our daily life
More important role, it becomes in a variety of digital products such as mobile phone, laptop, digital camera, DV
Essential element.And as the development of technology, people are also higher and higher to the quality requirement of display picture in digital product.Usually
In the case of, imaging sensor is above illumination (Front Side Illumination, abbreviation FSI), photosensitive layer, metal layer, Jie
Other optical elements such as electric layer and lenticule are set on a silicon substrate, and light reaches photosensitive through lenticule, metal layer, dielectric layer
Layer.Due to the refraction of the obstruction and light of metal layer and dielectric layer, reflection etc., so as to get the light total amount up to photosensitive layer is greatly reduced,
Such result is reduction of the sensitivity of imaging sensor.Higher sensitivity in order to obtain, backside illumination (Back Side
Illumination, abbreviation BSI) technology is by development and application.BSI imaging sensors can provide higher sensing area ratio (fill
Factor) and than relatively low destruction interference (destructive interference), its substrate is very thin, lens jacket,
Photosensitive layer and metal layer, dielectric layer respectively on opposite two surfaces of silicon substrate, therefore by the substrate back side illuminaton into
The light come directly reaches photosensitive layer by lenticule, avoids the obstruction of metal layer and dielectric layer, and less light is depleted,
So that imaging sensor has higher sensitivity.
In the prior art, limited by chemical mechanical grinding and rotary wet-etching technology process, ground in chemical machinery
After mill and wet method rotation etching, there are the total thickness variations of crystal round fringes in back-illuminated cmos image sensors (BSI CIS)
The problem of (total thickness variation, TTV) is big." total thickness variations " are defined as the thick and most of wafer
Absolute thickness between thin section point is poor.Because BSI imaging sensors use photodetector for backside-illuminated formula, if wafer thickness is uneven,
Light incidence process is uneven, necessarily affects the photoelectric effect of BSI imaging sensors.I.e. total thickness variations conference influences the suction of light
Receive, and cause the production loss of crystal round fringes, it is therefore desirable to which preceding working procedure and/or later process compensate it.Rotating
, it is necessary to which distributor is moved to 85% more than wafer in formula wet etching, such as 95%, to make up the etching of crystal round fringes, and divide
The maximum moving distance that orchestration allows is 85%；And in moving process, the chemical substance splashed backward passes through N2Hole enters,
Cause chuck to damage, and then lead to not produce in enormous quantities.
It is an object of the invention to provide a kind of manufacture method of semiconductor devices, to solve above-mentioned technical problem.
The content of the invention
A series of concept of reduced forms is introduced in Summary, this will in specific embodiment part into
One step describes in detail.The Summary of the present invention is not meant to attempt to limit technical solution claimed
Key feature and essential features, do not mean that the protection domain for attempting to determine technical solution claimed more.
In view of the deficiencies of the prior art, the present invention provides a kind of manufacture method of semiconductor devices, the described method includes：Carry
For wafer to be etched, local laser annealing is carried out to the wafer, to form heat on the surface of the central area of the wafer
Silicon oxide layer；Spin etch is carried out to the wafer.
Further, the etchant that the spin etch uses is tetramethylammonium hydroxide.
Further, it is additionally included in the edge etch step performed after the local laser annealing.
Further, the edge etch step carries out the fringe region of the wafer using the hot silicon oxide layer as mask
Etching.
Further, the etchant that the edge etch step uses is tetramethylammonium hydroxide.
Further, the thickness that the edge etch step etching removes is 0-1 microns.
Further, the step of carrying out local laser annealing to the wafer includes the use of the edge of wafer described in masked
Region, and the step of irradiate the wafer using laser.
Further, the wave-length coverage of laser used is in the local laser annealing：200-350nm.
Further, the thickness of the hot silicon oxide layer is 5-10nm.
Further, the width for not forming the fringe region of the hot silicon oxide layer on the wafer is 3-8mm.
Further, the step of removing the hot silicon oxide layer is further included before spin etch is carried out to the wafer.
In conclusion the method according to the invention, compensates the total thickness variations of wafer, gross thickness change is improved
The performance of change；And distributor need not be moved with 85% more than device wafers, expand process window；So as to also avoid thus
The problem of chuck damage brought, it is possible to achieve produce in enormous quantities.
Brief description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
In attached drawing：
Fig. 1 is the technical process schematic diagram of the semiconductor devices of the present invention.
The schematic cross section that the step of Fig. 2 is and is implemented successively according to the method for the exemplary embodiment of the present invention obtains respectively
Figure.
Embodiment
In the following description, a large amount of concrete details are given in order to provide more thorough understanding of the invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid with the present invention obscure, for some technical characteristics well known in the art not into
Row description.
In order to thoroughly understand the present invention, detailed step will be proposed in following description, to explain proposition of the present invention
Semiconductor devices manufacture method.Obviously, execution of the invention is not limited to the technical staff of semiconductor applications and is familiar with
Specific details.Presently preferred embodiments of the present invention is described in detail as follows, but in addition to these detailed descriptions, the present invention can be with
With other embodiment.
It should be appreciated that when the term " comprising " and/or " including " is used in this specification, it is indicated described in presence
Feature, entirety, step, operation, element and/or component, but do not preclude the presence or addition of other one or more features, entirety,
Step, operation, element, component and/or combinations thereof.
The manufacture method of semiconductor devices according to prior art, by chemical mechanical grinding and rotary wet-etching technology
The limitation of process, back-illuminated cmos image sensors occur crystal round fringes total thickness variations it is big the problem of, it is necessary to preceding working procedure
And/or later process compensates it.In rotary wet etching, the linear velocity of crystal round fringes is high, wafer and etching liquid
Time of contact it is short, etch period is short, and the etching rate of crystal round fringes is low, causes the TTV of wafer to be more than 0.3um, and desired TTV
Less than 0.2um.Therefore, in rotary wet etching, it is necessary to distributor is moved to 85% more than wafer, such as 95%, come more
The etching of crystal round fringes is mended, and the maximum moving distance that distributor allows is 85%；And in moving process, splash backward
Chemical substance passes through N2Hole enters, and causes chuck to damage, and then lead to not produce in enormous quantities.
Presence in view of the above problems, the present invention propose a kind of manufacture method of semiconductor devices, as shown in Figure 1, its
Including following key step：
In step S101, there is provided wafer to be etched, carries out local laser annealing, with the wafer to the wafer
Hot silicon oxide layer is formed on the surface of central area；
In step s 102, spin etch is carried out to the wafer.
Further, the etchant that the spin etch uses is tetramethylammonium hydroxide.
Further, it is additionally included in the edge etch step performed after the local laser annealing.
Further, the edge etch step carries out the fringe region of the wafer using the hot silicon oxide layer as mask
Etching.
Further, the etchant that the edge etch step uses is tetramethylammonium hydroxide.
Further, the step of carrying out local laser annealing to the wafer includes the use of the edge of wafer described in masked
Region, and the step of irradiate the wafer using laser.
Further, the step of removing the hot silicon oxide layer is further included before spin etch is carried out to the wafer.
Manufacturing method according to the invention, compensates the total thickness variations of wafer, improves total thickness variations
Performance；And distributor need not be moved with 85% more than device wafers, expand process window；So as to also avoid thus bringing
Chuck damage the problem of, it is possible to achieve produce in enormous quantities.
Exemplary embodiment
With reference to Fig. 2A-Fig. 2 G, the step of method according to an exemplary embodiment of the present invention is implemented successively point illustrated therein is
The schematic cross sectional view not obtained.
First, there is provided support wafer 200 and device wafers 201, and the device wafers 201 are bonded to the support crystalline substance
On the surface of circle 200, its bonded interface is 202, as shown in Figure 2 A.
The device wafers are Silicon Wafer.In subsequent technique, support wafer provides mechanical support for thin device wafers,
Device wafers are made not to be damaged.Device wafers and support wafer are combined, and are realized and interconnected by Si-O keys, the support wafer
Silicon oxide layer of the bonding face formed with thermal oxide growth.
The bonding technology is thermal bonding, and during the thermal bonding, the bonding pressure of application is 1-10N, bonding time
For 10-60s.Before two wafers are bonded, the wafer for being intended to bonding carries out wet clean process, attached to remove crystal column surface as far as possible
The particle, impurity, chemical pollutant etc., to obtain preferably bonding interface, meet rigors of the bonding conditions to surface.
The cleaning step carries out infiltration cleaning using deionized water (DI water) to device wafers, is then spin-dried for.As one
A example, the rotating speed of the spinning step is 1000-3500rpm, time 1-5min.Above-mentioned process conditions are to illustrate
Bright purpose, those skilled in the art can be adjusted as the case may be.
Next, the device wafers 201 are ground, to remove surface damage layer, as shown in Figure 2 B.Institute after grinding
The thickness for stating device wafers is 1-10um.Ginding process used can be that mechanical milling method, chemical grinding method or chemical machinery are ground
Mill method.The processing step of above-mentioned grinding has been known to those skilled in the art, and details are not described herein.
Then, chemical mechanical grinding step is performed to the device wafers 201, to improve the rough surface of device wafers
Degree, as shown in Figure 2 C.After performing chemical mechanical grinding, the thickness of the device wafers is 1-7um.The numerical value only as an example,
Can suitably it be adjusted according to specific device.The technical process of above-mentioned chemical mechanical grinding is the prior art, herein no longer
Repeat.
Then, local laser annealing is carried out to the device wafers 201, with the central area of the device wafers 201
Surface on form hot silicon oxide layer 203, as shown in Figure 2 D.
The step of carrying out local laser annealing to the device wafers 201 includes the use of mask 204 and covers the wafer 201
Fringe region, and irradiate the wafer using laser.The fringe region of the hot silicon oxide layer is not formed on the wafer
Width is 3-8mm.Therefore, in laser annealing, only the uncovered area of device wafers is exposed under laser.In atmosphere or
In oxygen atmosphere, under the action of strong UV laser pulses, the oxide that thickness is about 40nm is produced, hot Si oxide
Formation is attributed to absorption of the silicon to oxygen during surface melting.In the melting of recrystallization zone and again in process of setting, silicon leads to
The oxygen of capture absorption is crossed, Quick Oxidation occurs, forms hot silicon oxide layer.Make the technique depth of laser annealing controllable, it is necessary to
Laser with 200-350nm, therefore, the wave-length coverage of laser used is：200-350nm.After local laser annealing, the heat
The thickness of silicon oxide layer is 5-10nm.Above-mentioned numerical value according to specific device only as an example, can suitably be adjusted.
Then, rotation etching is carried out to the edge of the device wafers 201, as shown in Figure 2 E.The edge etch is with institute
Hot silicon oxide layer 203 is stated to be etched the fringe region of the device wafers 201 for mask.The edge etch step uses
Etchant be tetramethylammonium hydroxide (TMAH), TMAH etching liquids are sprayed in the device wafers, by rotation make institute
Etching liquid is stated to be uniformly distributed.TMAH is selected as wet etching liquid, this is because, first, not metal ion in TMAH will not
Because foreign metal ion causes damage device wafers, secondly TMAH has the corrosion rate close with KOH and selection ratio, rotten
Erosion surface effect is good, and last TMAH is nontoxic and pollution-free, easy to operate.Preferably, the concentration of TMAH is 5%-25%.TMAH is wet
When method etches no longer because crystal orientation is different and etch rate etc., the surface obtained after TMAH wet etchings be it is smooth, it is each
Region etch speed is identical, improves the reliability of device.
The thickness that the edge etch step etching removes is 0-1 microns, that is, after etching, the thickness of the device wafers 201
Spend for 1-6um.Numerical value according to specific device only as an example, can suitably be adjusted.Due in previous step, in device
Part crystal circle center forms hot silicon oxide layer, in this step, using edge of the hot silicon oxide layer as mask to the wafer
Region is etched.TMAH optionally etched edge silicon without etch center hot silicon oxide layer, therefore etch after device
The edge of wafer is thinner than center, so as to be compensated to the TTV of device wafers.
Then, the device wafers are cleaned with hydrofluoric acid, to remove hot silicon oxide layer 203, as shown in Figure 2 F.It is excellent
The hf etching liquid for selecting concentration to be 5%-10% performs etching.Certainly, can also use well known to those skilled in the art any
Etching technics performs etching.
Then, spin etch is carried out to the device wafers 201, as shown in Figure 2 G.The etching that the spin etch uses
Agent is TMAH.The thickness that the spin etch step etching removes is 0-1 microns, and after etching, the thickness of device wafers is 1-
5um.Numerical value according to specific device only as an example, can suitably be adjusted.In rotary wet etching, crystal round fringes
Linear velocity it is high, the time of contact of wafer and etching liquid is short, etch period is short, and the etching rate of crystal round fringes is low, in view of above
Technical process compensates TTV, and TTV is less than 0.2um after this step, meets the requirements, and improves TTV performances.
And distributor need not be moved with 85% more than device wafers, expand process window.So as to it also avoid in moving process,
The chemical substance splashed backward passes through N2Hole enters, the problem of causing chuck to damage, it is possible to achieve produces in enormous quantities.
Finally, ion implanting and laser annealing step are performed to the device wafers.In the ion implanting, injection from
Son is boron ion.The purpose for performing ion implanting is to form doped layer.Perform annealing steps purpose be activation injection boron from
Son.The energy of the ion implanting is 20-30KeV.The depth of the ion implanting reaches 700-1000 angstroms.In order to make below
Laser annealing can allow boron atom to activate completely, and laser annealing energy demand is sufficiently large, be preferably greater than 2.0J/cm2.Above-mentioned number
Value according to specific device only as an example, can suitably be adjusted.Formed after laser annealing in device wafers extra
Component, such as, metal grate, colour filter, lenticule etc., are then cut saw and are separated into back-illuminated cmos image sensors core
Piece.Specific technical process is with reference to the prior art, and details are not described herein.
In conclusion manufacturing method according to the invention, compensates the total thickness variations of wafer, improves total thickness
Spend the performance of change；And distributor need not be moved with 85% more than device wafers, expand process window；So as to also avoid
Thus the problem of chuck damage brought, it is possible to achieve produce in enormous quantities.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to
Citing and the purpose of explanation, and be not intended to limit the invention in the range of described embodiment.In addition people in the art
Member is it is understood that the invention is not limited in above-described embodiment, teaching according to the present invention can also be made more kinds of
Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (11)
1. a kind of manufacture method of semiconductor devices, it is characterised in that comprise the following steps：
Wafer to be etched is provided, local laser annealing is carried out to the wafer, with the surface of the central area of the wafer
Form hot silicon oxide layer；
Spin etch is carried out to the wafer.
2. according to the method described in claim 1, it is characterized in that, the etchant that the spin etch uses is tetramethyl hydrogen-oxygen
Change ammonium.
3. according to the method described in claim 1, it is characterized in that, it is additionally included in the edge performed after the local laser annealing
Etching step.
4. according to the method described in claim 3, it is characterized in that, the edge etch step is using the hot silicon oxide layer to cover
Film is etched the fringe region of the wafer.
5. according to the method described in claim 3, it is characterized in that, the etchant that the edge etch step uses is tetramethyl
Ammonium hydroxide.
6. according to the method described in claim 3, it is characterized in that, the thickness that edge etch step etching removes is 0-1
Micron.
7. according to the method described in claim 1, it is characterized in that, the step of carrying out local laser annealing to the wafer includes
Using the fringe region of wafer described in masked, and the step of irradiate the wafer using laser.
8. the method according to the description of claim 7 is characterized in that the local laser annealing in laser used wave-length coverage
It is：200-350nm.
9. according to the method described in claim 1, it is characterized in that, the thickness of the hot silicon oxide layer is 5-10nm.
10. according to the method described in claim 1, it is characterized in that, the side of the hot silicon oxide layer is not formed on the wafer
The width in edge region is 3-8mm.
11. according to the method described in claim 1, it is characterized in that, further included before spin etch is carried out to the wafer
The step of removing the hot silicon oxide layer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610927732.4A CN108022938A (en) | 2016-10-31 | 2016-10-31 | A kind of manufacture method of semiconductor devices |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610927732.4A CN108022938A (en) | 2016-10-31 | 2016-10-31 | A kind of manufacture method of semiconductor devices |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113097068A (en) * | 2021-03-31 | 2021-07-09 | 中国科学院微电子研究所 | Method for manufacturing semiconductor device |
| CN117524870A (en) * | 2023-12-29 | 2024-02-06 | 物元半导体技术(青岛)有限公司 | Wafer processing method and wafer |
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|---|---|---|---|---|
| US5863829A (en) * | 1995-08-24 | 1999-01-26 | Komatsu Electronic Metals Co., Ltd. | Process for fabricating SOI substrate |
| CN102044430A (en) * | 2009-10-23 | 2011-05-04 | 无锡华润上华半导体有限公司 | Method for polishing wafer |
| CN102820218A (en) * | 2011-06-08 | 2012-12-12 | 中芯国际集成电路制造(上海)有限公司 | Thinning method of wafer |
-
2016
- 2016-10-31 CN CN201610927732.4A patent/CN108022938A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5863829A (en) * | 1995-08-24 | 1999-01-26 | Komatsu Electronic Metals Co., Ltd. | Process for fabricating SOI substrate |
| CN102044430A (en) * | 2009-10-23 | 2011-05-04 | 无锡华润上华半导体有限公司 | Method for polishing wafer |
| CN102820218A (en) * | 2011-06-08 | 2012-12-12 | 中芯国际集成电路制造(上海)有限公司 | Thinning method of wafer |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113097068A (en) * | 2021-03-31 | 2021-07-09 | 中国科学院微电子研究所 | Method for manufacturing semiconductor device |
| CN117524870A (en) * | 2023-12-29 | 2024-02-06 | 物元半导体技术(青岛)有限公司 | Wafer processing method and wafer |
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Application publication date: 20180511 |