CN107946417B - A kind of panchromatic Minitype LED array vertical epitaxial preparation method - Google Patents
A kind of panchromatic Minitype LED array vertical epitaxial preparation method Download PDFInfo
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
Abstract
A kind of panchromatic Minitype LED array vertical epitaxial preparation method, belongs to technical field of semiconductors.The panchromatic Minitype LED array includes a conductive substrates, red light-emitting unit, stacking-type blue green light luminescence unit, micro- isolation structure, p-side electrode lead district, current injection area.Using MOCVD epitaxy technology in such a way that chips in etching technology combines, three kinds of extension red light-emitting unit (630nm), green luminescence unit (520nm), blue light emitting unit (450nm) luminescence units in same epitaxial substrate, chips in etching technology is recycled to form the small two-dimensional matrix of high integration, and the size of each luminescence unit may reduce as far as possible under the premise of guaranteeing device performance, it is larger to effectively solve single luminescence unit size in current LED display, it highly integrated can not assemble, the caused lower problem of screen resolution.
Description
Technical field
The invention belongs to technical field of semiconductors, and in particular to a kind of panchromatic Minitype LED array vertical epitaxial of red, green, blue
Preparation method.
Background technique
Full color LED display screen is usually assembled by RGB three primary colours (red, green, blue) luminescence unit according to certain arrangement mode
It forms, the dynamic image that rich in color, saturation degree is high, display frequency is high is shown by controlling the light on and off of every group of luminescence unit.But
The manufacturing process of the LED display of full color is troublesome, LED light sources up to ten thousand need to be usually embedded on a display panel, to every
Wavelength, service life, the coherence request of efficiency of LED is very high, thus causes its high production cost, production efficiency low, causes final
The reliability of LED display is low to be substantially reduced.And the final size of LED display is again by single LED luminescence unit size
The restriction of size, when short distance is observed, color difference is especially apparent, therefore there are larger on realizing highly integrated and high-resolution
Difficulty.And if distinguishing red, blue, the green three-color LED of extension on substrate using MOCVD technology, process is also sufficiently complex, needs
It repeatedly to take out, clean, extension again, the pollutant catabolic gene in operating process being required very stringent, finally also leading to yield rate
Decline.
Summary of the invention
The present invention is directed at least solve one of the technical problems existing in the prior art.For this purpose, present invention aims at mention
A kind of preparation method of panchromatic Minitype LED array out, using MOCVD epitaxy technology in such a way that chips in etching technology combines,
Extension red light-emitting unit (630nm), green luminescence unit (520nm), blue light emitting unit in same epitaxial substrate
(450nm) three kinds of luminescence units recycle chips in etching technology to form the small two-dimensional matrix of high integration, and each list that shines
The size of member may reduce as far as possible under the premise of guaranteeing device performance, to effectively solve in current LED display single
Luminescence unit size is larger, highly integrated can not assemble, the caused lower problem of screen resolution.
The present invention in order to achieve the above object, the technical solution adopted is as follows:
The invention discloses a kind of preparation methods of panchromatic Minitype LED array vertical epitaxial, which is characterized in that described is complete
Color micro LED array includes a conductive substrates, red light-emitting unit, stacking-type blue green light luminescence unit, micro- isolation structure, the side p
Contact conductor area, current injection area.The red light-emitting cellular construction includes GaAs buffer layer, N-shaped AlGaAs/ from bottom to top
The DBR of AlAs, N-shaped AlGaInP lower limit layer, multi-quantum well active region, p-type AlGaInP upper limiting layer, p-type GaP current expansion
Layer.The stacking-type blue green light luminescence unit is grown using blue, green quantum trap active area stack manner, in red light-emitting
Two column of preparation simultaneously on the right side of unit, include AlN buffer layer, GaN buffer layer, N-shaped GaN covering, InGaN/GaN blue light from bottom to top
Multi-quantum well active region, InGaN/GaN green light multi-quantum well active region, p-type AlGaN upper limiting layer, p-type GaN contact layer;Second
Column utilize wet etching technique, etch into successively regrow again after blue light Quantum well active district p-type AlGaN upper limiting layer and p
Type GaN contact layer;Tertial surface prepares blue light optical shielded layer directly to filter out blue wave band spectrum, and allows green light band
Spectrum passes through, to be respectively formed blue light emitting unit and green luminescence unit;Micro- isolation structure, using deposition, exposure mask,
The SiO that lithographic technique is prepared in the conductive substrates with a thickness of 0.5um~1um2Or SiNxThe micro- isolation structure of lattice-shaped, grid
The conductive substrates are exposed in lattice, the extension window as red light-emitting unit and stacking-type blue green light luminescence unit.The p
Lateral electrode lead areas and current injection area prepare metallic aluminium on the micro- isolation structure surface of column arrangement using electron beam evaporation technique
(Al), SiO is recycled2Passivation layer covers other regions, and wherein p-side electrode lead areas is located on the right side of each luminescence unit, electricity
Stream injection position is connected in Minitype LED array outermost, and with the p-side electrode lead areas of each column.
GaAs buffer layer includes GaAs low temperature buffer layer and GaAs high temperature buffer layer;AlN buffer layer is AlN high-temperature buffer
Layer;GaN buffer layer includes GaN low temperature buffer layer and GaN high temperature buffer layer.
Further, above-mentioned panchromatic Minitype LED array vertical epitaxial preparation method is realized by following steps:
(1) a kind of conductive substrates are chosen, which can be silicon (Si), silicon carbide (SiC), gallium nitride (GaN) or arsenic
Change gallium (GaAs);
(2) in the conductive substrates, use PECVD method deposition thickness for the SiO of 0.5um~1um2Or SiNxIt is thin
Film;
(3) exposure mask and dry method ICP lithographic method are utilized, it is big according to the luminescence unit size and isolation structure size of setting
SiO small, that conductive substrates surface is deposited2Or SiNxFilm is etched into lattice-shaped, the SiO in grid2Or SiNx is carved completely
Eating away, extension window needed for exposing growth red light-emitting unit;
(4) it after strictly cleaning the conductive substrates, is put into feux rouges MOCVD, in H2High-temperature process substrate surface under environment,
Water, the oxygen for removing adsorption start the epitaxial structure for growing red light-emitting unit later, and respectively GaAs is buffered from bottom to top
Layer, the DBR of N-shaped AlGaAs/AlAs material, N-shaped AlGaInP lower limit layer, AlGaInP/GaInP multi-quantum well active region, p-type
AlGaInP upper limiting layer, p-type GaP current extending;
(5) after taking out epitaxial wafer, SiO is deposited in all red light-emitting cell surfaces2Passivation layer, to protect outside feux rouges
Prolong structure, recycles exposure mask and dry method ICP lithographic method, while etching the extension window of two column stacking-type blue green light luminescence units
Mouthful;
(6) it is strictly put into blue green light MOCVD, after cleaning substrate in H2High-temperature process substrate surface under environment, removes table
Face absorption water, oxygen, start later grow blue green light luminescence unit epitaxial structure, from bottom to top respectively AlN buffer layer,
GaN buffer layer, N-shaped GaN covering, InGaN/GaN blue light multi-quantum well active region, InGaN/GaN green light multi-quantum well active region,
P-type AlGaN upper limiting layer, p-type GaN ohmic contact layer;
(7) after taking out epitaxial wafer, SiO is deposited on tertial blue green light luminescence unit surface2Passivation layer, to protect it
Epitaxial structure recycles exposure mask and wet etching method, secondary series stacking-type blue green light luminescence unit is etched into InGaN/GaN
Blue light Quantum well active district;
(8) it is strictly put into blue green light MOCVD, after cleaning substrate in H2High-temperature process substrate surface under environment, removes table
Water, the oxygen of face absorption, start continued growth p-type AlGaN upper limiting layer, p-type GaN ohmic contact layer later;
(9) epitaxial wafer is taken out, is etched using dry method ICP, the SiO of removal epitaxial wafer surface deposition2Passivation layer;
(10) ito transparent electrode is prepared using electron beam evaporation plating every side surface luminescence unit p, is connect as p-type ohm
Touched electrode;
(11) remove the ito transparent electrode in addition to luminescence unit surface using wet etching;
(12) blue light optical shielded layer is directly prepared on third column stacking-type blue green light luminescence unit surface, to filter out blue light
Band spectrum, and green light band spectrum is allowed to pass through;
(13) one layer of metallic aluminium (Al) is deposited on the micro- isolation structure surface of each column using electron beam evaporation methods, as the side p
Conductive layer recycles PECVD method to deposit one layer of SiO on metallic aluminium (Al)2Passivation layer is etched using exposure mask and dry method ICP,
Expose p-side electrode lead areas and current injection area.
In blue, green light multi-quantum well active region, the In content in the InGaN Quantum Well of green luminescence unit is sent out higher than blue light
In content in light unit InGaN Quantum Well.
The beneficial effects of the present invention are:
In preparation method provided by the invention, deposited using MOCVD epitaxy technology with chip, the side that lithographic technique combines
Formula realizes that three kinds of luminescence units of extension red, green, blue are as luminescence unit in same conductive substrates, wherein blue light emitting unit
It is disposably completed with green luminescence unit using stack growth technology, to effectively reduce taking-up, etching, cleaning, outer
The number prolonged substantially reduces contaminated probability, increases device yield, forms high integration using chips in etching technology later
Small two-dimensional matrix, finally obtain panchromatic Minitype LED array, and the size of each luminescence unit can guarantee device performance
Under the premise of reduce as far as possible, while reducing the spacing between each luminescence unit, it is LED gusts miniature so as to utmostly improve
The resolution ratio of column display screen.
Detailed description of the invention
Above-mentioned and/or additional aspect of the invention and advantage will become from the description of the embodiment in conjunction with the following figures
Obviously and it is readily appreciated that, in which:
Fig. 1 is the overlooking structure diagram of the panchromatic Minitype LED array of the embodiment of the present invention.
Fig. 2 is a kind of flow chart of the preparation method of panchromatic Minitype LED array of the present invention.
Fig. 3 is that embodiment utilizes PECVD technique to deposit one layer of SiO on conductive substrates2Or SiNxThe structural representation of film
Figure.
Fig. 4 is that exposure mask and dry method ICP the lithographic technique SiO in Fig. 3 are utilized in embodiment2Or SiNxIt is etched on film
The schematic diagram of red light-emitting unit extension window.
Fig. 5 utilizes the structural representation of MOCVD technology extension red light-emitting unit in the feux rouges extension window that Fig. 4 is etched
Figure.
Fig. 6 is to deposit SiO in red light-emitting unit epi-layer surface using PECVD technique in embodiment2Passivation layer, then benefit
It is etched with exposure mask and dry method ICP, while obtaining the structural schematic diagram of two column blue green light luminescence unit extension windows.
Fig. 7 is the knot that MOCVD technology extension blue green light luminescence unit in the extension window that Fig. 6 is etched is utilized in embodiment
Structure schematic diagram.
Fig. 8 is that wet etching technique is utilized in embodiment, etches away first row stacking-type blue green light luminescence unit epitaxial layer
To blue light Quantum well active district, and SiO is deposited in secondary series stacking-type blue green light luminescence unit epi-layer surface2The knot of passivation layer
Structure schematic diagram.
Fig. 9 is using MOCVD technology in embodiment in Fig. 8 first row wet etching to the extension of blue light Quantum well active district
On structure, continue the structural schematic diagram of epitaxial p-type AlGaN limiting layer and p-type GaN ohmic contact layer.
Figure 10 is to prepare ito transparent electrode on luminescence unit surface using exposure mask and electron beam evaporation technique in embodiment
Structural schematic diagram.
Figure 11 is that secondary series stacking-type blue green light luminescence unit epi-layer surface prepares blue light optical in fig. 8 in embodiment
The structural schematic diagram of shielded layer.
It is that isolation structure surface using electron beam evaporation technique prepares metallic aluminium (Al) that Figure 12, which is embodiment in column arrangement,
And utilize SiO2The structural schematic diagram in other regions of the passivation layer covering in addition to p-side electrode lead district and current injection area.
Wherein, appended drawing reference are as follows:
1: conductive substrates
2: micro- isolation structure
3: feux rouges Micro-LED luminescence unit
4: stacking-type blue-green luminescence unit
5: blue light Micro-LED luminescence unit
6: green light Micro-LED luminescence unit
7:p lateral electrode lead district
8: current injection area
9:SiO2Or SiNxFilm
10:GaAs low temperature buffer layer
11:GaAs high temperature buffer layer
12:n type Al0.6Ga0.4The dbr structure of As/AlAs
13:(Alx1Ga1-x1)y1In1-y1P lower limit layer 13
14:(Alx2Ga1-x2)y2In1-y2P/(Alx3Ga1-x3)y3In1-y3P multi-quantum well active region
15:p type (Alx4Ga1-x4)y4In1-y4P upper limiting layer
16:p type GaP current extending
17:SiO2Passivation layer
18:AlN high temperature buffer layer
19:GaN low temperature buffer layer
20:GaN high temperature buffer layer
21:n type GaN covering
22:Inx5Ga1-x5N/GaN blue light Quantum well active district
23:Inx6Ga1-x6N/GaN green quantum trap active area
24:p type Alx7Ga1-x7N upper limiting layer
25:p type GaN ohmic contact layer
26:ITO transparent electrode
27: blue light optical shielded layer
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, and for explaining only the invention, and is not considered as limiting the invention.
A kind of panchromatic Minitype LED array structure 100 provided according to embodiments of the present invention is described below with reference to Fig. 1.It is wrapped
Include: a conductive substrates 1, the micro- isolation structure 2 prepared in the conductive substrates 1, have on micro- isolation structure 2 it is several by
P-side electrode lead district 7 and current injection area 8 according to column arrangement, and have between micro- isolation structure 2 and several to be handed over according to column
Pitch the feux rouges Micro-LED luminescence unit 3 and stacking-type blue green light luminescence unit 4 of arrangement.
Wherein, the material of the conductive substrates 1 can be silicon (Si), silicon carbide (SiC), gallium nitride (GaN) or GaAs
(GaAs)。
Micro- isolation structure 2 is deposited directly in the conductive substrates 1 using PECVD technique, and preparing material is insulation material
Material, and be easy to deposit and remove, it can be SiO2Or SiNxFilm.
P-side electrode lead district 7 and current injection area 8 are arranged on micro- isolation structure 2, further, setting
On micro- isolation structure of column arrangement, the material that material is well conducting is prepared, is in the present embodiment metallic aluminium (Al).
Luminescence unit is respectively red by MOCVD technology epitaxial growth in the grid between micro- isolation structure 2
Light Micro-LED luminescence unit 3, stacking-type blue green light luminescence unit 4.
Further, the stacking-type blue green light luminescence unit 4 includes blue light Micro-LED luminescence unit 5 and green light
Micro-LED luminescence unit 6.
The present invention also provides a kind of methods for making above-mentioned panchromatic Minitype LED array structure 100, referring to Fig. 2, include with
Lower step:
Step 1: providing a conductive substrates 1, the material of the substrate can be silicon (Si), silicon carbide (SiC), gallium nitride (GaN)
Or GaAs (GaAs) is placed in the mixed solution of hydrochloric acid, hydrogen peroxide after deionized water repeated flushing 10 times
(HCl:H2O2:H2O=7:1:1), 80 DEG C are heated to, and is maintained 5 minutes.The conductive substrates are taken out, are rushed repeatedly with deionized water
It washes 10 times, is placed in (H in the mixed solution of sulfuric acid, hydrogen peroxide2SO4:H2O2:H2O=4:1:1 80 DEG C) are heated to, and maintains 5 points
Clock.The conductive substrates are taken out, with deionized water repeated flushing 10 times.Megasonic cleaning technology is recycled, the conductive liner is cleaned
After ten minutes, substrate is finally taken out, and dry in bottom.
Step 2: after the conductive substrates are cleaned according to step 1, being put into the reaction chamber of PECVD device, deposit
SiO2Or SiNxFilm 9 (as shown in Fig. 3~Figure 12), with a thickness of 0.5um~1um.Wherein deposit SiO2The reaction temperature of film
300 DEG C are set as, reactant gas source N20, flow is 1000~1500sccm;Deposit SiNxThe reaction temperature of film is set as 250
DEG C, reactant gas source NH3, flow is 10~50sccm.
Step 3: as shown in figure 4, the SiO that will be deposited described in step 2 on 1 surface of conductive substrates2Or SiNxFilm
9, the extension window that dry method ICP etches red light-emitting unit is carried out using exposure mask, retains the SiO in other regions2Or SiNxIt is thin
Film 9, feux rouges extension window width L1 can reduce as far as possible under the premise of guaranteeing red light-emitting unit performance.Cleaning finishes
Later, the conductive substrates 1 are placed in feux rouges MOCVD board, successively grow feux rouges Micro-LED luminescence unit structure 3,
As shown in Figure 5.First in 1000 DEG C~1200 DEG C of H21 surface 20min of conductive substrates described in high-temperature cleaning in atmosphere~
40min, and it is passed through AsH3, remove surface water, oxygen impurities;Reaction temperature is reduced to 520 DEG C~580 DEG C, in feux rouges window region
Domain growth thickness is the GaAs low temperature buffer layer 10 of 100nm~150nm;Reaction temperature is risen to 720 DEG C~780 DEG C, described
Continue on GaAs low temperature buffer layer 10 in the GaAs high temperature buffer layer 11 that growth thickness is 100nm~150nm.Wherein, GaAs is slow
The n-shaped doped source for rushing layer (including low temperature buffer layer 10 and high temperature buffer layer 11) is SiH4, doping concentration is that (1~5) E18 is former
Son/cm3;The continued growth N-shaped Al on the high temperature GaAs buffer layer 110.6Ga0.4The dbr structure 12 of As/AlAs, it is red to improve
Light light extraction efficiency;In the N-shaped Al0.6Ga0.4Continued growth 500nm~1000nm on 12 basis of dbr structure of As/AlAs
N-shaped (Alx1Ga1-x1)y1In1-y1P lower limit layer 13, n-shaped doped source are SiH4, doping concentration be (5~8) E17 atom/
cm3, and x1=0.7, y1=0.5;In the N-shaped (Alx1Ga1-x1)y1In1-y1Continued growth on P lower limit layer 13
(Alx2Ga1-x2)y2In1-y2P/(Alx3Ga1-x3)y3In1-y3P multi-quantum well active region 14, the periodicity of multiple quantum wells are 5~20
It is right, wherein well layer (Alx2Ga1-x2)y2In1-y2X2=0.1, the y2=0.9 of P, undopes, barrier layer (Alx3Ga1-x3)y3In1-y3P's
X3=0.5, y3=0.5 undope;In (the Alx2Ga1-x2)y2In1-y2P/(Alx3Ga1-x3)y3In1-y3P multiple quantum wells is active
In area 14 continued growth with a thickness of 500nm~1000nm p-type (Alx4Ga1-x4)y4In1-y4P upper limiting layer 15, p-type doped source
For Cp2Mg, doping concentration are (5~8) E18 atom/cm3, and x4=0.7, y4=0.5;By reaction temperature rise to 750 DEG C~
820 DEG C, in the p-type (Alx4Ga1-x4)y4In1-y4On P upper limiting layer 15 continued growth with a thickness of 3umm~10um p-type GaP
Current extending 16, p-type doped source Cp2Mg, doping concentration are (1~2) E19 atom/cm3.Then, by reaction temperature
After being down to 500 DEG C~700 DEG C annealing 10min~30min, then it is down to room temperature, completes 3 structure of feux rouges Micro-LED luminescence unit
Growth.
As shown in fig. 6, the above-mentioned epitaxial wafer for obtaining feux rouges Micro-LED luminescence unit 3 is taken out from MOCVD board,
All red light-emitting cell surfaces deposit one layer of SiO using PECVD technique2Passivation layer 17, and dry method ICP quarter is carried out using exposure mask
Erosion technology etches two column stacking-type blue green light luminescence unit extension windows on the right side of red light-emitting unit, retains other regions
SiO2Or SiNxFilm 17.Extension window width L2 can be under the premise of guaranteeing stacking-type blue green light luminescence unit performance, to the greatest extent
It may reduce.Width L3=10um~100um of micro- isolation structure between luminescence unit.
As shown in fig. 7, the above-mentioned epitaxial wafer for etching stacking-type blue green light luminescence unit extension window is placed in bluish-green
In light MOCVD board, two column stacking-type blue green light luminescence units 4 are successively grown.First in 1000 DEG C~1200 DEG C of H2Atmosphere
In the above-mentioned epitaxial wafer surface 20min~40min of high-temperature cleaning, and be passed through NH3, remove surface water, oxygen impurities;Keep the reaction temperature
Degree, growth thickness are the AlN high temperature buffer layer 18 of 100nm~200nm;Reaction temperature is reduced to 500 DEG C~600 DEG C, in AlN
On high temperature buffer layer 18 continued growth with a thickness of 10nm~30nm GaN low temperature buffer layer 19, then by temperature rise to 1000 DEG C~
1200 DEG C, the GaN high temperature buffer layer 20 of 1000nm~2000nm is grown, is undoped;Continue on the GaN high temperature buffer layer 20
Growth thickness is the N-shaped GaN covering 21 of 1000nm~2000nm, n-shaped doped source SiH4, doping concentration is (1~2) E18
A atom/cm3;5~20 couples of blue light In of continued growth on the N-shaped GaN covering 21x5Ga1-x5N/GaN Quantum well active district
22, wherein Inx5Ga1-x5N quantum well layer thickness 2nm~6nm, reaction temperature are reduced to 700 DEG C~800 DEG C, and x5=0.15~
0.20, it undopes.GaN quantum barrier layer is with a thickness of 10nm~20nm, and 800 DEG C~900 DEG C of reaction temperature, n-shaped doped source is
SiH4, doping concentration is (1~2) E18 atom/cm3;In the Inx5Ga1-x5Continue to give birth on N/GaN Quantum well active district 22
Long 5~20 couples of green light Inx6Ga1-x6N/GaN Quantum well active district 23, wherein Inx6Ga1-x6N quantum well layer thickness 2nm~6nm, instead
It answers temperature to be reduced to 600 DEG C~700 DEG C, and x6=0.20~0.40, undopes.GaN quantum barrier layer with a thickness of 10nm~20nm,
800 DEG C~900 DEG C of reaction temperature, n-shaped doped source SiH4, doping concentration is (1~2) E18 atom/cm3;In the green light
Inx6Ga1-x623 continued growth of N/GaN Quantum well active district with a thickness of 50nm~150nm p-type Alx7Ga1-x7N upper limiting layer 24,
Reaction temperature rises to 900 DEG C~1050 DEG C, p-type doped source Cp2Mg, doping concentration are (1~2) E18 atom/cm3, x7
=0.2~0.4;In the p-type Alx7Ga1-x7On N upper limiting layer 24 continued growth with a thickness of 50nm~100nm the Europe p-type GaN
Nurse contact layer 25, p-type doped source Cp2Mg, doping concentration are (1~2) E19 atom/cm3;Then, reaction temperature is dropped
Down to after 700 DEG C~850 DEG C annealing 15min~30min, then it is down to room temperature, completes 4 structure of stacking-type blue green light luminescence unit
Growth.
As shown in figure 8, by the above-mentioned epitaxial wafer for obtaining red light-emitting unit 3 and stacking-type blue green light luminescence unit 4 from
MOCVD board takes out, and deposits one layer of SiO using PECVD technique on all third column stacking-types blue green light luminescence unit surface2It is blunt
Change layer 17, then use wet etching, secondary series stacking-type blue green light luminescence unit is etched to blue light emitting quantum well region 22.
As shown in figure 9, the epitaxial wafer after above-mentioned wet etching is reentered into continued growth in blue green light MOCVD board.
First in 1000 DEG C~1200 DEG C of H2The above-mentioned epitaxial wafer surface 20min~40min of high-temperature cleaning is carried out in atmosphere, and is passed through
NH3, remove surface water, oxygen impurities;In the secondary series blue light Inx6Ga1-x6Continued growth is thick in N/GaN Quantum well active district 22
Degree is the p-type Al of 50nm~150nmx7Ga1-x7N upper limiting layer 24, reaction temperature rise to 900 DEG C~1050 DEG C, and p-type doped source is
Cp2Mg, doping concentration are (1~2) E18 atom/cm3, x7=0.2~0.4;In the p-type Alx7Ga1-x7N upper limiting layer 24
P-type GaN ohmic contact layer 25 of the upper continued growth with a thickness of 50nm~100nm, p-type doped source Cp2Mg, doping concentration are (1
~2) E19 atom/cm3;Then, it after reaction temperature being reduced to 700 DEG C~850 DEG C annealing 15min~30min, then is down to
Room temperature completes the growth of blue light Micro-LED luminescence unit structure 4.
Step 4: first row feux rouges Micro-LED luminescence unit 3 obtained above, secondary series blue light Micro-LED are sent out
Light unit 5, third column stacking-type blue green light luminescence unit 6 epitaxial wafer from MOCVD board take out, utilize exposure mask and dry method ICP
Etching, gets rid of the SiO on 3 surface of first row red light-emitting unit2Passivation layer 17 and third column stacking-type blue green light luminescence unit 6
The SiO on surface2Passivation layer 17.
Step 5: as shown in Figure 10, being prepared using electron beam evaporation technique on epitaxial wafer surface with a thickness of 100nm~300nm
Ito transparent electrode, as Ohm contact electrode.Then, the transparent electricity on micro- isolation structure surface is removed using wet etching
Pole is respectively formed red light-emitting unit ito transparent electrode 26, blue light emitting unit ito transparent electrode 26, stacking-type blue green light hair
Light unit ito transparent electrode 26.
Step 6: as shown in figure 11, being prepared for the luminous single in third column stacking-type blue green light of ito transparent electrode above-mentioned
First 6 surfaces prepare one layer of blue light optical shielded layer 27, and blue light optical shielded layer uses magnetron sputtering technology, plate on its surface
Upper TiO2/SiO2Compound film system, to realize the cut-off of blue wave band spectrum.
Step 7: as shown in figure 12, thickness being prepared on the isolation structure surface of all column arrangements using electron beam evaporation technique
The metallic aluminium (Al) for being 3um~10um for 300nm~500nm, width.It is etched using PECVD and dry method ICP, the column is arranged
The metallic aluminium SiO in other regions of the isolation structure surface of cloth2P-side electrode lead areas 7 and electric current note are exposed in passivation layer covering
Enter area 8, finally obtains panchromatic Minitype LED array.
A kind of panchromatic Minitype LED array 100 according to an embodiment of the present invention, deposited using MOCVD epitaxy technology and chip,
The mode that lithographic technique combines realizes that three kinds of luminescence units of extension red, green, blue are single as shining in same conductive substrates
Member, wherein blue light emitting unit and green luminescence unit are disposably completed using stack growth technology, to effectively subtract
It is small to take out, etching, clean, the number of extension, contaminated probability is substantially reduced, device yield is increased, utilizes chip later
Lithographic technique forms the small two-dimensional matrix of high integration, finally obtains panchromatic Minitype LED array, and the ruler of each luminescence unit
It is very little to be reduced as far as possible under the premise of guaranteeing device performance, while the spacing between each luminescence unit is reduced, so as to
Utmostly improve the resolution ratio of Minitype LED array display screen.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " illustrative examples ",
The description of " example ", " specific example " or " some examples " etc. means specific features described in conjunction with this embodiment or example, knot
Structure, material or feature are included at least one embodiment or example of the invention.In the present specification, to above-mentioned term
Schematic representation may not refer to the same embodiment or example.Moreover, specific features, structure, material or the spy of description
Point can be combined in any suitable manner in any one or more of the embodiments or examples.
Although an embodiment of the present invention has been shown and described, it will be understood by those skilled in the art that: not
A variety of change, modification, replacement and modification can be carried out to these embodiments in the case where being detached from the principle of the present invention and objective, this
The range of invention is defined by the claims and their equivalents.
Claims (6)
1. a kind of panchromatic Minitype LED array vertical epitaxial, which is characterized in that panchromatic Minitype LED array vertical epitaxial is led including one
Electric substrate, red light-emitting unit, stacking-type blue green light luminescence unit, micro- isolation structure, p-side electrode lead district, current injection area;
The red light-emitting cellular construction includes under GaAs buffer layer, the DBR of N-shaped AlGaAs/AlAs, N-shaped AlGaInP from bottom to top
Limiting layer, multi-quantum well active region, p-type AlGaInP upper limiting layer, p-type GaP current extending;The stacking-type blue green light
Luminescence unit is grown using blue, green quantum trap active area stack manner, two column of preparation simultaneously on the right side of red light-emitting unit,
It from bottom to top include AlN buffer layer, GaN buffer layer, N-shaped GaN covering, InGaN/GaN blue light multi-quantum well active region, InGaN/
GaN green light multi-quantum well active region, p-type AlGaN upper limiting layer, p-type GaN contact layer;Secondary series utilizes wet etching technique, carves
Lose successively regrowed after blue light Quantum well active district again p-type AlGaN upper limiting layer and p-type GaN contact layer;Tertial table
Face prepares blue light optical shielded layer directly to filter out blue wave band spectrum, and green light band spectrum is allowed to pass through, to be respectively formed
Blue light emitting unit and green luminescence unit;Micro- isolation structure, using deposition, exposure mask, lithographic technique in the conductive liner
SiO is prepared on bottom2Or SiNxLattice-shaped micro- isolation structure exposes the conductive substrates in grid, as red light-emitting unit
With the extension window of stacking-type blue green light luminescence unit;The p-side electrode lead areas and current injection area, are steamed using electron beam
Coating technology is prepared metallic aluminium (Al) on the micro- isolation structure surface of column arrangement, recycles SiO2Passivation layer covers other regions, wherein p
Lateral electrode lead areas is located on the right side of each luminescence unit, and current injection area is located at Minitype LED array outermost, and with each column
P-side electrode lead areas is connected.
2. a kind of panchromatic Minitype LED array vertical epitaxial described in accordance with the claim 1, which is characterized in that SiO2Or SiNxGrid
The micro- isolation structure of trellis with a thickness of 0.5um~1um.
3. a kind of panchromatic Minitype LED array vertical epitaxial described in accordance with the claim 1, which is characterized in that the substrate is selected from silicon
(Si), silicon carbide (SiC), gallium nitride (GaN) or GaAs (GaAs).
4. a kind of panchromatic Minitype LED array vertical epitaxial described in accordance with the claim 1, which is characterized in that GaAs buffer layer packet
Include GaAs low temperature buffer layer and GaAs high temperature buffer layer;AlN buffer layer is AlN high temperature buffer layer;GaN buffer layer includes GaN low
Warm buffer layer and GaN high temperature buffer layer.
5. a kind of preparation method of panchromatic Minitype LED array vertical epitaxial described in claim 1, which is characterized in that specific packet
Include following steps:
(1) a kind of conductive substrates are chosen;
(2) in the conductive substrates, SiO is deposited using PECVD method2Or SiNxFilm;
(3) exposure mask and dry method ICP lithographic method are utilized, it, will according to the luminescence unit size and isolation structure size of setting
The SiO of conductive substrates surface deposition2Or SiNxFilm is etched into lattice-shaped, the SiO in grid2Or SiNx is etched away completely,
Extension window needed for exposing growth red light-emitting unit;
(4) it after strictly cleaning the conductive substrates, is put into feux rouges MOCVD, in H2High-temperature process substrate surface under environment, removes
Water, the oxygen of adsorption start the epitaxial structure for growing red light-emitting unit, from bottom to top respectively GaAs buffer layer, n later
DBR, the N-shaped AlGaInP lower limit layer, AlGaInP/GaInP multi-quantum well active region, p-type of type AlGaAs/AlAs material
AlGaInP upper limiting layer, p-type GaP current extending;
(5) after taking out epitaxial wafer, SiO is deposited in all red light-emitting cell surfaces2Passivation layer, to protect feux rouges epitaxy junction
Structure recycles exposure mask and dry method ICP lithographic method, while etching the extension window of two column stacking-type blue green light luminescence units;
(6) it is strictly put into blue green light MOCVD, after cleaning substrate in H2High-temperature process substrate surface under environment removes surface suction
Attached water, oxygen start the epitaxial structure for growing blue green light luminescence unit later, and respectively AlN buffer layer, GaN are slow from bottom to top
Rush layer, N-shaped GaN covering, InGaN/GaN blue light multi-quantum well active region, InGaN/GaN green light multi-quantum well active region, p-type
AlGaN upper limiting layer, p-type GaN ohmic contact layer;
(7) after taking out epitaxial wafer, SiO is deposited on tertial blue green light luminescence unit surface2Passivation layer, to protect its extension
Structure recycles exposure mask and wet etching method, secondary series stacking-type blue green light luminescence unit is etched into InGaN/GaN blue light
Quantum well active district;
(8) it is strictly put into blue green light MOCVD, after cleaning substrate in H2High-temperature process substrate surface under environment removes surface suction
Attached water, oxygen, start continued growth p-type AlGaN upper limiting layer, p-type GaN ohmic contact layer later;
(9) epitaxial wafer is taken out, is etched using dry method ICP, the SiO of removal epitaxial wafer surface deposition2Passivation layer;
(10) ito transparent electrode is prepared using electron beam evaporation plating every side surface luminescence unit p, as p-type Ohmic contact electricity
Pole;
(11) remove the ito transparent electrode in addition to luminescence unit surface using wet etching;
(12) blue light optical shielded layer is directly prepared on third column stacking-type blue green light luminescence unit surface, to filter out blue wave band
Spectrum, and green light band spectrum is allowed to pass through;
(13) one layer of metallic aluminium (Al) is deposited on the micro- isolation structure surface of each column using electron beam evaporation methods, as the side p conduction
Layer recycles PECVD method to deposit one layer of SiO on metallic aluminium (Al)2Passivation layer is etched using exposure mask and dry method ICP, is exposed
P-side electrode lead areas and current injection area.
6. a kind of preparation method of panchromatic Minitype LED array vertical epitaxial according to claim 5, which is characterized in that blue,
In green light multi-quantum well active region, the In content in the InGaN Quantum Well of green luminescence unit is higher than blue light emitting unit InGaN
In content in Quantum Well.
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104508822A (en) * | 2012-07-27 | 2015-04-08 | 欧司朗光电半导体有限公司 | Method for producing a multicolour LED display |
CN105742307A (en) * | 2016-04-26 | 2016-07-06 | 张希娟 | Color micro display device and preparation method thereof |
CN106531867A (en) * | 2016-12-21 | 2017-03-22 | 福建昌达光电有限公司 | Vertical structured chip having multiple color blocks independently emitting light and manufacturing method thereof |
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-
2017
- 2017-11-29 CN CN201711228628.7A patent/CN107946417B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104508822A (en) * | 2012-07-27 | 2015-04-08 | 欧司朗光电半导体有限公司 | Method for producing a multicolour LED display |
CN105742307A (en) * | 2016-04-26 | 2016-07-06 | 张希娟 | Color micro display device and preparation method thereof |
CN106531867A (en) * | 2016-12-21 | 2017-03-22 | 福建昌达光电有限公司 | Vertical structured chip having multiple color blocks independently emitting light and manufacturing method thereof |
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