CN107919388A - The method for reducing two-dimensional material field-effect transistor contact resistance - Google Patents
The method for reducing two-dimensional material field-effect transistor contact resistance Download PDFInfo
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- CN107919388A CN107919388A CN201711127151.3A CN201711127151A CN107919388A CN 107919388 A CN107919388 A CN 107919388A CN 201711127151 A CN201711127151 A CN 201711127151A CN 107919388 A CN107919388 A CN 107919388A
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- transition metal
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- dimensional material
- effect transistor
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- 239000000463 material Substances 0.000 title claims abstract description 76
- 230000005669 field effect Effects 0.000 title claims abstract description 44
- 238000000034 method Methods 0.000 title claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 96
- 229910052723 transition metal Inorganic materials 0.000 claims abstract description 91
- 150000003624 transition metals Chemical class 0.000 claims abstract description 91
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 46
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 claims abstract description 28
- 239000005864 Sulphur Substances 0.000 claims abstract description 25
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910052711 selenium Inorganic materials 0.000 claims abstract description 15
- 239000011669 selenium Substances 0.000 claims abstract description 15
- 238000011161 development Methods 0.000 claims abstract description 10
- 238000001816 cooling Methods 0.000 claims abstract description 5
- 238000001259 photo etching Methods 0.000 claims abstract description 3
- 239000010931 gold Substances 0.000 claims description 19
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 18
- 229910052737 gold Inorganic materials 0.000 claims description 18
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 16
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 13
- 239000010936 titanium Substances 0.000 claims description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 9
- 239000000843 powder Substances 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 7
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 5
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 5
- 229910052750 molybdenum Inorganic materials 0.000 claims description 5
- 239000011733 molybdenum Substances 0.000 claims description 5
- 239000004411 aluminium Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 239000011651 chromium Substances 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 230000009467 reduction Effects 0.000 claims description 4
- RWSOTUBLDIXVET-UHFFFAOYSA-N Dihydrogen sulfide Chemical compound S RWSOTUBLDIXVET-UHFFFAOYSA-N 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 3
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 3
- 229920000642 polymer Polymers 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 229910052717 sulfur Inorganic materials 0.000 claims description 3
- 239000011593 sulfur Substances 0.000 claims description 3
- 230000007704 transition Effects 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 3
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 claims description 2
- 229910052793 cadmium Inorganic materials 0.000 claims description 2
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 claims description 2
- 239000007789 gas Substances 0.000 claims description 2
- 229910000037 hydrogen sulfide Inorganic materials 0.000 claims description 2
- 238000009413 insulation Methods 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 229910000058 selane Inorganic materials 0.000 claims description 2
- 239000011734 sodium Substances 0.000 claims description 2
- 229910052979 sodium sulfide Inorganic materials 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims 1
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 36
- 239000002184 metal Substances 0.000 description 36
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 32
- 238000005566 electron beam evaporation Methods 0.000 description 21
- 238000010586 diagram Methods 0.000 description 19
- 238000001755 magnetron sputter deposition Methods 0.000 description 19
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 16
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 16
- 238000001704 evaporation Methods 0.000 description 16
- 230000008020 evaporation Effects 0.000 description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 11
- 239000010703 silicon Substances 0.000 description 11
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 10
- 238000000231 atomic layer deposition Methods 0.000 description 10
- 229910052719 titanium Inorganic materials 0.000 description 10
- 238000004528 spin coating Methods 0.000 description 9
- 239000008367 deionised water Substances 0.000 description 8
- 229910021641 deionized water Inorganic materials 0.000 description 8
- 150000002739 metals Chemical class 0.000 description 8
- 229910052757 nitrogen Inorganic materials 0.000 description 8
- 238000012545 processing Methods 0.000 description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 8
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 6
- 238000000861 blow drying Methods 0.000 description 5
- 229910052961 molybdenite Inorganic materials 0.000 description 5
- 229910052982 molybdenum disulfide Inorganic materials 0.000 description 5
- 230000008021 deposition Effects 0.000 description 3
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical compound S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 description 3
- 229910052582 BN Inorganic materials 0.000 description 2
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000011572 manganese Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000004073 vulcanization Methods 0.000 description 2
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 210000000887 face Anatomy 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- VDGJOQCBCPGFFD-UHFFFAOYSA-N oxygen(2-) silicon(4+) titanium(4+) Chemical group [Si+4].[O-2].[O-2].[Ti+4] VDGJOQCBCPGFFD-UHFFFAOYSA-N 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66431—Unipolar field-effect transistors with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
Abstract
The present invention relates to a kind of method for reducing two-dimensional material field-effect transistor contact resistance, comprise the following steps：At least one transition metal area is deposited on the surface of part of substrate, forms transition metal layer；Wherein, the thickness in transition metal area is 0.1 2nm；Photoresist layer is formed after photoetching, development, at least there are two holes for being used to source-drain electrode be deposited, the lower section face part transition metal layer in each hole and the surface of part of substrate, each hole are located at the side in transition metal area on photoresist layer；Source-drain electrode is deposited in hole, then removes photoresist layer, exposes the substrate of other parts；Transition metal is vulcanized using sulphur source or selenizing is carried out to transition metal using selenium source, two-dimensional material field-effect transistor is formed in substrate surface after cooling.The present invention, as protecting insulating layer, is formed the raceway groove of two-dimensional material between source-drain electrode, the overlapping area between raceway groove and source-drain electrode is reduced, so as to reduce contact resistance therebetween using source-drain electrode.
Description
Technical field
The present invention relates to two-dimensional material field, more particularly to a kind of two-dimensional material field-effect transistor contact resistance that reduces
Method.
Background technology
Active channel area of the semiconductive two-dimensional material as field-effect transistor, can overcome traditional silicon base field-effect brilliant
The short channel effect of body pipe.Further, since the ultra-thin thickness of two-dimensional material, excellent pliability, can be realized based on two-dimensional material
The preparation of super-small, flexible flexible field-effect transistor.In recent years, based on two-dimentional MoS2、WS2、MoSe2、PtS2、
PtSe2Field-effect transistor Deng semiconductive two-dimensional material causes and has carried out great concern.
However, the carrier mobility for the two-dimentional field-effect transistor reported at present is still far below two-dimensional material in theory
The mobility of itself, one reason for this is that the contact resistance between two-dimensional material and metal electrode significantly limit device
Performance.Thus, the contact resistance how being effectively reduced between two-dimensional material raceway groove and metal electrode is current two-dimentional field-effect
The significant challenge that transistor application field is faced.
The content of the invention
In order to solve the above technical problems, the object of the present invention is to provide one kind to reduce the contact of two-dimensional material field-effect transistor
The method of resistance, using source-drain electrode as protecting insulating layer, forms the raceway groove of two-dimensional material between source-drain electrode, reduces ditch
Overlapping area between road and source-drain electrode, so as to reduce contact resistance therebetween.
A kind of method of reduction two-dimensional material field-effect transistor contact resistance of the present invention, comprises the following steps：
(1) at least one transition metal area is deposited on the surface of part of substrate, forms transition metal layer；Wherein, transition gold
The thickness for belonging to area is 0.1-2nm；
(2) photoresist layer is formed after photoetching, development, has at least two to be used to source-drain electrode be deposited on photoresist layer
Hole, the surface of lower section face at least a portion transition metal layer in each hole, each hole is located at the side in transition metal area, that is, exists
Channel region is formed between source-drain electrode；
(3) source-drain electrode is deposited in hole, then removes photoresist layer, exposes the substrate of other parts；
(4) transition metal is vulcanized or selenizing is carried out to transition metal using selenium source using sulphur source, formed after cooling
Two-dimensional material field-effect transistor.
Further, in step (1), the material insulation of substrate, substrate material is glass or polymer flexibility material.
Further, in step (1), the surface of substrate is insulating medium layer, and the material of insulating medium layer is titanium dioxide
Silicon, aluminium oxide, hafnium oxide or zirconium oxide, the thickness of insulating medium layer is 20-300nm.
Further, in step (1), transition metal is molybdenum (Mo), platinum (Pt), tungsten (W), manganese (Mn), nickel (Ni), cadmium
(Cd) or palladium (Pd).Preferably, transition metal is molybdenum (Mo), tungsten (W) or platinum (Pt).
Further, in step (1), it is additionally included between substrate and transition metal layer and is sequentially depositing grid and gate medium
The step of, to prepare bottom grating structure.
Further, in step (4), two-dimensional material is additionally included in before cooling and/or source-drain electrode surface is sequentially depositing
The step of gate medium and grid, to prepare top gate structure.
Further, the material of grid is aluminium, titanium/gold, chromium, chrome gold, molybdenum or ITO (tin indium oxide).
Further, the material of gate medium is silica, aluminium oxide, hafnium oxide, zirconium oxide or boron nitride.
Further, in step (2), the shape in hole is rectangle, square, circular or irregular shape.
Further, in step (2), the lower section in hole can be with a part of transition metal layer of face and a part of substrate
Surface；Or the lower section in whole hole all faces transition metal layer.
Further, in step (2), the thickness of photoresist layer is 50nm-2 μm.
Further, in step (3), source-drain electrode is titanium (Ti) electrode, gold (Au) electrode, aluminium (Al) electrode, chromium
(Cr) one or both of electrode.
Further, in step (4), sulphur source is sulphur powder, vulcanized sodium or hydrogen sulfide.Preferably, sulphur source is sulphur powder.
Further, in step (4), selenium source is selenium powder or hydrogen selenide.Preferably, selenium source is selenium powder.
Further, in step (4), substrate is heated to 550-750 DEG C, shape after sulphur source is heated to 115-130 DEG C
Into sulfur-bearing atmosphere, sulfur-bearing atmosphere transition metal vulcanizes it；Or
In step (4), substrate is heated to 400-500 DEG C, gas containing selenium is formed after selenium source is heated to 230-245 DEG C
Atmosphere, the transition metal of atmosphere containing selenium carry out selenizing to it.
Preferably, when the transition metal in step (1) is molybdenum, it is vulcanized using sulphur source in step (4)；Work as step
Suddenly when the transition metal in (1) is platinum, it is vulcanized or using selenium source to its selenizing using sulphur source in step (4).
After step (3), a part for source-drain electrode is directly contacted with a part of transition metal area, and another part is straight
Connect and contacted with substrate.After step (4) so that the another part transition metal area not contacted with source-drain electrode cure or
Selenizing, forms two-dimensional material channel region.
According to the above aspect of the present invention, the present invention has at least the following advantages：
Using both sides source and drain metal electrode as protecting insulating layer, channel region between the selective metal electrode to source and drain
Transition metal layer converted, so as to form two-dimensional material channel region, realize two-dimensional material channel region and source and drain metal electrode
Between autoregistration, the overlapping area between two-dimensional material channel region and transition metal is reduced, so as to reduce dead resistance；
And transition metal (channel region of a part of source and drain metal electrode of two-dimensional material channel region both sides directly with lower section
Be subject to source and drain metal coating outside domain and do not cure or the metal layer of selenizing) contact, effectively reduce two-dimensional material raceway groove with gold
Belong to the contact resistance between electrode.
Described above is only the general introduction of technical solution of the present invention, in order to better understand the technological means of the present invention,
And can be practiced according to the content of specification, below for presently preferred embodiments of the present invention and coordinate attached drawing describe in detail as after.
Brief description of the drawings
Fig. 1 is the structure diagram of substrate in the embodiment of the present invention 1；
Fig. 2 is the underlying structure schematic diagram that transition metal layer has been modified in the embodiment of the present invention 1；
Fig. 3 is the underlying structure schematic diagram after spin coating photoresist in the embodiment of the present invention 1；
Fig. 4 is that the underlying structure schematic diagram after source-drain electrode is deposited in the embodiment of the present invention 1 in hole；
Fig. 5 is that the underlying structure schematic diagram after photoresist is removed in the embodiment of the present invention 1；
Fig. 6 is the structure diagram of the field-effect transistor of the two-dimensional material prepared by the embodiment of the present invention 1；
Fig. 7 is the structure diagram of the fet array of the two-dimensional material prepared by the embodiment of the present invention 5；
Fig. 8 is the structure diagram after 6 evaporation metal grid of the embodiment of the present invention；
Fig. 9 is the structure diagram after the deposition evaporation gate dielectric layer of the embodiment of the present invention 6；
Figure 10 is the structure diagram that the embodiment of the present invention 6 is deposited behind transition metal area；
Figure 11 is the structure diagram that the embodiment of the present invention 6 is deposited after source-drain electrode；
Figure 12 is the field-effect transistor of obtained two-dimensional material after 6 transition metal area of the embodiment of the present invention cures
Structure diagram；
Figure 13 is the overlooking the structure diagram of the field-effect transistor of the two-dimensional material prepared by the embodiment of the present invention 6；
Figure 14 is the underlying structure schematic diagram that transition metal layer has been modified in the embodiment of the present invention 8；
Figure 15 is that underlying structure schematic diagram after source-drain electrode is deposited in the embodiment of the present invention 8；
Figure 16 is the structure diagram of substrate after transition metal area in part cures in the embodiment of the present invention 8；
Figure 17 is that the structure diagram after gate dielectric layer is deposited in the embodiment of the present invention 8；
Figure 18 is the structure diagram after evaporation metal grid in the embodiment of the present invention 8；
Figure 19 is the overlooking the structure diagram of the field-effect transistor of the two-dimensional material prepared by the embodiment of the present invention 8；
Description of reference numerals：
1-Si layers；2-SiO2Layer；3- transition metal area；4- photoresist layers；5- holes；6- source-drain electrodes；7-MoS2；8-
PtSe2；9- substrates；10- metal gates；11- gate dielectric layers.
Embodiment
With reference to the accompanying drawings and examples, the embodiment of the present invention is described in further detail.Implement below
Example is used to illustrate the present invention, but is not limited to the scope of the present invention.
Embodiment 1
Referring to Fig. 1-6, a kind of method for reducing two-dimensional material field-effect transistor contact resistance, bag are present embodiments provided
Include following steps：
(1) substrate is prepared, it is surface covered with silica (SiO2) the highly doped silicon chip of p-type, its surface has
The SiO of 100nm thickness2Layer 2, bottom is Si layers 1, is cleaned respectively with acetone, ethanol, deionized water, then will with nitrogen gun
Silicon wafer blow-drying (Fig. 1).
(2) rectangle is deposited in the upper surface of substrate using electron beam evaporation, magnetron sputtering or atomic layer deposition method
Transition metal area 3, its area be less than upper surface of substrate area, formed transition metal layer, its thickness is 0.1nm, and material is
Mo (Fig. 2).
(3) spin coating photoresist, with post-exposure, development, forms photoresist layer 4, there are two to be used to be deposited on photoresist layer 4
The hole 5 of source-drain electrode, hole 5 is rectangular, the lower section face part transition metal area 3 in each hole 5 and the surface of part of substrate, two
Hole 5 is located at 3 both sides in transition metal area respectively, i.e., channel region (Fig. 3, the region that dotted line surrounds are formed between source-drain electrode
Represent the transition metal area 3 for being photo-etched glue-line covering).
(4) source-drain electrode 6 is deposited in hole 5, is specifically deposited respectively in hole using electron beam evaporation or magnetron sputtering
Titanium and gold (Fig. 4), then remove photoresist layer 4 with acetone soln, expose the substrate (Fig. 5) of other parts.Source-drain electrode 6 at this time
A part directly contacted with a part of transition metal area 3, another part is directly contacted with substrate, and one of transition metal
Divide and do not contacted with source-drain electrode.
(5) substrate is put into double temperature-area tubular furnaces, and substrate is placed on high-temperature region, controlled at 550 degree.By sulphur powder
Low-temperature space is placed on, is volatilized under 115 degree so that the Mo metals not contacted with source-drain electrode are exposed in sulphur atmosphere and cure
After form MoS27 (Fig. 6).
(6) sample after processing is taken out, forms the field-effect transistor (figure of two-dimensional material after Temperature fall in substrate
6)。
Embodiment 2
Present embodiments provide a kind of method for reducing two-dimensional material field-effect transistor contact resistance, including following step
Suddenly：
(1) substrate is prepared, it is surface covered with silica (SiO2) the highly doped silicon chip of p-type, its surface has
The SiO of 200nm thickness2Layer, is cleaned with acetone, ethanol, deionized water respectively, then with nitrogen gun by silicon wafer blow-drying.
(2) rectangle is deposited in the upper surface of substrate using electron beam evaporation, magnetron sputtering or atomic layer deposition method
Transition metal area, its area be less than upper surface of substrate area, formed transition metal layer, its thickness is 0.1nm, and material is
Mo。
(3) spin coating photoresist, with post-exposure, development, forms photoresist layer, having two on photoresist layer is used for evaporation source
The hole of drain electrode, hole is rectangular, the lower section face part transition metal area in each hole and the surface of part of substrate, two hole difference
Positioned at the both sides in transition metal area, i.e., channel region is formed between source-drain electrode.
(4) source-drain electrode is deposited in hole, titanium is specifically deposited in hole using electron beam evaporation or magnetron sputtering respectively
And gold, remaining photoresist then is removed with acetone soln, exposes the substrate of other parts.A part for source-drain electrode is straight at this time
Connect and contacted with a part of transition metal area, another part is directly contacted with substrate, and a part for transition metal not with source and drain
Electrode contacts.
(5) substrate is put into double temperature-area tubular furnaces, and substrate is placed on high-temperature region, controlled at 680 degree.By sulphur powder
Low-temperature space is placed on, is volatilized under 130 degree so that the Mo metals not contacted with source-drain electrode are exposed in sulphur atmosphere and cure
After form MoS2。
(6) sample after processing is taken out, forms the field-effect transistor of two-dimensional material after Temperature fall in substrate.
Embodiment 3
Present embodiments provide a kind of method for reducing two-dimensional material field-effect transistor contact resistance, including following step
Suddenly：
(1) substrate is prepared, it is surface covered with silica (SiO2) the highly doped silicon chip of p-type, its surface has
The SiO of 250nm thickness2Layer, is cleaned with acetone, ethanol, deionized water respectively, then with nitrogen gun by silicon wafer blow-drying.
(2) rectangle is deposited in the upper surface of substrate using electron beam evaporation, magnetron sputtering or atomic layer deposition method
Transition metal area, its area be less than upper surface of substrate area, formed transition metal layer, its thickness is 0.5nm, and material is
Pt。
(3) spin coating photoresist, with post-exposure, development, forms photoresist layer, having two on photoresist layer is used for evaporation source
The hole of drain electrode, hole is rectangular, the lower section face part transition metal area in each hole and the surface of part of substrate, two hole difference
Positioned at the both sides in transition metal area, i.e., channel region is formed between source-drain electrode.
(4) source-drain electrode is deposited in hole, titanium is specifically deposited in hole using electron beam evaporation or magnetron sputtering respectively
And gold, remaining photoresist then is removed with acetone soln, exposes the substrate of other parts.A part for source-drain electrode is straight at this time
Connect and contacted with a part of transition metal area, another part is directly contacted with substrate, and a part for transition metal not with source and drain
Electrode contacts.
(5) substrate is put into double temperature-area tubular furnaces, and substrate is placed on high-temperature region, controlled at 750 degree.By sulphur powder
Low-temperature space is placed on, is volatilized under 120 degree so that the Pt metals not contacted with source-drain electrode are exposed in sulphur atmosphere and cure
After form PtS2。
(6) sample after processing is taken out, forms the field-effect transistor of two-dimensional material after Temperature fall in substrate.
Embodiment 4
Present embodiments provide a kind of method for reducing two-dimensional material field-effect transistor contact resistance, including following step
Suddenly：
(1) substrate is prepared, it is surface covered with aluminium oxide (Al2O3) the highly doped silicon chip of p-type, its surface has 50nm
Thick Al2O3Layer, is cleaned with acetone, ethanol, deionized water respectively, then with nitrogen gun by silicon wafer blow-drying.
(2) rectangle is deposited in the upper surface of substrate using electron beam evaporation, magnetron sputtering or atomic layer deposition method
Transition metal area, its area be less than upper surface of substrate area, formed transition metal layer, its thickness is 2nm, material Pt.
(3) spin coating photoresist, with post-exposure, development, forms photoresist layer, having two on photoresist layer is used for evaporation source
The hole of drain electrode, hole is rectangular, the lower section face part transition metal area in each hole and the surface of part of substrate, two hole difference
Positioned at the both sides in transition metal area, i.e., channel region is formed between source-drain electrode.
(4) source-drain electrode is deposited in hole, titanium is specifically deposited in hole using electron beam evaporation or magnetron sputtering respectively
And gold, remaining photoresist then is removed with acetone soln, exposes the substrate of other parts.A part for source-drain electrode is straight at this time
Connect and contacted with a part of transition metal layer, another part is directly contacted with substrate, and a part for transition metal not with source and drain
Electrode contacts.
(5) substrate is put into double temperature-area tubular furnaces, and substrate is placed on high-temperature region, controlled at 400 degree.By selenium powder
Low-temperature space is placed on, is volatilized under 230 degree so that the Pt metals not contacted with source-drain electrode are exposed in selenium atmosphere by selenizing
After form PtSe2。
(6) sample after processing is taken out, forms the field-effect transistor of two-dimensional material after Temperature fall in substrate.
Embodiment 5
Present embodiments provide a kind of method for reducing two-dimensional material field-effect transistor contact resistance, including following step
Suddenly：
(1) substrate is prepared, it is surface covered with silica (SiO2) the highly doped silicon chip of p-type, its surface has
The SiO of 300nm thickness2Layer 2, bottom is Si layers 1, is cleaned respectively with acetone, ethanol, deionized water, then will with nitrogen gun
Silicon wafer blow-drying.
(2) multiple rectangles are deposited in the upper surface of substrate using electron beam evaporation, magnetron sputtering or atomic layer deposition method
Transition metal area, form transition metal layer, the area in each transition metal area is less than the area of upper surface of substrate, its thickness is
0.5nm, material Pt.
(3) spin coating photoresist, with post-exposure, develops, formation photoresist layer, is used for evaporation source with multiple on photoresist layer
The hole of drain electrode, hole is rectangular, and each hole is located at the side of transition metal, and the lower section face part transition metal in each hole and
The surface of part of substrate, so as to form channel region between source-drain electrode.
(4) source-drain electrode 6 is deposited in hole, titanium is specifically deposited in hole using electron beam evaporation or magnetron sputtering respectively
And gold, remaining photoresist then is removed with acetone soln, exposes the substrate of other parts.A part for source-drain electrode is straight at this time
Connect and contacted with a part of transition metal, another part is directly contacted with substrate, and a part for transition metal is not electric with source and drain
Pole contacts.
(5) substrate is put into double temperature-area tubular furnaces, and substrate is placed on high-temperature region, controlled at 500 degree.By selenium powder
Low-temperature space is placed on, is volatilized under 245 degree so that the Pt metals not contacted with source-drain electrode are exposed in selenium atmosphere by selenizing
After form PtSe28。
(6) sample after processing is taken out, forms the field-effect transistor battle array of two-dimensional material after Temperature fall in substrate
Arrange (Fig. 7).
Embodiment 6
Present embodiments provide a kind of method for reducing two-dimensional material field-effect transistor contact resistance, including following step
Suddenly：
(1) substrate 9 is prepared, it is glass, is cleaned respectively with acetone, ethanol, deionized water, then will with nitrogen gun
Substrate dries up.
(2) in the portion of upper surface evaporation metal grid 10 (Fig. 8) of substrate 9, electron beam evaporation or magnetic control specifically are used
Sputter at the upper surface evaporation chrome gold of substrate.
(3) in the upper surface of metal gates 10 deposition gate dielectric layer 11 (Fig. 9), specifically splashed using electron beam evaporation, magnetic control
Penetrate or atomic layer deposition method metal gates upper surface deposition of aluminium oxide.The gate dielectric layer 11 deposited covers metal gate
A part for pole 10.
(4) using electron beam evaporation, magnetron sputtering or atomic layer deposition method in the grid directly over metal gates 10
The transition metal area 3 of a rectangle is deposited in the upper surface of dielectric layer 11, its area is less than the area (figure of gate dielectric layer 11 in substrate
10) transition metal layer, is formed, its thickness is 0.1nm, material Mo.
(5) spin coating photoresist, with post-exposure, development, forms photoresist layer, having two on photoresist layer is used for evaporation source
The hole of drain electrode 6, hole is rectangular, the lower section face part transition metal area 3 in each hole and the surface of part gate dielectric layer 11, and two
A hole is located at the both sides in transition metal area 3 respectively, i.e., forms channel region between source-drain electrode 6.
(6) source-drain electrode 6 is deposited in hole, titanium is specifically deposited in hole using electron beam evaporation or magnetron sputtering respectively
And gold, remaining photoresist then is removed with acetone soln, exposes the region being covered by photoresist.The one of source-drain electrode 6 at this time
Part is directly contacted with a part of transition metal area 3, and another part is directly contacted with gate dielectric layer 11, and the one of transition metal
Part does not contact (Figure 11) with source-drain electrode 6.Source-drain electrode 6 is separated by gate dielectric layer 11 completely with metal gates 10, but is bowed
Under optionally, source-drain electrode 6 and metal gates 10 have 1-2 micron to overlap in space coordinate, as shown in figure 13, generation at dotted line
The region that table is capped, represents naked eyes visibility region at solid line.
(7) substrate 9 is put into double temperature-area tubular furnaces, and substrate 9 is placed on high-temperature region, controlled at 680 degree.By sulphur
Powder is placed on low-temperature space, volatilizees under 130 degree so that the Mo metals not contacted with source-drain electrode 6 are exposed to quilt in sulphur atmosphere
MoS is formed after vulcanization27 (Figure 12).
(8) sample after processing is taken out, the field-effect transistor of two-dimensional material is formed after Temperature fall.
Embodiment 7
Present embodiments provide a kind of method for reducing two-dimensional material field-effect transistor contact resistance, including following step
Suddenly：
(1) substrate is prepared, it is polymer flexibility material, is cleaned respectively with acetone, ethanol, deionized water, then
Substrate is dried up with nitrogen gun.
(2) in the portion of upper surface evaporation metal grid of substrate, electron beam evaporation or magnetron sputtering are specifically used in base
The upper surface evaporation ITO (tin indium oxide) at bottom.
(3) gate dielectric layer, upper table of the specific method using transfer in metal gates are deposited in the upper surface of metal gates
Face covers boron nitride.The gate dielectric layer covers a part for metal gates.
(4) it is situated between using electron beam evaporation, magnetron sputtering or atomic layer deposition method in the grid directly over metal gates
The transition metal area of a rectangle is deposited in the upper surface of matter floor, its area is less than the area of gate medium in substrate, forms transition gold
Belong to layer, its thickness is 0.1nm, material Mo.
(5) spin coating photoresist, with post-exposure, development, forms photoresist layer, having two on photoresist layer is used for evaporation source
The hole of drain electrode, hole is rectangular, the lower section face part transition metal area in each hole and the surface of part gate dielectric layer, two holes
It is located at the both sides in transition metal area respectively, i.e., channel region is formed between source-drain electrode.
(6) source-drain electrode is deposited in hole, titanium is specifically deposited in hole using electron beam evaporation or magnetron sputtering respectively
And gold, remaining photoresist then is removed with acetone soln, exposes the substrate of other parts.A part for source-drain electrode is straight at this time
Connect and contacted with a part of transition metal area, another part is directly contacted with gate dielectric layer, and a part for transition metal not with
Source-drain electrode contacts.Source-drain electrode is separated by gate dielectric layer completely with metal gates, but in the case of overlooking, source-drain electrode and gold
Belong to grid have in space coordinate 1-2 micron overlap.
(7) substrate is put into double temperature-area tubular furnaces, and substrate is placed on high-temperature region, controlled at 680 degree.By sulphur powder
Low-temperature space is placed on, is volatilized under 130 degree so that the Mo metals not contacted with source-drain electrode are exposed in sulphur atmosphere and cure
After form MoS2。
(8) sample after processing is taken out, forms the field-effect transistor of two-dimensional material after Temperature fall in substrate.
Embodiment 8
Present embodiments provide a kind of method for reducing two-dimensional material field-effect transistor contact resistance, including following step
Suddenly：
(1) substrate 9 is prepared, it is glass, is cleaned respectively with acetone, ethanol, deionized water, then will with nitrogen gun
Substrate dries up.
(2) rectangle is deposited in the upper surface of substrate 9 using electron beam evaporation, magnetron sputtering or atomic layer deposition method
Transition metal area 3 (Figure 14), its area be less than substrate 9 area, formed transition metal layer, its thickness is 0.1nm, and material is
Mo。
(3) spin coating photoresist, with post-exposure, development, forms photoresist layer, having two on photoresist layer is used for evaporation source
The hole of drain electrode 6, hole is rectangular, the lower section face part transition metal area 3 in each hole and the surface of part of substrate 9, two holes
It is located at the both sides in transition metal area 3 respectively, i.e., forms channel region between source-drain electrode 6.
(4) source-drain electrode 6 is deposited in hole, titanium is specifically deposited in hole using electron beam evaporation or magnetron sputtering respectively
And gold, remaining photoresist then is removed with acetone soln, exposes the substrate of other parts.A part for source-drain electrode 6 at this time
Directly contacted with a part of transition metal area 3, another part is directly contacted with substrate 9, and a part for transition metal not with
Source-drain electrode 6 contacts (Figure 15).
(5) substrate 9 is put into double temperature-area tubular furnaces, and substrate 9 is placed on high-temperature region, controlled at 680 degree.By sulphur
Powder is placed on low-temperature space, volatilizees under 130 degree so that the Mo metals not contacted with source-drain electrode 6 are exposed to quilt in sulphur atmosphere
MoS is formed after vulcanization27 (Figure 16).
(6) gate dielectric layer 11 is deposited, specifically using electron beam evaporation, magnetron sputtering or atomic layer deposition method deposited oxide
Aluminium.MoS is completely covered in the gate dielectric layer deposited27 and source-drain electrode 6 (Figure 17).
(7) in the upper surface evaporation metal grid 10 of gate dielectric layer 11, electron beam evaporation or magnetron sputtering specifically are used
In the upper surface of gate dielectric layer 11 evaporation ITO (tin indium oxide).The size of metal gates 10 is less than the ruler of lower section gate dielectric layer 11
It is very little.(Figure 18), metal gates 10 are separated by gate dielectric layer 11 completely with source-drain electrode 6, but in the case of overlooking, source-drain electrode 6
There is 1-2 microns overlapping in space coordinate with metal gates 10, as shown in figure 19, the region that representative is capped at dotted line is real
Naked eyes visibility region is represented at line.
(8) sample after processing is taken out, forms the field-effect transistor of two-dimensional material after Temperature fall in substrate.
The above is only the preferred embodiment of the present invention, is not intended to limit the invention, it is noted that for this skill
For the those of ordinary skill in art field, without departing from the technical principles of the invention, can also make it is some improvement and
Modification, these improvements and modifications also should be regarded as protection scope of the present invention.
Claims (10)
- A kind of 1. method for reducing two-dimensional material field-effect transistor contact resistance, it is characterised in that comprise the following steps：(1) at least one transition metal area is deposited on the surface of part of substrate, forms transition metal layer；Wherein, the transition gold The thickness for belonging to area is 0.1-2nm；(2) photoresist layer is formed after photoetching, development, has at least two to be used to source-drain electrode be deposited on the photoresist layer Hole, the surface of lower section face at least a portion transition metal layer in each hole, each hole is located at the transition metal area Side；(3) source-drain electrode is deposited in the hole, then removes the photoresist layer, exposes the substrate of other parts；(4) transition metal is vulcanized or selenizing is carried out to transition metal using selenium source using sulphur source, in substrate table after cooling Face forms the two-dimensional material field-effect transistor.
- 2. the method according to claim 1 for reducing two-dimensional material field-effect transistor contact resistance, it is characterised in that： In step (1), the material insulation of the substrate, the material of the substrate is glass or polymer flexibility material.
- 3. the method according to claim 1 for reducing two-dimensional material field-effect transistor contact resistance, it is characterised in that： In step (1), the surface of the substrate is insulating medium layer, and the material of affiliated insulating medium layer is silica, aluminium oxide, oxygen Change hafnium or zirconium oxide, the thickness of the insulating medium layer is 20-300nm.
- 4. the method for the reduction two-dimensional material field-effect transistor contact resistance according to Claims 2 or 3, its feature exist In：In step (1), the step that grid and gate medium are sequentially depositing between the substrate and the transition metal layer is additionally included in Suddenly.
- 5. the method for the reduction two-dimensional material field-effect transistor contact resistance according to Claims 2 or 3, its feature exist In：In step (4), the step of being sequentially depositing gate medium and grid is further included before cooling.
- 6. the method according to claim 1 for reducing two-dimensional material field-effect transistor contact resistance, it is characterised in that： In step (1), the transition metal is one kind in molybdenum, platinum, tungsten, manganese, nickel, cadmium or palladium.
- 7. the method according to claim 1 for reducing two-dimensional material field-effect transistor contact resistance, it is characterised in that： In step (3), the source-drain electrode is one or both of Ti electrode, gold electrode, aluminium electrode and chromium electrode.
- 8. the method according to claim 1 for reducing two-dimensional material field-effect transistor contact resistance, it is characterised in that： In step (4), the sulphur source is one kind in sulphur powder, vulcanized sodium or hydrogen sulfide.
- 9. the method according to claim 1 for reducing two-dimensional material field-effect transistor contact resistance, it is characterised in that： In step (4), the selenium source is selenium powder or hydrogen selenide.
- 10. the method for the reduction two-dimensional material field-effect transistor contact resistance according to any one of claim 1,8,9, It is characterized in that：In step (4), substrate is heated to 550-750 DEG C, sour gas is formed after the sulphur source is heated to 115-130 DEG C Atmosphere, the sulfur-bearing atmosphere transition metal vulcanize it；OrIn step (4), substrate is heated to 400-500 DEG C, gas containing selenium is formed after the selenium source is heated to 230-245 DEG C Atmosphere, the transition metal of atmosphere containing selenium carry out selenizing to it.
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| CN108878516A (en) * | 2018-05-08 | 2018-11-23 | 广东工业大学 | A kind of two-dimensional material field effect transistor of transverse structure and its preparation method and application |
| CN113725360A (en) * | 2021-09-02 | 2021-11-30 | 中国人民解放军国防科技大学 | Thermal field transistor based on tantalum disulfide charge density wave phase change and preparation method thereof |
| WO2022227343A1 (en) * | 2021-04-30 | 2022-11-03 | 长鑫存储技术有限公司 | Transistor structure and preparation method therefor, and semiconductor structure and preparation method therefor |
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| CN108878516A (en) * | 2018-05-08 | 2018-11-23 | 广东工业大学 | A kind of two-dimensional material field effect transistor of transverse structure and its preparation method and application |
| WO2022227343A1 (en) * | 2021-04-30 | 2022-11-03 | 长鑫存储技术有限公司 | Transistor structure and preparation method therefor, and semiconductor structure and preparation method therefor |
| CN113725360A (en) * | 2021-09-02 | 2021-11-30 | 中国人民解放军国防科技大学 | Thermal field transistor based on tantalum disulfide charge density wave phase change and preparation method thereof |
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