CN107396003B - DP signal distributor and DP signal distribution method - Google Patents
DP signal distributor and DP signal distribution method Download PDFInfo
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- CN107396003B CN107396003B CN201710749884.4A CN201710749884A CN107396003B CN 107396003 B CN107396003 B CN 107396003B CN 201710749884 A CN201710749884 A CN 201710749884A CN 107396003 B CN107396003 B CN 107396003B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract
The invention provides a DP signal distributor, which comprises a DP signal input circuit, a signal distribution circuit, a first DP signal output circuit, a second DP signal output circuit and a power module, wherein the output end of the DP signal input circuit is connected with the input end of the signal distribution circuit, the output end of the signal distribution circuit is respectively connected with the input ends of the first DP signal output circuit and the second DP signal output circuit, and the power module is respectively connected with the DP signal input circuit, the signal distribution circuit, the first DP signal output circuit and the second DP signal output circuit. The invention also provides a DP signal distribution method. The beneficial effects of the invention are as follows: the DP signal distributor with low cost, stable performance and high bandwidth can convert an input DP high-definition video signal and an input DP audio signal into two paths of consistent and synchronous DP signal output.
Description
Technical Field
The present invention relates to a signal splitter, and more particularly, to a DP signal splitter and a DP signal splitting method.
Background
DisplayPort is a display interface protocol promulgated by the Video Electronics Standards Association (VESA). As successor to DVI, displayPort has several prominent advantages over DVI. Firstly, displayPort meets the transmission requirement of high-definition video signals and simultaneously adds the support of the high-definition audio signal transmission function. Secondly, the video signal transmission device has unidirectional and four-link connection capability, and the transmission rate can reach 21.6Gbps (displayport 1.2 version), so that the transmission quality of the video signal is higher, and higher resolution and refresh rate are supported. Finally, because the system is compatible with the application mode of the internal and external interfaces and comprises a group of auxiliary channels with the bandwidth of 1Mbps, the system has stronger peripheral equipment integration capability. In addition, compared with the other widely used high-performance multimedia interface HDMI, the DisplayPort is completely open, and the user does not need to pay any cost for the development of the DisplayPort, so that the application cost is greatly reduced. Today, the technology of DisplayPort interface is getting more and more popular in the market due to the above advantages. More and more high-performance multimedia terminal devices compatible with DP interface technology are applied in various fields.
In a high-definition digital multimedia application system, a plurality of digital multimedia terminals are often required to output information sent by the same high-definition digital multimedia signal source, for example, a high-definition video terminal display place, commercial advertisement playing and the like, and conventionally, a video signal source is configured for each display terminal, so that the system cost is increased, and the reliability of the system is greatly reduced.
Therefore, aiming at the defects existing in the application of the multi-terminal to receive the same multimedia signals, the development of the high-definition multimedia signal distributor with low cost, stable performance and high bandwidth has good practical significance by combining the DisplayPort interface technology.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a DP signal distributor and a DP signal distribution method with low cost, stable performance and high bandwidth.
The invention provides a DP signal distributor, which comprises a DP signal input circuit, a signal distribution circuit, a first DP signal output circuit, a second DP signal output circuit and a power module, wherein the output end of the DP signal input circuit is connected with the input end of the signal distribution circuit, the output end of the signal distribution circuit is respectively connected with the input ends of the first DP signal output circuit and the second DP signal output circuit, the power module is respectively connected with the DP signal input circuit, the signal distribution circuit, the first DP signal output circuit and the second DP signal output circuit, and DP input signals are cloned into two identical DP signals after entering the signal distribution circuit through the DP signal input circuit and are output to downstream equipment through the first DP signal output circuit and the second DP signal output circuit.
As a further improvement of the invention, the input end of the power supply module is connected with DC24V power supply, the input end of the DP signal input circuit is connected with a DP signal source, and the output ends of the first DP signal output circuit and the second DP signal output circuit are connected with DP downstream equipment.
As a further improvement of the present invention, the signal distribution circuit includes a front-end module, a DP receiver and a cloning module for recovering data of the input video and audio signals, and a transmitter module, where the transmitter module includes a first DP transmitter and a second DP transmitter, the output end of the DP signal input circuit is connected to the input end of the front-end module, the output end of the front-end module is connected to the input ends of the DP receiver and the cloning module, the output ends of the DP receiver and the cloning module are respectively connected to the first DP transmitter and the second DP transmitter, and the DP receiver and the cloning module convert the received data packets of the front-end module into video raster data streams and audio samples for cloning, and encode the two groups of data streams and audio samples after cloning into two DP single signal data packets for serialization and transmission, respectively, to the first DP transmitter and the second DP transmitter.
As a further improvement of the present invention, the signal distribution circuit further includes a first HDCP module, a second HDCP module, and a third HDCP module, where the first HDCP module is connected to the front end module, the second HDCP module is connected to the first DP transmitter, the third HDCP module is connected to the second DP transmitter, the first HDCP module is configured to decrypt a DP signal input to the front end module, and the second HDCP module and the third HDCP module encrypt data transmitted by the first DP transmitter and the second DP transmitter before outputting the data.
As a further improvement of the present invention, the signal distribution circuit further includes an OCM module, wherein the OCM module is connected to the DP receiver and clone module, and the transmitter module, respectively.
As a further improvement of the invention, the DP signal input circuit, the first DP signal output circuit and the second DP signal output circuit are all connected with DP terminals, the surfaces of the DP terminals are provided with gold plating layers, the thickness of the gold plating layers is larger than 10 mu, and an AUX+ pin and an AUX-pin of the DP signal input circuit are connected with a homodromous buffer.
The invention also provides a DP signal distribution method, which is characterized by comprising the following steps:
s1, inputting a DP input signal into a signal distribution circuit through a DP signal input circuit;
s2, signal distribution, namely cloning a DP input signal into two identical DP output signals through a signal distribution circuit;
s3, outputting signals, namely outputting two identical DP output signals to downstream equipment through a first DP signal output circuit and a second DP signal output circuit respectively.
As a further improvement of the present invention, step S2 includes: the front-end module is used for carrying out data recovery on the input video and audio signals, the DP receiver and the cloning module are used for converting the data packet into a video raster data stream and an audio sample for cloning, and the two cloned data streams and the audio sample are encoded into two DP single signal data packets which are respectively sent to the first DP transmitter and the second DP transmitter; the step S3 comprises the following steps: the first and second DP transmitters use DP single signal packets for serialization and output.
As a further improvement of the invention, the DP signals input into the front-end module are decrypted through the first HDCP module, the data transmitted by the first DP transmitter and the second DP transmitter are encrypted before being output through the second HDCP module and the third HDCP module respectively, the DP receiver and the cloning module, the first DP transmitter and the second DP transmitter are initialized through the OCM module, and firmware driving programs are provided for the DP receiver and the cloning module, the first DP transmitter and the second DP transmitter through the OCM module.
When the input end and the output end of the DP signal distributor are respectively connected with a DP signal source and a DP downstream device, the first DP transmitter firstly completes handshake with the DP downstream device by reading the EDID of the downstream DP downstream device and performing link training, then copies the generated DPCD information and sends the DPCD information to the second DP transmitter so as to make the DPCD information of the first DP transmitter and the DPCD information of the second DP transmitter consistent, thereby enabling the DP receiver and the cloning module to obtain the characteristic information required by the cloning of the DP output signal, and finally sending the same DPCD to the front end module for completing handshake of the input end.
The beneficial effects of the invention are as follows: the DP signal distributor with low cost, stable performance and high bandwidth can convert an input DP high-definition video signal and an input DP audio signal into two paths of consistent and synchronous DP signal output.
Drawings
Fig. 1 is a schematic diagram of a DP signal distributor according to the present invention.
Fig. 2 is a schematic diagram of a DP signal input circuit of a DP signal splitter according to the present invention.
Fig. 3 is a schematic diagram of a DP signal input circuit of a DP signal splitter according to the present invention.
Fig. 4 is a schematic diagram of a signal distribution circuit of a DP signal distributor according to the present invention.
Fig. 5 is a schematic diagram of a first DP signal output circuit of a DP signal divider according to the present invention.
Fig. 6 is a schematic diagram of a first DP signal output circuit of a DP signal divider according to the present invention.
Fig. 7 is a schematic diagram of a second DP signal output circuit of a DP signal splitter according to the present invention.
Fig. 8 is a schematic diagram of a second DP signal output circuit of a DP signal splitter according to the present invention.
Fig. 9 is a schematic diagram of a power module of a DP signal splitter according to the present invention.
Fig. 10 is a functional block diagram of a main chip Splitter4320 of a DP signal Splitter according to the present invention.
Detailed Description
The invention is further described with reference to the following description of the drawings and detailed description.
As shown in fig. 1 to 10, a DP signal splitter includes a DP signal input circuit 1, a signal splitting circuit 2, a first DP signal output circuit 3, a second DP signal output circuit 4, and a power module 5, wherein an output end of the DP signal input circuit 1 is connected to an input end of the signal splitting circuit 2, output ends of the signal splitting circuit 2 are respectively connected to input ends of the first DP signal output circuit 3 and the second DP signal output circuit 4, the power module 5 is respectively connected to the DP signal input circuit 1, the signal splitting circuit 2, the first DP signal output circuit 3, and the second DP signal output circuit 4, and a DP input signal is cloned into two identical DP signals after entering the signal splitting circuit 2 via the DP signal input circuit 1 and is output to a downstream device via the first DP signal output circuit 3 and the second DP signal output circuit 4.
As shown in fig. 1 to 10, the input end of the power module 5 is connected with DC24V for supplying power, the input end of the DP signal input circuit 1 is connected with a DP signal source, and the output ends of the first DP signal output circuit 3 and the second DP signal output circuit 4 are connected with DP downstream devices.
As shown in fig. 1 to 10, the signal distribution circuit 2 includes a main chip Splitter4320, the main chip Splitter4320 includes a front end module 21, a DP receiver and clone module 22, and a transmitter module 23 for recovering data of input video and audio signals, the transmitter module 23 includes a first DP transmitter 24 and a second DP transmitter 26, an output end of the DP signal input circuit 1 is connected to an input end of the front end module 21, an output end of the front end module 21 is connected to an input end of the DP receiver and clone module 22, and an output end of the DP receiver and clone module 22 is connected to the first DP transmitter 24 and the second DP transmitter 25, respectively, and the DP receiver and clone module 22 converts received data packets of the front end module 21 into video raster data streams and audio samples for cloning, and encodes the two cloned data streams and audio samples into two single signal data packets for transmission to the first DP transmitter 24, the second DP transmitter 25 and the DP serializer respectively.
As shown in fig. 1 to 10, the signal distribution circuit 2 further includes a first HDCP module 26, a second HDCP module 27, and a third HDCP module 28, where the first HDCP module 26 is connected to the front end module 21, the second HDCP module 27 is connected to the first DP transmitter 24, the third HDCP module 28 is connected to the second DP transmitter 25, the first HDCP module 26 is configured to decrypt the DP signal input to the front end module 21, and the second HDCP module 27 and the third HDCP module 28 encrypt the data transmitted by the first DP transmitter 24 and the second DP transmitter 25 before outputting.
As shown in fig. 1 to 10, the signal distribution circuit 2 further includes an OCM module 29, wherein the OCM module 29 is connected to the DP receiver and clone module 22 and the transmitter module 23, respectively.
As shown in fig. 1 to 10, the DP signal input circuit 1, the first DP signal output circuit 3 and the second DP signal output circuit 4 are all connected with DP terminals, gold plating layers are provided on the surfaces of the DP terminals, the DP terminals are of standard type and all adopt surface gold plating processes, and the thickness of the gold plating layers is greater than 10 μ.
As shown in fig. 1 to 10, the "aux+" pin and the "AUX-" pin of the DP signal input circuit are connected with a same-direction buffer.
Referring to fig. 2 and 3, DP signals are input through DP terminal CN1, d0+, d0-, d1+, D1-, d2+, D2-, d3+ and D3-are four unidirectional main channels for DP audio and video signal data transmission, which are ac-coupled with main chip Splitter4320 through blocking capacitors C3-C10, and audio and video data are transmitted in the form of double-ended differential signals. Ax+ and AX-are a set of auxiliary channels that are ac-coupled with the main chip via C1 and C2, mainly for link management and device control, e.g. link training and exchange of DPCD information in ROM space. The ax+ and AX-of the DP signal input circuit 1 are also used for detecting whether the divider is connected with the DP transmission line, when the transmission line is connected, ax+ is pulled high, AX-is pulled low, the homodromous buffers U23 and U24 are used for omitting the interference, when the potential is higher than +2.3v, the buffer outputs a high level, the buffer outputs a low level below +0.9v, and the intermediate value is omitted. The HPD output signal of the DP signal input circuit is mainly used as a DP transmission line plug mark and an interrupt request signal sent to Source terminal equipment. D16, D17 and D18 are used to prevent the device from being damaged by transient large voltages that may be generated by AX-, ax+ and HPD when the transmission line is plugged in and out. The DP signal input end ESD protection adopts RClamp0524P to protect four groups of input data differential pairs, 1 group of auxiliary channel differential pairs and HPD in the DP signal input circuit 1, and can bear + -8 KV instant voltage, so that enough safety margin is ensured.
Referring to fig. 4, the signal distribution circuit 2 uses a Splitter4320 as a functional core, and the whole circuit is built around a main chip. In the figure, Y2 is a 27MHz crystal oscillator, which provides an initial clock signal for a main chip through N7 and N8 pins. The pins J1, K2, H3, J3, F2 and H4 are the configuration pins of the starting item of the main chip, the configuration of external crystal oscillator enabling and the configuration of using external ROM by OCM during starting are mainly completed, H4 and J3 are pulled up by a 3.3V power supply through resistors R68 and R77 of 4.7K, and F2, H3 and K2 are pulled down to ground through resistors R69, R70 and R76. U27 is an external Flash ROM memory PM25LD020 that mainly stores firmware programs of each module of the main chip, etc., and the main chip executes the code in U27 through the SPI interface in its OCM at the time of power-on reset. U17 and U21 are the 5V of the UART burns the port of the master chip and changes 3.3V level shifter, its conversion speed can reach 210Mbps, burn the data signal and burn into the master chip through J2, H4 pin after changing into 3.3V logic high level form from 5V logic high level form, then keep in U27 (outside Flash ROM memory PM25LD 020) through the internal SPI interface of the chip, D23 and D24 are used for preventing the instantaneous high-pressure that UART interface produces from damaging the level shifter when on-off. The DP audio and video signals input through the DP signal input circuit 1 are sequentially subjected to data recovery, HDCP decryption, video raster and audio sample format conversion, data cloning and HDCP encryption by the Splitter4320, and then transmitted to the first DP signal output circuit 3 and the second DP signal output circuit 4, and then output to the Sink-end DP device for use.
Referring to fig. 5 to 8, fig. 5 to 8 are schematic diagrams of the first DP signal output circuit 3 and the second DP signal output circuit 4, respectively, and the two circuit principles are the same. Taking the DP signal output circuit 1 as an example, in the drawing, d0+, D0-, d1+, D1-, d2+, D2-, d3+, D3-, ax+ and AX-of CN4 are all ac-coupled with Sink-end DP devices through 0.1 μf capacitors, and U12 provides +5v power supply D7, D12, D13 and D19 for downstream DP devices through the PWR pin of the DP terminal, so as to prevent the main chip from being damaged by the instantaneous high voltage that may be generated when the transmission line is plugged or unplugged. The first DP signal output circuit 3 and the second DP signal output circuit 4 also use RClamp0524P for ESD protection.
Referring to fig. 9, fig. 9 is a schematic diagram of a power module of a DP signal splitter according to the present invention. The invention adopts power chips of '2679S' (U31) and '1S 10P' (U28) to carry out +24V to +5V and +5V to +1.2V power conversion respectively. In addition, an alternative +5v to +3.3v power supply is provided, which is a DC/DC converter "1S10P" (U29) and an LDO converter "1117" (U30), respectively.
Referring to fig. 10, fig. 10 is a functional block diagram of a main chip Splitter4320 of a DP signal Splitter according to the present invention. Including a front end module 21, a DP receiver and clone module 22 (displayport 1.2 receiver & clone module), an OCM module 29, a first DP transmitter 24 (first displayport1.2 transmitter), a second DP transmitter 25 (second displayport1.2 transmitter), a first HDCP module 26, a second HDCP module 27, and a third HDCP module 28. The output end of the front end module 21 is connected with the input end of the displayport1.2 receiver & clone module, the output end of the displayport1.2 receiver & clone module is connected with the input ends of the first displayport1.2 transmitter and the second displayport1.2 transmitter, the output end of the OCM module 29 is connected with the input ends of the displayport1.2 receiver & clone module and the displayport1.2 transmitter module (the first displayport1.2 transmitter and the second displayport1.2 transmitter), and the first HDCP module 26, the second HDCP module 27 and the third HDCP module 28 are connected with the front end module 21, the first displayport1.2 transmitter and the second displayport1.2 transmitter, respectively. As shown in fig. 10, the DP input signal passes through the DP signal input circuit 1 and then enters the front-end module 21, and the front-end module 21 is used for performing data recovery on the input video and audio signals, and performing 8-10 bit data conversion according to the format of the input signal. The first HDCP module 26 is configured to decrypt the DP signal input to the front-end module 21, the displayport1.2 receiver & clone module converts the received front-end data packet into a video raster data stream and an audio sample for cloning, and encodes the two cloned data streams and the audio sample into two DP single signal data packets, which are sent to the first displayport1.2 transmitter and the second displayport1.2 transmitter for serialization and transmission, and the second HDCP module 27 and the third HDCP module 28 respectively encrypt the data transmitted by the first displayport1.2 transmitter and the second displayport1.2 transmitter before outputting, and the encrypted signals are transmitted to the downstream DP device through the first DP signal output circuit 3 and the second DP signal output circuit 4. The OCM module 29 is used for initialization of the modules and for providing firmware drivers for the displayport1.2 receiver & clone module and the two transmitters, and in addition the OCM module 29 is used for executing application specific code relating to chip configuration.
When the input end and the output end of the DP signal splitter are respectively connected with a DP signal source and a DP downstream device, the first displayport1.2 transmitter firstly completes handshake with the DP downstream device by reading EDID information of the downstream DP downstream device and performing link training, then copies the generated DPCD information and sends the copied DPCD information to the second displayport1.2 transmitter so as to make the DPCD information of the two transmitters consistent, thereby enabling the displayport1.2 receiver and the cloning module to obtain characteristic information required by cloning the DP output signal, finally sending the same DPCD to the front end module 21 for completing handshake of the input end, and after the handshake of the three ends is completed, the DP signal starts normal transmission.
A DP signal allocation method, comprising the steps of:
s1, inputting a DP input signal into a signal distribution circuit 2 through a DP signal input circuit 1;
s2, signal distribution, wherein the DP input signal is cloned into two identical DP output signals through a signal distribution circuit 2;
and S3, outputting signals, namely outputting two identical DP output signals to downstream equipment through the first DP signal output circuit 3 and the second DP signal output circuit 4 respectively.
The step S2 comprises the following steps: the front-end module 21 restores the data of the input video and audio signals, the DP receiver and cloning module 22 converts the data packets into video raster data streams and audio samples for cloning, and the cloned two groups of data streams and audio samples are encoded into two DP single-signal data packets which are respectively sent to the first DP transmitter 24 and the second DP transmitter 25; the step S3 comprises the following steps: the first and second DP transmitters 24, 25 use DP single signal packets for serialization and output.
The DP signal input to the front-end module 21 is decrypted by the first HDCP module 26, the data transmitted by the first DP transmitter 24 and the second DP transmitter 25 are encrypted before being output by the second HDCP module 27 and the third HDCP module 28, the DP receiver and the cloning module 22, the first DP transmitter 24 and the second DP transmitter 25 are initialized by the OCM module 29, and firmware drivers are provided for the DP receiver and the cloning module 22, the first DP transmitter 24 and the second DP transmitter 25 by the OCM module 29.
When the input and output ends of the DP signal splitter are respectively connected to the DP signal source and the DP downstream device, the first DP transmitter 24 firstly completes handshake with the DP downstream device by reading the EDID of the downstream DP downstream device and performing link training, and then copies the generated DPCD information and sends the copied DPCD information to the second DP transmitter 25 so as to make the DPCD information of the first DP transmitter 24 and the DPCD information of the second DP transmitter 25 consistent, thereby enabling the DP receiver and the cloning module 22 to obtain the characteristic information required for cloning the DP output signal, and finally sending the same DPCD to the front end module 21 for completing handshake of the input end.
According to the DP signal distributor and the DP signal distribution method provided by the invention, a DP signal is input from the DP signal input circuit 1, and is transmitted to the first DP signal output circuit 3 and the second DP signal output circuit 4 after data recovery, HDCP decryption, video raster and audio sample format conversion, data cloning and HDCP encryption are carried out by the signal distribution circuit 2, and then the DP signal is output to Sink-end DP equipment for use.
The DP signal distributor and the DP signal distribution method provided by the invention can convert the input DP high-definition video signals and audio signals into two paths of consistent and synchronous DP signals for output, and have the advantages of low cost, stable performance and high bandwidth.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (2)
1. A DP signal allocation method, characterized in that: the power supply module is respectively connected with the DP signal input circuit, the signal distribution circuit, the first DP signal output circuit and the second DP signal output circuit, and DP input signals are cloned into two identical DP signals after entering the signal distribution circuit through the DP signal input circuit and are output to downstream equipment through the first DP signal output circuit and the second DP signal output circuit;
the input end of the power supply module is connected with DC24V power supply, the input end of the DP signal input circuit is connected with a DP signal source, and the output ends of the first DP signal output circuit and the second DP signal output circuit are connected with DP downstream equipment;
the signal distribution circuit comprises a front-end module, a DP receiver, a cloning module and a transmitter module, wherein the front-end module is used for carrying out data recovery on input video and audio signals, the transmitter module comprises a first DP transmitter and a second DP transmitter, the output end of the DP signal input circuit is connected with the input end of the front-end module, the output end of the front-end module is connected with the input ends of the DP receiver and the cloning module, the output ends of the DP receiver and the cloning module are respectively connected with the first DP transmitter and the second DP transmitter, and the DP receiver and the cloning module are used for converting received data packets of the front-end module into video raster data streams and audio samples and cloning the video raster data streams and the audio samples, encoding the two groups of data streams and the audio samples after cloning into two DP single-signal data packets and respectively sending the two DP single-signal data packets to the first DP transmitter and the second DP transmitter for serialization and transmission;
the signal distribution circuit further comprises a first HDCP module, a second HDCP module and a third HDCP module, wherein the first HDCP module is connected with the front end module, the second HDCP module is connected with the first DP transmitter, the third HDCP module is connected with the second DP transmitter, the first HDCP module is used for decrypting DP signals input into the front end module, and the second and third HDCP modules encrypt data transmitted by the first and second DP transmitters before outputting the data;
the signal distribution circuit further comprises an OCM module, wherein the OCM module is respectively connected with the DP receiver, the cloning module and the transmitter module;
the DP signal input circuit, the first DP signal output circuit and the second DP signal output circuit are all connected with DP terminals, the surfaces of the DP terminals are provided with gold plating layers, the thickness of the gold plating layers is larger than 10 mu, and an AUX+ pin and an AUX-pin of the DP signal input circuit are connected with a homodromous buffer;
the following steps are performed based on the DP signal distributor:
s1, inputting a DP input signal into a signal distribution circuit through a DP signal input circuit;
s2, signal distribution, namely cloning a DP input signal into two identical DP output signals through a signal distribution circuit;
s3, outputting signals, namely outputting two identical DP output signals to downstream equipment through a first DP signal output circuit and a second DP signal output circuit respectively;
the step S2 comprises the following steps: the front-end module is used for carrying out data recovery on the input video and audio signals, the DP receiver and the cloning module are used for converting the data packet into a video raster data stream and an audio sample for cloning, and the two cloned data streams and the audio sample are encoded into two DP single signal data packets which are respectively sent to the first DP transmitter and the second DP transmitter; the step S3 comprises the following steps: the first DP transmitter and the second DP transmitter use the DP single signal data packet for serialization and output;
the DP signals input into the front-end module are decrypted through the first HDCP module, the data transmitted by the first DP transmitter and the second DP transmitter are encrypted before being output through the second HDCP module and the third HDCP module, the DP receiver and the cloning module, the first DP transmitter and the second DP transmitter are initialized through the OCM module, and firmware driving programs are provided for the DP receiver and the cloning module, the first DP transmitter and the second DP transmitter through the OCM module.
2. The DP signal distribution method according to claim 1, wherein: when the input end and the output end of the DP signal distributor are respectively connected with a DP signal source and a DP downstream device, the first DP transmitter firstly completes handshake with the DP downstream device by reading the EDID of the DP downstream device and performing link training, then copies the generated DPCD information and sends the DPCD information to the second DP transmitter so as to enable the DPCD information of the first DP transmitter and the DPCD information of the second DP transmitter to be consistent, thereby enabling the DP receiver and the cloning module to obtain the characteristic information required by the DP output signal cloning, and finally sending the same DPCD to the front end module for completing handshake of the input end.
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| CN109547712A (en) * | 2019-01-18 | 2019-03-29 | 深圳市巨潮科技股份有限公司 | DP signal distribution system based on FPGA |
| CN111669533B (en) * | 2020-06-04 | 2022-03-29 | 北京隆鑫泰业科技有限公司 | Signal distribution equipment |
| CN111525953A (en) * | 2020-06-16 | 2020-08-11 | 深圳市巨潮科技股份有限公司 | AUX communication detection and analysis device |
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