CN109547712A - DP signal distribution system based on FPGA - Google Patents
DP signal distribution system based on FPGA Download PDFInfo
- Publication number
- CN109547712A CN109547712A CN201910048824.9A CN201910048824A CN109547712A CN 109547712 A CN109547712 A CN 109547712A CN 201910048824 A CN201910048824 A CN 201910048824A CN 109547712 A CN109547712 A CN 109547712A
- Authority
- CN
- China
- Prior art keywords
- module
- signal
- fpga
- connect
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 47
- 239000003990 capacitor Substances 0.000 claims description 23
- 230000005611 electricity Effects 0.000 claims description 2
- 230000008054 signal transmission Effects 0.000 abstract description 6
- 238000011144 upstream manufacturing Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 12
- 238000000034 method Methods 0.000 description 6
- 238000012544 monitoring process Methods 0.000 description 4
- 238000001914 filtration Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 101000805129 Homo sapiens Protein DPCD Proteins 0.000 description 1
- 102100037836 Protein DPCD Human genes 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 238000009414 blockwork Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000009790 rate-determining step (RDS) Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000012549 training Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Logic Circuits (AREA)
Abstract
The invention discloses a kind of DP signal distribution system based on FPGA, including DP signal input module, DP signal conversion module, FPGA module, the power module being connect with FPGA module, the second conversion module being connect with FPGA module, the DP signal output module being connect with the second conversion module, the control module being connect with FPGA module and the terminal being connect with control module, the output end of DP signal input module is connect with the input terminal of DP signal conversion module and control module simultaneously, and the output end of DP signal conversion module and the input terminal of FPGA module connect.Solve it is existing in the prior art, most of DP signal distribution system stable signal transmissions it is low caused by upstream device show unstable technical problem.
Description
Technical field
The invention belongs to technical field of optical fiber communication more particularly to a kind of DP signal distribution systems based on FPGA.
Background technique
Currently, signal transmission application in more and more equipment, under its special use environment, there is signal transmission
The requirement of higher standard includes ultra high-definition, at a distance, multiple terminals is shown etc., especially medical industry.Meanwhile new neck
Domain, new technology expedite the emergence of out more industry requirements, and similar two or four display terminals of this demand of newest CT synchronize aobvious
The case shown emerges one after another, and for the high-performance and high reliability request of industrial circle, but rarely has product can satisfy, and passes
The DP signal distributor of system is difficult to meet the application scenarios of this harshness.
Existing most of DP distributor, such as number of patent application are CN201721089674, apply for entitled DP letter
Number distributor only supports the output of two-way DP, is unable to satisfy the DP output demand of two-way or more, and requires environment in technical grade
Under, existing scheme will appear the case where can not identifying display to cause display not show image generation.
Therefore, the prior art is to be improved.
Summary of the invention
It is a primary object of the present invention to propose a kind of DP signal distribution system based on FPGA, it is intended to solve background technique
Mentioned in the technical issues of.
DP signal distribution system based on FPGA of the invention, including DP signal input module, DP signal conversion module,
FPGA module, the power module being connect with FPGA module, the second conversion module being connect with FPGA module and the second conversion module
The DP signal output module of connection, the control module connecting with FPGA module and the terminal connecting with control module, DP signal are defeated
Enter the output end of module while being connect with the input terminal of DP signal conversion module and control module, the output of DP signal conversion module
End is connect with the input terminal of FPGA module.
Preferably, DP signal conversion module includes third chip, and the third pin of third chip, four-limbed, the 5th insert
Foot and the 6th pin are connect with DP signal input module, the 51st pin of third chip simultaneously with the 92nd resistance one
End is connected with control module, and the 52nd pin of third chip connects with the 120th resistance one end and control module simultaneously
It connects.
Preferably, control module includes fourth chip and the first socket, and the 18th pin of fourth chip and the 19th are inserted
Foot is connect with first by socket, and the 32nd pin of fourth chip and the 33rd pin connect with DP signal conversion module
It connects.
Preferably, sink equipment includes display screen.
Preferably, power module includes the 9th chip, the 47th resistance, the 80th capacitor, the 81st capacitor and the
Three inductance coils, the 6th pin of the 9th chip first are inserted with feeder ear, the 47th resistance one end, the 9th chip simultaneously
Foot, the 81st capacitor one end are connected with the 80th capacitor one end, the 5th pin of the 9th chip simultaneously with four-limbed, the 8th
Pin, the 9th pin, the 49th resistance one end, the 81st capacitor other end, the 80th capacitor other end are connected with ground, the
The 49 resistance other ends are connect with the third pin of the 9th chip and the 50th resistance one end simultaneously, the 50th resistance other end
Connect with the 48th resistance one end, the 48th resistance other end simultaneously with third inductance coil one end, the 82nd capacitor
One end, the 83rd capacitor one end, the 5th diode one end are connected with FPGA module.
DP signal distribution system based on FPGA of the invention, has the advantages that
1, it is arranged based on terminal, control module, control module has been able to recognise whether that DP signal is input to the conversion of DP signal
Module, and control DP signal conversion module and convert DP signal to LVDS signal, terminal is able to monitoring control module, sink equipment
State guarantee stable signal transmission so that all processes are all fully transparent and controllable, avoid the occurrence of sink equipment without
The problem of method is shown.
2, it is arranged based on FPGA module, can at least exports two-way LVDS signal, i.e., at least convert the first LVDS signal
At the 2nd LVDS signal and the 3rd LVDS signal, to be adapted in the application scenarios of the above DP signal output of two-way.
Detailed description of the invention
Fig. 1 is that the present invention is based on the functional block diagrams of the DP signal distribution system of FPGA；
Fig. 2 is that the present invention is based on the circuit connection diagrams of DP signal input module in the DP signal distribution system of FPGA；
Fig. 3 is that the present invention is based on input connection protection circuits in the DP signal distribution system of FPGA；
Fig. 4 is that the present invention is based on the circuit connection diagrams of DP signal conversion module in the DP signal distribution system of FPGA；
Fig. 5 is that the present invention is based on the circuit connection diagrams of power module in the DP signal distribution system of FPGA；
Fig. 6 is that the present invention is based on the circuit connection diagrams of power filtering module in the DP signal distribution system of FPGA；
Fig. 7 is that the present invention is based on the circuit connection diagrams of FPGA module in the DP signal distribution system of FPGA；
Fig. 8 is that the present invention is based on the signals that FPGA module in the DP signal distribution system of FPGA exports the 2nd LVDS signal
Figure；
Fig. 9 is that the present invention is based on the signals that FPGA module in the DP signal distribution system of FPGA exports the 3rd LVDS signal
Figure；
Figure 10 is that the present invention is based on the circuit connection diagrams of the second conversion module in the DP signal distribution system of FPGA；
Figure 11 is that the present invention is based on the circuit connection diagrams of DP signal output module in the DP signal distribution system of FPGA；
Figure 12 is that the present invention is based on the circuit connection diagrams of control module in the DP signal distribution system of FPGA.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
It should be noted that relational language such as " first ", " second " can be used for describing various assemblies, but these arts
Language is not intended to limit the component.These terms are only used to distinguish a component and another component.For example, not departing from model of the invention
It encloses, first assembly can be referred to as the second component, and the second component can also similarly be referred to as first assembly.Term " and/
Or " refer to continuous item and describe the combination of any one or more of item.
It is that the present invention is based on the functional block diagrams of the DP signal distribution system of FPGA with reference to Fig. 1, Fig. 1.
A kind of DP signal distribution system based on FPGA, which is characterized in that turn including DP signal input module 10, DP signal
Change the mold block 11, FPGA module 12, the power module 13 connecting with FPGA module 12, the second modulus of conversion connecting with FPGA module 12
Block 21, the DP signal output module 22 being connect with the second conversion module 21, the control module 20 being connect with FPGA module 12 and with
The terminal 30 that control module 20 connects, the output end of DP signal input module 10 while the input terminal with DP signal conversion module 11
It is connected with control module 20, the output end of DP signal conversion module 11 is connect with the input terminal of FPGA module 12.Concrete principle is such as
Under: DP signal enters DP signal conversion module via DP signal input module, and control module DP signal and controls DP for identification
DP signal is converted into the first LVDS signal by signal conversion module, and the first LVDS signal exports the 2nd LVDS letter after FPGA module
Number and the 3rd LVDS signal to the second conversion module, the second conversion module the 2nd LVDS signal received and the 3rd LVDS are believed
Number it is converted into the 2nd DP signal and the 3rd DP signal, to be transmitted to sink equipment through DP signal output module；Sink equipment includes
Display screen, display screen include the first display screen 31 and second display screen 32.DP signal distribution system based on FPGA of the invention,
It has the advantages that 1, be arranged based on control module, control module has been able to recognise whether that DP signal is input to DP signal
Conversion module, and control DP signal conversion module and convert DP signal to LVDS signal, terminal setting, it is able to monitoring control mould
The state of block, sink equipment guarantees stable signal transmission, avoids the occurrence of sink equipment so that all processes are all controllable
The problem of can not being shown.2, wherein, for the connection relationship of control module, FPGA module, DP signal conversion module and
Two conversion modules are connect with control module, are arranged based on FPGA module, can at least be exported two-way LVDS signal, i.e., by first
LVDS signal is at least converted to the 2nd LVDS signal and the 3rd LVDS signal, to be adapted to the application of the above DP signal output of two-way
In scene.3, all link layer data states can be obtained by the communication between terminal and control module in real time, Source and
The state of sink equipment, MCU working condition etc., so that all processes are all fully transparent and can monitor.
It is noted that as shown in fig. 7, FPGA module includes the tenth chip U10, the model of the tenth chip
XC6SLX16CSG324I；Be it is a it is existing with multioutlet chip (its have more than 500 a pins, therefore Fig. 7, Fig. 8,
Chip U10 in Fig. 9 is same), it is arranged based on FPGA module, to realize that the first LVDS signal is converted into two-way is identical
LVDS signal, as shown in figure 8, the 2nd LVDS signal of output；As shown in figure 9, the 3rd LVDS signal of output.And it is based on FPGA module
Using the tenth chip, different from traditional DP distribution system, the present invention is based on FPGA modules can be realized at least two-way LVDS letter
Number output so that it is subsequent can conversion at least two-way DP signal export, it is especially suitable to adapt to the output demand on three tunnels, four tunnels
In medical display screen.
As shown in Figure 4, it is preferable that DP signal conversion module includes third chip U3, the third pin of third chip U3
DPRX_LNO_P, four-limbed DPRX_LNO_N, the 5th pin DPRX_LN1_P and the 6th pin DPRX_LN1_N believe with DP
Number input module 10 connects, the 51st pin CFG_SCL of third chip U3 simultaneously with the 92nd one end resistance R92 and control
Molding block 20 connects, the 52nd pin CFG_SDA of third chip U3 simultaneously with the 120th one end resistance R120 and control
Molding block 20 connects；DP signal is converted into the first LVDS semiotic function to realize.
As shown in figure 12, it is preferable that control module 20 includes the of fourth chip U4 and the first socket J2, fourth chip U4
18 pins and the 19th pin connect with the first socket, the 32nd pin I2CSCL_2/P2.5 and third of fourth chip
13 pin I2CSCL_2/P2.4 are connect with DP signal conversion module 11.To realize following principle: control module can identify
Whether there is DP signal to be input to DP signal conversion module, i.e., by the detection to signal transmission link, controls DP signal modulus of conversion
Block works and obtains the status information of DP signal conversion module and DP signal in real time.
As shown in figure 5, Fig. 5 is that the present invention is based on the circuit connection signals of power module in the DP signal distribution system of FPGA
Figure, it is preferable that the input termination 5V power supply of power module, power module are used to 5V being transformed into 3.3V to export to FPGA mould
Block；It further include the power filtering module being connect with power module, specific connection schematic diagram is as shown in fig. 6, to play filtering function
Can, it improves voltage and converts stability.Specifically: power module includes the 9th chip U9, the 47th resistance R47, the 80th electricity
Hold C80, the 81st capacitor C81 and third inductance coil L3, the 9th chip U9 the 6th pin VIN_SW simultaneously with feeder ear+
5V_DVDD, the 47th resistance one end, the 9th chip the first pin VIN_A, the 81st capacitor one end and the 80th capacitor
One end connection, the 5th pin SYNC of the 9th chip simultaneously with four-limbed AGND, the 8th pin PGND, the 9th pin PAD, the
49 one end resistance R49, the 81st capacitor other end, the 80th capacitor other end are connected with ground, and the 49th resistance is another
One end is connect with the third pin FB of the 9th chip and the 50th one end resistance R50 simultaneously, the 50th resistance other end and the 4th
18 resistance one end connection, the 48th resistance other end simultaneously with third inductance coil one end, the 82nd capacitor C82 mono-
End, the 83rd one end capacitor C83, the 5th one end diode D5 and FPGA module 12 connect；5V voltage is converted into realizing
Output is to FPGA module after 3.3V, for its work.
Wherein, the second conversion module includes the 11st chip U11, and specific connection is as shown in Figure 10, to realize FPGA
Module 12 issues the 2nd LVDS signal to come and the 3rd LVDS signal is converted into the 2nd DP signal and the 3rd DP signal.DP signal
The specific connection schematic diagram of output module is as shown in figure 11, and DP signal output module receives the 2nd DP signal there are two being respectively
With the 3rd DP signal, accordingly the 2nd DP signal, the 3rd DP signal are exported to sink equipment by two Second terminal CN4.
DP signal distribution system based on FPGA of the invention, sets out in those skilled in the art's angle, is seeing its institute
Disclosed Figure of description should belong to the protection scope of the present embodiment, and whole electronic component models can check in the accompanying drawings
It arrives, for the pin on chip, also referred to as pin.
DP signal distribution system based on FPGA of the invention, rate-determining steps include that 1. control modules have monitored whether
The input of DP signal continues waiting for the input of signal if inputted without signal；If there is input, carry out in next step；2. control
Module detects rear end HPD signal, determines whether there is the access of sink equipment, if so, display relevant information is then read,
And DPCD relevant information, and the correctness of data is verified.Then according to the parameter initialization input module read
With output module and conversion module, rear module is accessed into equipment in next step, is otherwise continued waiting for.3. initialization input mould
After block, input module handles DP signal, and DP signal is converted to LVDS signal, LVDS signal is then transferred to conversion
LVDS signal is changed into the signal that multichannel replicates completely all the way and is output to output module by module, conversion module, and entrance is next
Step；4. after output module detects the LVDS signal from conversion module output, carrying out sampling processing judgement to LVDS signal, such as
Fruit signal is problematic then to carry out configuration change to corresponding module, re-starts signal conversion, otherwise exports signal to connection
Sink equipment；5. signal output after the signal of input is monitored in real time, in case of change, need to re-start turn
It changes, complete corresponding configuration and completes the re-training to rear end connection equipment；6. persistently whether monitoring rear end equipment is sent out
Raw to change, by the monitoring to rear end equipment HPD signal, judgement is Long HPD or Short HPD, then obtains Link
State, and be arranged accordingly.
The above is only a preferred embodiment of the present invention, is not intended to limit the scope of the invention, all to utilize this hair
Equivalent structure or equivalent flow shift made by bright specification and accompanying drawing content is applied directly or indirectly in other relevant skills
Art field, is included within the scope of the present invention.
Claims (6)
1. a kind of DP signal distribution system based on FPGA, which is characterized in that including DP signal input module, DP signal modulus of conversion
Block, FPGA module, the power module being connect with FPGA module, the second conversion module being connect with FPGA module and the second conversion
DP signal output module, the control module being connect with FPGA module and the terminal being connect with control module of module connection, DP letter
The output end of number input module is connect with the input terminal of DP signal conversion module and control module simultaneously, DP signal conversion module
Output end and the input terminal of FPGA module connect.
2. the DP signal distribution system based on FPGA as described in claim 1, which is characterized in that the input of power module terminates 5V
Power supply, power module are used to 5V being transformed into 3.3V to export to FPGA module.
3. the DP signal distribution system based on FPGA as described in claim 1, which is characterized in that DP signal conversion module includes the
Three chips, third pin, four-limbed, the 5th pin and the 6th pin of third chip are connect with DP signal input module,
51st pin of third chip is connect with the 92nd resistance one end and control module simultaneously, and the 52nd of third chip the
Pin is connect with the 120th resistance one end and control module simultaneously.
4. the DP signal distribution system based on FPGA as described in claim 1, which is characterized in that control module includes fourth chip
With the first socket, the 18th pin of fourth chip and the 19th pin are connect with the first socket, and the 30th of fourth chip the
Two pins and the 33rd pin are connect with DP signal conversion module.
5. the DP signal distribution system based on FPGA as described in claim 1, which is characterized in that sink equipment includes display screen.
6. the DP signal distribution system based on FPGA as described in claim 1, which is characterized in that power module includes the 9th core
Piece, the 47th resistance, the 80th capacitor, the 81st capacitor and third inductance coil, the 6th pin of the 9th chip is simultaneously
With feeder ear, the 47th resistance one end, the first pin of the 9th chip, the 81st capacitor one end and the 80th capacitor one end
Connection, the 5th pin of the 9th chip simultaneously with four-limbed, the 8th pin, the 9th pin, the 49th resistance one end, the 8th
The 11 capacitor other ends, the 80th capacitor other end are connected with ground, the 49th resistance other end simultaneously with the 9th chip the
Three pins and the connection of the 50th resistance one end, the 50th resistance other end are connect with the 48th resistance one end, the 48th electricity
Hinder the other end simultaneously with third inductance coil one end, the 82nd capacitor one end, the 83rd capacitor one end, the 5th diode one
End is connected with FPGA module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910048824.9A CN109547712A (en) | 2019-01-18 | 2019-01-18 | DP signal distribution system based on FPGA |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910048824.9A CN109547712A (en) | 2019-01-18 | 2019-01-18 | DP signal distribution system based on FPGA |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109547712A true CN109547712A (en) | 2019-03-29 |
Family
ID=65835784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910048824.9A Pending CN109547712A (en) | 2019-01-18 | 2019-01-18 | DP signal distribution system based on FPGA |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109547712A (en) |
Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060071821A1 (en) * | 2004-09-22 | 2006-04-06 | Masaharu Kimura | Method for verifying a circuit function |
| CN102446477A (en) * | 2011-12-30 | 2012-05-09 | 武汉精测电子技术有限公司 | Liquid crystal module test device with display port (DP) interface and test method thereof |
| KR101541771B1 (en) * | 2014-09-18 | 2015-08-06 | (주)앱스톤 | Displayport FPGA module of display test equipment |
| CN105141877A (en) * | 2015-09-29 | 2015-12-09 | 武汉精测电子技术股份有限公司 | Programmable device-based signal conversion equipment |
| CN105376512A (en) * | 2015-11-18 | 2016-03-02 | 武汉精测电子技术股份有限公司 | Signal conversion device based on programmable logic device |
| CN205092934U (en) * | 2015-09-25 | 2016-03-16 | 东莞理工学院 | DP data line capability test appearance |
| CN105491318A (en) * | 2015-12-05 | 2016-04-13 | 武汉精测电子技术股份有限公司 | Device and method for single-path to multiple-path conversion of DP video signals |
| CN105812702A (en) * | 2016-03-17 | 2016-07-27 | 武汉精测电子技术股份有限公司 | Device and method for converting DP (Display Port) image signals into LVDS (Low-Voltage Differential Signaling) image signals |
| CN107396003A (en) * | 2017-08-28 | 2017-11-24 | 深圳市巨潮科技股份有限公司 | A kind of DP signal distributors and DP system for delivering |
| CN207234958U (en) * | 2017-08-28 | 2018-04-13 | 深圳市巨潮科技股份有限公司 | A kind of DP signal distributors |
| US20180166889A1 (en) * | 2016-12-14 | 2018-06-14 | Shenzhen Lvsun Electronics Technology Co., Ltd | Conversion device for quick charger and method for realizing charging conversion |
| CN207650596U (en) * | 2017-11-20 | 2018-07-24 | 深圳市智微智能科技开发有限公司 | A kind of standard motherboard double drive screen application circuit |
| CN207995244U (en) * | 2018-03-30 | 2018-10-19 | 沈阳火炬北泰数码科技有限责任公司 | A kind of DisplayPort signal distribution systems with configurable functionality |
| CN208093124U (en) * | 2018-03-03 | 2018-11-13 | 深圳市隆科电子有限公司 | A kind of mobile terminal and its double LVDS panel drive devices |
| CN209120328U (en) * | 2019-01-18 | 2019-07-16 | 深圳市巨潮科技股份有限公司 | DP signal distribution system based on FPGA |
-
2019
- 2019-01-18 CN CN201910048824.9A patent/CN109547712A/en active Pending
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060071821A1 (en) * | 2004-09-22 | 2006-04-06 | Masaharu Kimura | Method for verifying a circuit function |
| CN102446477A (en) * | 2011-12-30 | 2012-05-09 | 武汉精测电子技术有限公司 | Liquid crystal module test device with display port (DP) interface and test method thereof |
| KR101541771B1 (en) * | 2014-09-18 | 2015-08-06 | (주)앱스톤 | Displayport FPGA module of display test equipment |
| CN205092934U (en) * | 2015-09-25 | 2016-03-16 | 东莞理工学院 | DP data line capability test appearance |
| CN105141877A (en) * | 2015-09-29 | 2015-12-09 | 武汉精测电子技术股份有限公司 | Programmable device-based signal conversion equipment |
| CN105376512A (en) * | 2015-11-18 | 2016-03-02 | 武汉精测电子技术股份有限公司 | Signal conversion device based on programmable logic device |
| CN105491318A (en) * | 2015-12-05 | 2016-04-13 | 武汉精测电子技术股份有限公司 | Device and method for single-path to multiple-path conversion of DP video signals |
| CN105812702A (en) * | 2016-03-17 | 2016-07-27 | 武汉精测电子技术股份有限公司 | Device and method for converting DP (Display Port) image signals into LVDS (Low-Voltage Differential Signaling) image signals |
| US20180166889A1 (en) * | 2016-12-14 | 2018-06-14 | Shenzhen Lvsun Electronics Technology Co., Ltd | Conversion device for quick charger and method for realizing charging conversion |
| CN107396003A (en) * | 2017-08-28 | 2017-11-24 | 深圳市巨潮科技股份有限公司 | A kind of DP signal distributors and DP system for delivering |
| CN207234958U (en) * | 2017-08-28 | 2018-04-13 | 深圳市巨潮科技股份有限公司 | A kind of DP signal distributors |
| CN207650596U (en) * | 2017-11-20 | 2018-07-24 | 深圳市智微智能科技开发有限公司 | A kind of standard motherboard double drive screen application circuit |
| CN208093124U (en) * | 2018-03-03 | 2018-11-13 | 深圳市隆科电子有限公司 | A kind of mobile terminal and its double LVDS panel drive devices |
| CN207995244U (en) * | 2018-03-30 | 2018-10-19 | 沈阳火炬北泰数码科技有限责任公司 | A kind of DisplayPort signal distribution systems with configurable functionality |
| CN209120328U (en) * | 2019-01-18 | 2019-07-16 | 深圳市巨潮科技股份有限公司 | DP signal distribution system based on FPGA |
Non-Patent Citations (3)
| Title |
|---|
| 于传;潘世丽;舒永志;: "基于数字电路的Profibus-DP总线光电信号转换模块的设计", 国网技术学院学报, no. 04 * |
| 蒋红阳;: "高速LVDS信号接收及基于FPGA的串并转换的设计", 电子技术与软件工程, no. 23 * |
| 韩朝辉等: "基于FPGA的多速率信号发送器的设计", 计算机测量与控制, 25 February 2016 (2016-02-25) * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105141877B (en) | A kind of chromacoder based on programming device | |
| CN203301625U (en) | HDMI digital video optical fiber transceiver | |
| CN105427772B (en) | The multi-tiled display interface signal generation system and method for shared protocol layer | |
| CN209120328U (en) | DP signal distribution system based on FPGA | |
| CN103745683B (en) | LED display control system based on HDMI | |
| CN204256732U (en) | The high-speed data transmission apparatus of Based PC I-Express interface | |
| CN103376401A (en) | Method and device for automatically detecting 4K2K product main control board | |
| CN208225041U (en) | Bmc module display system | |
| CN109547712A (en) | DP signal distribution system based on FPGA | |
| CN206274660U (en) | A kind of processing system for video | |
| CN105960764B (en) | High-definition video signal optical transmission system, module pin define method and transmission method | |
| CN201758011U (en) | Multi-channel EDID burning system of LCD TV | |
| CN215420522U (en) | Video matrix input board card with network port | |
| CN104065907A (en) | HDMI and MHL input compatible type transfer device and head-mounted display apparatus | |
| CN207319229U (en) | Simple RS232 multifunctional serial port expanding units | |
| CN202488560U (en) | Astronomical camera with guiding signal output function | |
| CN207184718U (en) | A kind of PC high definition video interfaces automatic detection device | |
| CN208522866U (en) | A kind of vehicle-mounted vidicon based on LVDS | |
| CN205788152U (en) | Display adapter | |
| CN206922930U (en) | A kind of video interface device and system | |
| CN206728161U (en) | A kind of flat-panel screens control system | |
| CN100437465C (en) | Video signal processing circuit of notebook computer | |
| CN205847441U (en) | The video of video camera accesses circuit and video monitoring tester | |
| CN205829897U (en) | Support the multi-channel video compression processing module of various video pattern of the input | |
| CN213462036U (en) | Image acquisition unit of host computer in 5T detection station |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 518000 517, building 7, Hengda fashion Huigu building (East District), Fulong Road, Tongsheng community, Dalang street, Longhua District, Shenzhen City, Guangdong Province Applicant after: SHENZHEN BIGTIDE TECHNOLOGY Co.,Ltd. Address before: Building 8, longfu Industrial Zone, 397 Huarong Road, Longhua New District, Shenzhen, Guangdong 518000 Applicant before: SHENZHEN BIGTIDE TECHNOLOGY Co.,Ltd. |
|
| CB02 | Change of applicant information |