CN107240761A - 电子封装件 - Google Patents
电子封装件 Download PDFInfo
- Publication number
- CN107240761A CN107240761A CN201610217126.3A CN201610217126A CN107240761A CN 107240761 A CN107240761 A CN 107240761A CN 201610217126 A CN201610217126 A CN 201610217126A CN 107240761 A CN107240761 A CN 107240761A
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- China
- Prior art keywords
- piece
- bearing part
- electronic
- electronic packing
- bonding wire
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- 238000012856 packing Methods 0.000 claims description 60
- 238000004806 packaging method and process Methods 0.000 abstract description 3
- 125000006850 spacer group Chemical group 0.000 abstract 2
- 238000003466 welding Methods 0.000 abstract 2
- 238000004891 communication Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 7
- 239000000084 colloidal system Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- 230000005611 electricity Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910000859 α-Fe Inorganic materials 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000004100 electronic packaging Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- -1 for example Substances 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
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- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/24—Supports; Mounting means by structural association with other equipment or articles with receiving set
- H01Q1/241—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM
- H01Q1/242—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use
- H01Q1/243—Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use with built-in antennas
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
一种电子封装件,其包括:承载件、设于该承载件上的电子元件以及天线结构,且该天线结构具有多个间隔件与至少一焊线,且该焊线连接于各该间隔件之间,使该承载件的表面上无需增加布设区域,而能达到封装件微小化的需求。
Description
技术领域
本发明有关一种电子封装件,尤指一种具天线结构的电子封装件。
背景技术
随着电子产业的蓬勃发展,目前无线通讯技术已广泛应用于各式各样的消费性电子产品以利接收或发送各种无线讯号。为了满足消费性电子产品的外观设计需求,无线通讯模块的制造与设计为朝轻、薄、短、小的需求作开发,其中,平面天线(Patch Antenna)因具有体积小、重量轻与制造容易等特性而广泛利用在手机(cell phone)、个人数位助理(Personal Digital Assistant,PDA)等电子产品的无线通讯模块中。
图1为悉知无线通讯模块的立体示意图。如图1所示,该无线通讯模块1包括:一封装基板10、多个电子元件11、一天线结构12以及封装胶体13。该封装基板10为电路板并呈矩形状。该电子元件11设于该封装基板10上且电性连接该封装基板10。该天线结构12为平面型且具有一天线本体120与一导电迹线121,该天线本体120藉由该导电迹线121电性连接该电子元件11。该封装胶体13覆盖该电子元件11与该部分导电迹线121。
前述的悉知无线通讯模块1中,由于该天线结构12为平面型,故需于该封装基板10的表面上增加布设区域(未形成封装胶体13的区域)以形成该导电迹线121,致使该封装基板10的宽度难以缩减,因而难以缩小该无线通讯模块1的宽度,而使该无线通讯模块1无法达到微小化的需求。
因此,如何克服上述悉知技术的问题,实已成目前亟欲解决的课题。
发明内容
鉴于上述悉知技术的种种缺失,本发明披露一种电子封装件,以达到封装件微小化的需求。
本发明的电子封装件包括:一承载件;至少一电子元件,其设于该承载件上;以及至少一天线结构,其设于该承载件上并具有多个间隔件与至少一焊线,且该焊线连接任二相邻的该间隔件。
前述的电子封装件中,该间隔件藉由另一焊线电性连接该电子元件。
本发明还披露一种电子封装件,包括:一承载件;至少一电子元件,其设于该承载件上;以及至少一天线结构,其设于该承载件上并具有至少一间隔件与至少一焊线,且该焊线连接该电子元件与该间隔件。
前述的两种电子封装件中,该电子元件电性连接该承载件。
前述的两种电子封装件中,该间隔件具有至少一电性接触垫,以令该焊线连结该电性接触垫。
前述的两种电子封装件中,该间隔件接置于该承载件上。
前述的两种电子封装件中,该间隔件中具有至少一电性连接该承载件的导电柱。
前述的两种电子封装件中,该间隔件藉由另一焊线电性连接该承载件。
前述的两种电子封装件中,该承载件上设有被动元件。例如,该被动元件藉由另一焊线电性连接该间隔件或电子元件。
前述的两种电子封装件中,该间隔件接置于该电子元件上。
前述的两种电子封装件中,还包括形成于该承载件上并覆盖该电子元件与该天线结构的封装层。例如,该封装层完全覆盖该天线结构、或者该间隔件外露于该封装层。
由上可知,本发明的电子封装件中,藉由打线方式将该焊线形成于该承载件上方,使该天线结构呈立体式天线,因而无需于该承载件的设置表面上增加布设区域的面积,故相较于悉知技术,本发明的承载件的宽度较短,因而能缩小该电子封装件的宽度,致使该电子封装件达到微小化的需求。
附图说明
图1为悉知无线通讯模块的立体示意图;
图2A为本发明的电子封装件的第一实施例的剖面示意图;
图2A’为图2A的另一实施例的剖面示意图;
图2A”为图2A的另一实施例的立体图
图2B为图2A(省略封装层)的局部立体图;
图2B’及图2B”为图2B的其它不同实施例的局部立体图;
图3A为本发明的电子封装件的第二实施例的剖面示意图;
图3A’及图3A”为图3A的其它不同实施例的剖面示意图;
图3B为图3A(省略封装层)的局部立体图;
图4A为本发明的电子封装件的第三实施例的剖面示意图;
图4A’为图4A的另一实施例的剖面示意图;
图4B为图4A(省略封装层)的局部立体图;
图4B’为图4A’(省略封装层)的局部立体图;以及
图5A及图5B为本发明的电子封装件的第四实施例的剖面示意图。
符号说明
1 无线通讯模块 10 封装基板
11,21,21’,41 电子元件 12,22,22’,32,42,52 天线结构
120 天线本体 121 导电迹线
13 封装胶体
2,2’,2”,3,3’,3”,4,4’,5,5’ 电子封装件
20 承载件 200 线路层
210 导线 210’ 导电凸块
220,220’,220”,420 间隔件
220a 电性接触垫 221,222,322 焊线
222’ 导电柱 23 封装层
23a 第一表面 23b 第二表面
23c 侧面 30 被动元件。
具体实施方式
以下藉由特定的具体实施例说明本发明的实施方式,熟悉此技艺的人士可由本说明书所揭示的内容轻易地了解本发明的其他优点及功效。
须知,本说明书所附附图所绘示的结构、比例、大小等,均仅用以配合说明书所揭示的内容,以供熟悉此技艺的人士的了解与阅读,并非用以限定本发明可实施的限定条件,故不具技术上的实质意义,任何结构的修饰、比例关系的改变或大小的调整,在不影响本发明所能产生的功效及所能达成的目的下,均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时,本说明书中所引用的如“上”、“第一”、“第二”、及“一”等的用语,也仅为便于叙述的明了,而非用以限定本发明可实施的范围,其相对关系的改变或调整,在无实质变更技术内容下,当也视为本发明可实施的范畴。
图2A、图2A’、图2A”、图2B、图2B’及图2B”为本发明的电子封装件2,2’,2”的第一实施例的示意图。
如图2A、图2A’、图2A”、图2B、图2B’及图2B”所示,所述的电子封装件2,2’,2”至少由一承载件20、设于该承载件20上的至少一电子元件21,21’以及设于该承载件20上的至少一天线结构22,22’所构成。
于本实施例中,该电子封装件2,2’,2”为***级封装(System in package,简称SiP)的无线通讯模块。
所述的承载件20为电路板或陶瓷板,且该承载件20具有线路层(图略)。应可理解地,有关承载件的种类繁多,并不限于图示者。
所述的电子元件21,21’为主动元件、被动元件、封装元件或其三者的组合,其中,该主动元件为例如半导体芯片,该被动元件为例如电阻、电容及电感,该封装元件包含芯片及包覆该芯片的封装胶体。
于本实施例中,该电子元件21,21’为主动元件。具体地,如图2A及图2B所示,该电子元件21藉由多个导线210以打线方式电性连接该承载件20的线路层;或者,如图2A’所示,该电子元件21’藉由多个导电凸块210’以覆晶方式电性连接该承载件20的线路层。
所述的天线结构22,22’具有多个设于该承载件20上的间隔件220,220’与至少一焊线221,且该焊线221透过打线方式连接于各该间隔件220,220’之间。
于本实施例中,该间隔件220,220’可为具有至少一电性接触垫220a(如图2B、图2B’及图2B”所示)的元件,例如,芯片、承载件、陶瓷板、铁素体(ferrite)、封装元件、电子组件、中介板(interposer)或其它电子构件等,以令该焊线221连接该些间隔件220,220’的电性接触垫220a。
此外,如图2A及图2B所示,该间隔件220于其电性接触垫220a上藉由至少一焊线222以打线方式电性连接该电子元件21。或者,如图2A’所示,至少一该间隔件220’中具有至少一贯穿的导电柱222’,且该导电柱222’的上、下两端分别电性连接该焊线221与该承载件20。
又,如图2B及图2B’所示,该些焊线221,222及电性接触垫200a的布设可依需求调整,且如图2B”所示,该间隔件220,220’,220”的数量也可依需求调整。
另外,所述的电子封装件2,2’,2”可选择性包括一封装层23,如图2A、图2A’及图2A”所示。所述的封装层23形成于该承载件20上并覆盖该电子元件21,21’与该天线结构22,22’,且其具有相对的第一表面23a与第二表面23b,使该封装层23以其第一表面23a结合该承载件20。
于本实施例中,形成该封装层23的材质为绝缘材,例如,聚酰亚胺(polyimide,简称PI)、干膜(dry film)、环氧树脂(expoxy)或封装胶体(molding compound)。
再者,该封装层23可完全覆盖该天线结构22,22’;或者,如图2A”所示的电子封装件2”,该间隔件220也可选择外露于该封装层23的侧面23c,其中,该侧面23c邻接该第一表面23a与第二表面23b。
图3A、图3A’、图3A”及图3B为本发明的电子封装件3,3’,3”的第二实施例的示意图。本实施例与第一实施例的主要差异在于增设至少一被动元件30,故以下仅说明相异处,而不再赘述相同处。
如图3A、图3A’、图3A”及图3B所示,于该承载件20上设有至少一被动元件30。
于一实施例中,如图3A及图3B所示,该电子元件21藉由至少一导线210以打线方式电性连接该承载件20的线路层200,且该天线结构22’的至少一该间隔件220’的导电柱222’藉由该承载件20的线路层200电性连接该被动元件30。
于一实施例中,如图3A’所示,该电子元件21藉由至少一导线210以打线方式电性连接该承载件20的线路层200,且该天线结构32的至少一间隔件220藉由焊线322以打线方式电性连接该承载件20的线路层200,而该被动元件30电性连接该承载件20的线路层200。
于一实施例中,如图3A”所示,该电子元件21藉由至少一导线210以打线方式电性连接该被动元件30,且该天线结构32的至少一间隔件220藉由焊线322以打线方式电性连接该被动元件30,而该被动元件30电性连接该承载件20的线路层200。
图4A、图4A’、图4B及图4B’为本发明的电子封装件4,4’的第三实施例的示意图。本实施例与上述实施例的差异在于间隔件420的位置,故以下仅说明相异处,而不再赘述相同处。
如图4A、图4A’、图4B及图4B’所示,该间隔件420设于该电子元件21’,41上。
于一实施例中,如图4A及图4B所示,该电子封装件4包括多个电子元件21,21’,且该天线结构42的其中一间隔件420设于其中一电子元件21’上。
于一实施例中,如图4A’及图4B’所示,该电子封装件4’包括多个电子元件41,21’与被动元件30,其中一电子元件41为封装元件,且该天线结构42的各该间隔件420分别设于各该电子元件41,21’上,而各该间隔件420与该电子元件41以打线方式(藉由该焊线322与该导线210)电性连接该承载件20的线路层200与被动元件30。
图5A及图5B为本发明的电子封装件的第四实施例的剖面示意图。本实施例与第一实施例的差异在于焊线的布设,故以下仅说明相异处,而不再赘述相同处。
如图5A所示,该电子封装件5的天线结构52包括至少一间隔件220与至少一焊线222,且该间隔件220藉由至少一焊线222以打线方式电性连接该电子元件21,故各该间隔件220之间没有以打线方式互相电性连接。应可理解地,如图5B所示,该电子封装件5’的间隔件220可设于该电子元件21上。
另一方面,应可理解地,于其它实施例中,该电子封装件可包括多个个天线结构。
综上所述,本发明的电子封装件2,2’,2”,3,3’,3”,4,4’,5,5’中,利用打线方式形成该焊线221,222,322,以取代悉知导电迹线,以于制程中,该天线结构22,22’,32,42,52能与该些电子元件21,21’,41整合制作,也就是一同进行封装,使该封装层23能覆盖该些电子元件21,21’,41与该天线结构22,22’,32,42,52,故封装制程用的模具能对应该承载件20的尺寸,因而有利于封装制程。
此外,该焊线221,222,322设于该承载件20上方而使该天线结构22,22’,32,42,52呈立体式天线,因而可将该天线结构22,22’,32,42,52布设于与该些电子元件21,21’的相同的区域(即形成封装层23的区域),而无需于该承载件20的表面上增加布设区域,故相较于悉知技术,本发明的承载件20的宽度较短,因而能缩小该电子封装件2,2’,2”,3,3’,3”,4,4’,5,5’的宽度,致使该电子封装件2,2’,2”,3,3’,3”,4,4’,5,5’达到微小化的需求。
上述实施例仅用以例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟习此项技艺的人士均可在不违背本发明的精神及范畴下,对上述实施例进行修改。因此本发明的权利保护范围,应如权利要求书所列。
Claims (15)
1.一种电子封装件,其特征为,该电子封装件包括:
一承载件;
至少一电子元件,其设于该承载件上;以及
至少一天线结构,其设于该承载件上并具有多个间隔件与至少一焊线,且该焊线连接任二相邻的该间隔件。
2.一种电子封装件,其特征为,包括:
一承载件;
至少一电子元件,其设于该承载件上;以及
至少一天线结构,其设于该承载件上并具有至少一间隔件与至少一焊线,且该焊线连接该电子元件与该间隔件。
3.如权利要求1或2所述的电子封装件,其特征为,该电子元件电性连接该承载件。
4.如权利要求1或2所述的电子封装件,其特征为,该间隔件具有至少一电性接触垫,以令该焊线连结该电性接触垫。
5.如权利要求1或2所述的电子封装件,其特征为,该间隔件接置于该承载件上。
6.如权利要求1所述的电子封装件,其特征为,该间隔件藉由另一焊线电性连接该电子元件。
7.如权利要求1或2所述的电子封装件,其特征为,该间隔件中具有至少一电性连接该承载件的导电柱。
8.如权利要求1或2所述的电子封装件,其特征为,该间隔件藉由另一焊线电性连接该承载件。
9.如权利要求1或2所述的电子封装件,其特征为,该承载件上设有被动元件。
10.如权利要求9所述的电子封装件,其特征为,该被动元件藉由另一焊线电性连接该间隔件。
11.如权利要求9所述的电子封装件,其特征为,该被动元件藉由另一焊线电性连接该电子元件。
12.如权利要求1或2所述的电子封装件,其特征为,该间隔件接置于该电子元件上。
13.如权利要求1或2所述的电子封装件,其特征为,该电子封装件还包括形成于该承载件上并覆盖该电子元件与该天线结构的封装层。
14.如权利要求13所述的电子封装件,其特征为,该封装层完全覆盖该天线结构。
15.如权利要求13所述的电子封装件,其特征为,该间隔件外露于该封装层。
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US20170278807A1 (en) | 2017-09-28 |
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