CN107171536B - Control circuit and switch converters - Google Patents
Control circuit and switch converters Download PDFInfo
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- CN107171536B CN107171536B CN201710441195.7A CN201710441195A CN107171536B CN 107171536 B CN107171536 B CN 107171536B CN 201710441195 A CN201710441195 A CN 201710441195A CN 107171536 B CN107171536 B CN 107171536B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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Abstract
Disclose a kind of control circuit and switch converters, by changing reference signal with output signal, simultaneously, so that the slope of ramp signal changes with input signal and FM signal, thus, input signal and FM signal can be introduced into the control loop of master power switch shutdown time point of power stage circuit simultaneously, so that switch converters can also jump quick response to input signal while switch periods are adjustable.
Description
Technical field
The present invention relates to power electronic technique, and in particular to a kind of control circuit and the switch converters using it.
Background technique
It can not only be maintained with fixing the switch converters that turn-on time (Constant On Time, COT) mode controls
Switching frequency approximation is constant when stable state, and in output loading jump with the instantaneous ability for changing duty ratio.This makes this
Class switch converters have better dynamic response characteristic.In this control mode, generate the reference signal of turn-on time with
And the current source of ramp signal can be there are two types of different configuration modes.One is the independent electricals for configuring current source to fixed value
Stream source, another is to configure current source to be controlled by the controlled current source of input voltage.In reference signal or ramp signal
Middle introducing input voltage relevant information allows circuit to respond quickly to the jump of input voltage and change.But for opening
Period (namely switching frequency) adjustable fixed turn-on time control circuit is closed, input electricity cannot be introduced directly into a manner of existing
Pressure, this makes the fixation turn-on time control circuit of Frequency Adjustable be difficult to have faster response speed.
Summary of the invention
In view of this, the present invention provides a kind of control circuit and switch converters, so that switch converters are in switch week
It can also jump quick response to input signal while phase is adjustable.
According to the first aspect of the invention, a kind of control circuit is provided, for the power stage circuit of control switch converter,
The control circuit includes:
Reference signal generative circuit, for generating the reference signal for following the output signal of the switch converters to change；
Ramp signal generative circuit, the slope letter for following the input signal and FM signal to change for generating slope
Number；And
Comparator generates first control signal for the reference signal and ramp signal, when the ramp signal
When reaching the reference signal, the master power switch that the first control signal controls the power stage circuit is cut by first state
The second state is shifted to, is maintained stationary value to control the output signal of the switch converters, and make the master power switch
Switching frequency it is unrelated with the input signal and the FM signal is followed to change.
Preferably, the power stage circuit is buck topology (BUCK)；
The duty ratio of the reference signal and the output signal and the switch control signal of the master power switch at
Ratio；
The peak value of the ramp signal and the input signal, FM signal and the master power switch are in described the
The time of one state is proportional.
Preferably, the reference signal generative circuit includes:
First controlled current source, for generating first electric current proportional to the input signal；
First switch and first resistor are connected on the electric current output channel of first controlled current source, wherein described
First switch carry out state switching synchronous with the master power switch；And
Filter circuit, for being filtered the output reference signal to the first resistor both end voltage.
Preferably, the reference signal generative circuit further include:
First multiplier, for by first electric current multiplied by the string constituted after predetermined value to first switch and first resistor
Join circuit output.
Preferably, the filter circuit includes:
Second capacitor, is connected between the input terminal of filter circuit and ground terminal；
Second resistance is connected between the input terminal of filter circuit and output end；And
Third capacitor, is connected between the output and ground of filter circuit.
Preferably, the ramp signal generative circuit includes:
Second controlled current source, for generating second electric current proportional to the input signal；
Second multiplier is arranged on the output channel of second electric current, is used for second electric current multiplied by characterization
It is exported after the signal of FM signal；
Third capacitor and second switch are connected in parallel between the output and ground of second multiplier, wherein
The second switch carries out state switching in the mode opposite with the first switch to generate the ramp signal.
Preferably, the control circuit further include:
FM signal generative circuit, for generating the FM signal；
Wherein, the FM signal generative circuit includes:
Transistor is arranged on current path, for generating the FM signal；
First error amplifier, input reference signal and current feedback signal, output end are connected to the grid of the transistor
Pole；And
Adjustable resistance is arranged on current path, and both end voltage is input to first error amplification as current feedback signal
Device.
Preferably, the control circuit further include:
Second control signal generative circuit, for the output feedback signal and output according to the switch converters with reference to letter
Number generate second control signal,
When the output feedback signal reaches the output reference signal, the second control signal controls the main function
Rate switch switches to first state by the second state
According to the second aspect of the invention, a kind of switch converters are provided, comprising:
Power stage circuit；And
Control circuit as described above.
By changing reference signal with output signal, meanwhile, so that the slope of ramp signal is with input signal and tune
Frequency signal intensity, thus, it is possible to simultaneously turn off the master power switch that input signal and FM signal are introduced into power stage circuit
In the control loop of time point so that switch converters while switch periods are adjustable can also jump to input signal it is quick
Response.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, the above and other purposes of the present invention, feature and
Advantage will be apparent from, in the accompanying drawings:
Fig. 1 is the local circuit schematic diagram according to the switch converters of the first comparative example；
Fig. 2 is the working waveform figure according to the switch converters of the first comparative example；
Fig. 3 is the working waveform figure according to the switch converters of the first comparative example in the case where input voltage jump；
Fig. 4 is that the switch converters of fixed current source are arranged according to prior art in the case where input voltage jump
Working waveform figure；
Fig. 5 is the local circuit schematic diagram according to the switch converters of the second comparative example；
Fig. 6 is the working waveform figure according to the switch converters of the second comparative example；
Fig. 7 is the local circuit schematic diagram of the switch converters of the embodiment of the present invention；
Fig. 8 is the working waveform figure of the switch converters of the embodiment of the present invention；
Fig. 9 is the controling parameter flow graph of the control circuit of the switch converters of the embodiment of the present invention.
Specific embodiment
Below based on embodiment, present invention is described, but the present invention is not restricted to these embodiments.Under
Text is detailed to describe some specific detail sections in datail description of the invention.Do not have for a person skilled in the art
The present invention can also be understood completely in the description of these detail sections.In order to avoid obscuring essence of the invention, well known method, mistake
There is no narrations in detail for journey, process, element and circuit.
In addition, it should be understood by one skilled in the art that provided herein attached drawing be provided to explanation purpose, and
What attached drawing was not necessarily drawn to scale.
It will also be appreciated that in the following description, " circuit " refers to be passed through electrically by least one element or sub-circuit
The galvanic circle that connection or electromagnetism connect and compose.When title element or the " connection of another element of circuit " being connected to " or element/circuit
" between two nodes when, it, which can be, is directly coupled or connected another element or there may be intermediary element, element it
Between connection can be physically, in logic or its combination.On the contrary, when claiming element " being directly coupled to " or " directly connecting
Be connected to " another element when, it is meant that the two be not present intermediary element.
Unless the context clearly requires otherwise, "include", "comprise" otherwise throughout the specification and claims etc. are similar
Word should be construed as the meaning for including rather than exclusive or exhaustive meaning；That is, be " including but not limited to " contains
Justice.
In the description of the present invention, it is to be understood that, term " first ", " second " etc. are used for description purposes only, without
It can be interpreted as indication or suggestion relative importance.In addition, in the description of the present invention, unless otherwise indicated, the meaning of " multiple "
It is two or more.
Fig. 1 is the local circuit schematic diagram according to the switch converters of the first comparative example.As shown in Figure 1, switch converters
Including control circuit 1 and power stage circuit.Wherein, power stage circuit uses buck topology (BUCK).In Fig. 1, illustrate only
The inductance and capacitor of power stage circuit is not shown in master power switch HS and rectifier switch LS.Control circuit 1 is raw including reference signal
It is generated at circuit 11, ramp signal generative circuit 12, comparator 13, second control signal generative circuit 14 and switch control signal
Circuit 15.Wherein, reference signal generative circuit 11 includes controlled current source CCS1, switch K1, resistance R1 and a filter circuit.
Controlled current source CCS1 is controlled by input voltage vin and exports the electric current Iref being proportional to.Switch K1 be controlled by signal PWM with
Master power switch HS synchronizes turn-on and turn-off.Resistance R1 is connected between switch K1 and ground terminal.Filter circuit is configured as " π "
The RC filter circuit of shape.Electric current Iref flows through resistance R1 formation voltage drop under the control of switch K1 as a result,.Filter circuit is to electricity
Voltage on resistance R1 carries out average outputting reference signal kVout.Reference signal kVout meets:
KVout=Iref*R1*D.
Meanwhile ramp signal generative circuit 12 includes controlled current source CCS2, capacitor C1 and switch K2.Controlled current source
CCS2 is controlled by input voltage vin and exports the electric current Iramp being proportional to.Capacitor C1 and switch K2 are connected in controlled electricity in parallel
Between the current output terminal and ground terminal of stream source CCS2.Switch K2 is controlled by signal PWMB with the side opposite with master power switch HS
Formula turn-on and turn-off.As a result, when master power switch HS is connected, switch K1 conducting, switch K2 shutdown.It is closed in master power switch HS
When disconnected, switch K1 shutdown, switch K2 conducting.In switch K2 shutdown, capacitor C1 is charged by electric current Iramp, so that voltage Vcap
Linear rise.In switch K2 conducting, capacitor C1 is short-circuited electric discharge, so that voltage Vcap rapidly drops to zero, and under continueing to
Primary switch K2 shutdown.Thus voltage Vcap has the waveform of ramp shaped, hereinafter referred to as ramp signal.
Meanwhile comparator 13 is used for benchmark signal kVout and ramp signal Vcap.Switching signal generative circuit includes
Rest-set flip-flop and driving circuit.The reset terminal of rest-set flip-flop is connect with the output end of comparator 13, output signal PWM and signal
PWMB, signal PWM and signal PWMB reverse phase.When ramp signal Vcap rises above reference signal kVout, comparator 13 is defeated
Signal resets rest-set flip-flop out, and signal PWM is reset, and then master power switch HS is turned off.
Meanwhile second control signal generative circuit 14 is according to the feedback voltage FB and reference voltage of power stage circuit
0.6Vref controls rest-set flip-flop set, to control the opportunity of master power switch conducting.
The driving circuit of switch control signal generative circuit 15 according to signal PWM for generating in master power switch HS
Control signal Vgs and the control signal to rectifier switch LS.
Fig. 2 is the working waveform figure according to the switch converters of the first comparative example.With reference to Fig. 1 and Fig. 2, in control signal
Vgs is low level, and when master power switch HS is in an off state, switch K2 conducting, ramp signal Vcap remains zero.Function at this time
The output voltage Vout of rate grade circuit is continued to decline, so that the feedback voltage FB of characterization output voltage Vout is also continued to decline.In
When feedback voltage FB drops to 0.6 times (0.6Vref) of reference voltage, rest-set flip-flop is set.The output signal of rest-set flip-flop
PWM is switched to high level, so that control signal Vgs is switched to high level.Master power switch HS is switched to conducting.Accordingly, it opens
It closes K2 and is switched to shutdown, ramp signal Vcap is begun to ramp up by zero.When ramp signal Vcap rises to reference signal kVout,
The output signal reset jump of comparator 13 is high level.The control signal Vgs of master power switch HS is reset, and main power is opened
HS shutdown is closed, is so recycled.Turn-on time Ton of the master power switch HS in each switch periods is equal to ramp signal Vramp
By the time above freezing for being raised to reference signal kVout.Therefore, in the case where input voltage vin keeps stablizing, each switch periods
Turn-on time Ton it is constant.
When input voltage vin jumps, the switch converters of the first comparative example and the setting fixation in control circuit
The working waveform figure difference of the switch converters of current source is as shown in Figure 3 and Figure 4.As shown in figure 4, for reference signal and tiltedly
The control circuit that slope signal does not change with input voltage vin, when input voltage jumps, reference signal V1 and slope letter
Number V2 is remained unchanged.This makes the turn-on time Ton1 and Ton2 before and after jump identical.After the jump input voltage vin can
To inject more energy to power stage circuit in identical turn-on time, this will lead to output voltage rapid increase.Switch
The time that converter adapts to input voltage jump is longer.And in Fig. 3, for switch change-over described in the first above-mentioned comparative example
Device, due to reference signal kVout=Iref*R1*D, wherein D is the duty ratio of switch converters, and reference signal kVout can be with
Characterize the output voltage Vout of power stage circuit.Meanwhile ramp signal Vcap=Iramp*t/C1, wherein t opens for ramp signal
Begin the time risen.The peak value of ramp signal Vcap is equal to Iramp*Ton/C1, is equal to reference signal kVout.Thus, it is possible to
It is derived as follows:
Iref*R1*D=Iramp*Ton/C1
In turn: Iref*R1* (Ton/T)=Iramp*Ton/C1, wherein T is switch periods.
Switch periods T meets: T=R1*C1* (Iref/Iramp)
Electric current Iref and electric current Iramp are proportional to input voltage vin, and therefore, switch periods T is not with the variation of Vin
And change.
Since after input voltage vin jumps, the duty ratio D of switch converters can correspondingly reduce, so, reference signal
The variation of kVout is smaller.And the slope Iramp*C1 of ramp signal is jumped with the jump of input voltage vin, this to be connected
The jump of time Ton.Ton2 is less than between the conducting before input voltage vin jump between the after the jump conducting of input voltage vin
Ton1.The energy that power stage circuit is input in each switch periods reduces.Fixed turn-on time control can have both been inherited as a result,
The advantage of the intrinsic faster output dynamic response of mode, and turn-on time can be enable to change in time to input voltage vin
It is changed into out corresponding change, output voltage is made to have quick response speed to input voltage jump.
But the first comparative example cannot achieve that switch periods are adjustable, that is, not being adjustable the switch frequency of master power switch
Rate.
Fig. 5 is the local circuit schematic diagram according to the switch converters of the second comparative example.As shown in figure 5, switch converters
Including control circuit 2 and power stage circuit.Wherein, power stage circuit uses buck topology.In Fig. 5, main power is illustrated only
The inductance and capacitor of power stage circuit is not shown in switch HS and rectifier switch LS.Control circuit 2 includes reference signal generative circuit
21, ramp signal generative circuit 22, comparator 23, second control signal generative circuit 24 and switch control signal generative circuit
25.Wherein, comparator 23, second control signal generative circuit 24 and switch control signal generative circuit 25 and the first comparative example phase
Together.Meanwhile reference signal generative circuit 21 has the structure similar with the reference signal generative circuit 11 of the first comparative example.It is different
It is, controlled current source is replaced with the current source CS1 with fixed output valve by reference signal generative circuit 21.In ramp signal
In generative circuit 22, controlled current source is replaced by the output valve current source CCS3 proportional to FM signal Ifs.Current source
The electric current Iramp of CCS3 output is A times of FM signal Ifs.This can be realized by a current-mirror structure.FM signal
Ifs can be generated by FM signal generative circuit 26.FM signal generative circuit 26 includes transistor Q, error amplifier EA
With adjustable resistance Rfs.Error amplifier EA is controlled according to the error in reference voltage Vref and adjustable resistance Rfs between voltage drop
System works in the transistor Q output FM signal Ifs of linear condition.By adjusting adjustable resistance Rfs, so that it may adjust frequency modulation letter
Number Ifs, and then adjust the electric current Iramp in ramp signal generative circuit 22.
Fig. 6 is the working waveform figure according to the switch converters of the second comparative example.As shown in fig. 6, being in control signal Vgs
Low level, when master power switch HS is in an off state, switch K2 conducting, ramp signal Vcap remains zero.Power stage at this time
The output voltage Vout of circuit is continued to decline, so that the feedback voltage FB of characterization output voltage Vout is also continued to decline.It is feeding back
When voltage FB drops to 0.6 times of reference voltage Vref, rest-set flip-flop is set.The output signal PWM of rest-set flip-flop is switched to
High level, so that control signal Vgs is switched to high level.Master power switch HS is switched to conducting.Accordingly, switch K2 is switched to
Shutdown, ramp signal Vcap are begun to ramp up by zero.When ramp signal Vcap rises to reference signal kVout, comparator 23
Output signal reset jump is high level.The switch control signal Vgs of master power switch HS is reset, and master power switch HS is closed
It is disconnected, so recycle.Turn-on time Ton of the master power switch HS in each switch periods is equal to ramp signal Vramp by above freezing
It is raised to the time of reference signal kVout.
Similar with the first comparative example, the peak value of reference signal kVout and ramp signal Vcap are equal.Iref*R1*D as a result,
=Iramp*Ton/C1
In turn, Iref*R1*D=A*Ifs*Ton/C=A*Vref*Ton/ (Rfs*C1)
In turn, Iref*R1* (Ton/T)=A*Vref*Ton/ (Rfs*C1), wherein T is switch periods.
Switch periods T meets as a result: T=R1*C1*Rfs*Iref/ (A*Vref)
Since electric current Iref is fixed value in the second comparative example, switch periods can be by adjusting adjustable resistance
The resistance value of Rfs is adjusted.
But the switch converters of the second comparative example can not quick response input voltage vin variation.Meanwhile it is if simple
Current source in reference signal generative circuit is changed to controlled current source by single ground, then can make switch periods simultaneously by input electricity
The influence for pressing Vin and adjustable resistance Rfs, so that the switch periods of switch converters are out of control.
Fig. 7 is the local circuit schematic diagram of the switch converters of the embodiment of the present invention.Fig. 8 is the switch change-over of the present embodiment
The working waveform figure of device.As shown in Figure 7 and Figure 8, the switch converters of the present embodiment include control circuit 3 and power stage circuit.
Wherein, power stage circuit uses buck topology.In Fig. 7, master power switch HS and rectifier switch LS are illustrated only, function is not shown
The inductance and capacitor of rate grade circuit.Control circuit 3 includes reference signal generative circuit 31, ramp signal generative circuit 32, compares
Device 33, second control signal generative circuit 34 and switch control signal generative circuit 35.Wherein, the control of comparator 33, second letter
Number generative circuit 34 and switch control signal generative circuit 35 are identical as above comparative example, and details are not described herein.It should be understood that the
Two control signal generating circuits 32 are not limited to mode described in the text, and those skilled in the art can use other equivalent sides
Formula or existing mode generate second control signal to control the conducting opportunity of master power switch HS.
In the present embodiment, reference signal generative circuit 31 is for generating the output voltage for following the switch converters
The reference signal kVout of Vout variation.Ramp signal generative circuit 32 is for generating slope with input voltage vin and FM signal
The ramp signal Vcap of Ifs variation.Comparator 33 benchmark signal kVout and ramp signal Vcap generate first control signal
Reset, when ramp signal Vcap rises to reference signal kVout, first control signal reset control master power switch HS by
Conducting is switched to shutdown, keeps stablizing with the output voltage Vout of control switch converter, and make opening for master power switch HS
Pass frequency is unrelated with input signal Vin and changes with FM signal Ifs.
Specifically, reference signal generative circuit 31 include controlled current source CCS4, multiplier M1, switch K3, resistance R2 and
Filter circuit.Wherein, controlled current source CCS4 is for generating the electric current Ivin1 proportional to input voltage vin.Multiplier M1 is used
In to electric current Ivin1 multiplied by predetermined value Idc, to generate an electric current Iref1 proportional to input voltage vin.Switch K3 and
Resistance R2 is connected on the current path of electric current Iref1.Switch K3 is controlled by signal PWM and carries out state switching, that is, with main function
Rate switchs synchronous carry out state switching.Filter circuit is the RC filter circuit of " π " shape.Control of the electric current Iref1 in switch K3 as a result,
Resistance R2 is flowed through under system forms voltage drop.Filter circuit carries out average outputting reference signal kVout to the voltage on resistance R2.Base
Calibration signal kVout meets:
KVout=Iref1*R2*D=Vin*m*R2*Idc*D.
Wherein, D is the duty ratio of switch converters, and m*Vin is equal to Ivin1.Due to the switch converters in buck topology
In, Vin*D=Vout, therefore, kVout are proportional to output voltage Vout.
Ramp signal generative circuit 32 includes controlled current source CCS5, multiplier M2, switch K4 and capacitor C2.Wherein, by
Control current source CCS5 is for generating the electric current Ivin2 proportional to input voltage vin.Multiplier M2 is arranged in electric current Ivin2's
On output channel, for exporting electric current Iramp1 multiplied by A*Ifs after the signal of characterization FM signal Ifs to electric current Ivin2.At this
In embodiment, multiplier M2 is to electric current Ivin2 multiplied by the electric current A*Ifs proportional to FM signal Ifs.It is input to multiplier M2
Electric current A*Ifs can be realized by a current mirror.FM signal Ifs can be raw by FM signal generative circuit 26
At.FM signal generative circuit 36 includes transistor Q1, error amplifier EA1 and adjustable resistance Rfs.Error amplifier EA1 root
The transistor Q1 output frequency modulation for working in linear condition is controlled according to the error of pressure drop in reference voltage Vref and adjustable resistance Rfs
Signal Ifs.By adjusting adjustable resistance Rfs, so that it may adjust FM signal Ifs, and then adjust ramp signal generative circuit 32
In electric current Iramp1.
Capacitor C2 and switch K4 are connected in output end (while the and entire ramp signal generative circuit of multiplier M2 in parallel
32 output) and ground terminal between.Switch K4 is controlled by the signal PWMB with signal PWM reverse phase, with the side opposite with switch K3
Formula carries out state switching.As a result, during master power switch HS conducting, switch K4 shutdown, electric current Iramp1 charges to capacitor C2,
So that ramp signal Vcap linear rise.When ramp signal Vcap rises to reference signal kVout, the letter of the output of comparator 33
Number reset is switched to high level, and reset switch controls the rest-set flip-flop in signal generating circuit 35.The signal of rest-set flip-flop output
PWM is switched to low level, so that switch control signal Vgs is switched to low level.Master power switch HS controlled shutdown.Switch
K4 conducting so that ramp signal Vcap jump becomes zero, and continues to that switch K4 is turned off next time, so recycles.
Fig. 9 is the controling parameter flow graph of the control circuit of the switch converters of the embodiment of the present invention.As shown in figure 9, in base
In calibration signal generative circuit 31, controlled current source CCS4 is based on input voltage vin and generates electric current Ivin1.Multiplier M1 input electricity
Ivin1 and predetermined value Idc is flowed, electric current Iref1 is exported after the two is multiplied.Electric current Iref1 flows through electricity after modulating via switch K3
Resistance R2 is formed by average voltage (namely reference signal) and meets kVout=Iref1*R1*D.As described above, reference signal
KVout substantially changes with output voltage Vout.
In ramp signal generative circuit 32, controlled current source CCS4 is based on input voltage vin and generates electric current Ivin2.Multiply
The signal A*Ifs=A*Vref/Rfs of musical instruments used in a Buddhist or Taoist mass M2 input current Ivin2 and characterization FM signal exports electric current Iramp1.Switch K4
By switching between turn-on and turn-off state, so that electric current Iramp1 controllably charges to capacitor C2, ramp signal Vcap is formed,
Its peak value meets Iramp1*Ton/C2.
As described above, the peak value of ramp signal is equal to reference signal kVout in control circuit 3.Each parameter is full as a result,
Foot:
Vin*m*R2*Idc*Ton/T=Vin*m*A*Vref*Ton/ (Rfs*C2)
Wherein, T is switch periods, and Ton is turn-on time, and Vref is reference voltage.
Switch periods T meets as a result:
T=R2*C2*Rfs*Idc/ (A*Vref)
Switch periods T (other parameters are fixed amount) only related to the resistance value Rfs of adjustable resistance as a result, with adjustable
Resistance value Rfs variation.
Meanwhile when input voltage vin generates jump, since reference signal kVout changes with output voltage Vout,
Change smaller.And the slope Iramp1/C2=m*Vin*A*Vref/ (Rfs*C2) of ramp signal changes with input voltage vin.Cause
This, the slope of ramp signal is jumped with input voltage to be increased.This makes ramp signal be climbed to reference signal during this period,
Turn-on time Ton shortens accordingly.Thus, it is possible to which realization changes input voltage fast while switch periods are adjustable
Speed response.
It should be understood that in order to make it easy to understand, derived by taking Ivin1=Ivin2=m*Vin as an example above, still, electric current
Ivin1 and Ivin2 obviously also can be set to it is unequal, as long as both proportional to input voltage vin.
Meanwhile according to above-mentioned analysis it is found that the electric current Iref1=m*Vin*Idc of multiplier M1 output.Since m and Idc are equal
For changeless value, therefore, via the electric current Iref1 that multiplier M1 is generated actually be also one and input voltage vin at
The electric current of ratio, this can be realized by single controlled current source.Therefore, in a deformation of above-described embodiment, multiply
Musical instruments used in a Buddhist or Taoist mass M1 can be omitted.
It should also be understood that in the above-described embodiments, the presence of multiplier M1 can guarantee reference signal generative circuit 31 and tiltedly
The time delay in response to input voltage vin change process of slope signal generating circuit 32 is essentially identical, to improve entire electricity
The accuracy on road.
The embodiment of the present invention by changing reference signal with output signal, meanwhile, so that the slope of ramp signal with
Input signal and FM signal variation, thus, it is possible to which input signal and FM signal to be introduced into the master of power stage circuit simultaneously
Power switch turns off in the control loop of time point, so that switch converters can also believe input while switch periods are adjustable
Number jump quick response.
It should also be understood by those skilled in the art that be illustrated by taking the switch converters of buck topology as an example above, but this
The principle of inventive embodiments, which can also be modified, to be applied to using input current be input signal and/or to export electric current as output signal
Switch converters, can also be applied to other topology switch converters.
The above description is only a preferred embodiment of the present invention, is not intended to restrict the invention, for those skilled in the art
For, the invention can have various changes and changes.All any modifications made within the spirit and principles of the present invention are equal
Replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of control circuit, for the power stage circuit of control switch converter, the control circuit includes:
Reference signal generative circuit, for generating the reference signal for following the output signal of the switch converters to change；
Ramp signal generative circuit, the ramp signal for following input signal and FM signal to change for generating slope；And
Comparator generates first control signal for the reference signal and ramp signal, when the ramp signal reaches
When the reference signal, the master power switch that the first control signal controls the power stage circuit is switched to by first state
Second state is maintained stationary value to control the output signal of the switch converters, and makes opening for the master power switch
Pass frequency is unrelated with the input signal and the FM signal is followed to change.
2. control circuit according to claim 1, which is characterized in that the power stage circuit is buck topology (BUCK)；
The reference signal is proportional to the duty ratio of the output signal and the switch control signal of the master power switch；
The peak value of the ramp signal and the input signal, FM signal and the master power switch are in first shape
The time of state is proportional.
3. control circuit according to claim 2, which is characterized in that the reference signal generative circuit includes:
First controlled current source, for generating first electric current proportional to the input signal；
First switch and first resistor are connected on the electric current output channel of first controlled current source, wherein described first
Switch carry out state switching synchronous with the master power switch；And
Filter circuit, for being filtered the output reference signal to the first resistor both end voltage.
4. control circuit according to claim 3, which is characterized in that the reference signal generative circuit further include:
First multiplier, for by first electric current multiplied by the series electrical constituted after predetermined value to first switch and first resistor
Road output.
5. control circuit according to claim 3, which is characterized in that the filter circuit includes:
Second capacitor, is connected between the input terminal of filter circuit and ground terminal；
Second resistance is connected between the input terminal of filter circuit and output end；And
Third capacitor, is connected between the output and ground of filter circuit.
6. the control circuit according to any one of claim 3-5, which is characterized in that the ramp signal generative circuit packet
It includes:
Second controlled current source, for generating second electric current proportional to the input signal；
Second multiplier is arranged on the output channel of second electric current, is used for second electric current multiplied by characterization frequency modulation
It is exported after the signal of signal；
Third capacitor and second switch are connected in parallel between the output and ground of second multiplier, wherein described
Second switch carries out state switching in the mode opposite with the first switch to generate the ramp signal.
7. control circuit according to claim 6, which is characterized in that the control circuit further include:
FM signal generative circuit, for generating the FM signal；
Wherein, the FM signal generative circuit includes:
Transistor is arranged on current path, for generating the FM signal；
First error amplifier, input reference signal and current feedback signal, output end are connected to the grid of the transistor；With
And
Adjustable resistance is arranged on current path, and both end voltage is input to first error amplifier as current feedback signal.
8. the control circuit stated according to claim 1, which is characterized in that the control circuit further include:
Second control signal generative circuit, for raw according to the output feedback signal and output reference signal of the switch converters
At second control signal,
When the output feedback signal reaches the output reference signal, the second control signal controls the main power and opens
It closes and first state is switched to by the second state.
9. a kind of switch converters, comprising:
Power stage circuit；And
Such as control circuit of any of claims 1-8.
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| CN201710441195.7A CN107171536B (en) | 2017-06-13 | 2017-06-13 | Control circuit and switch converters |
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| CN201710441195.7A CN107171536B (en) | 2017-06-13 | 2017-06-13 | Control circuit and switch converters |
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| CN107171536B true CN107171536B (en) | 2019-11-05 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102412708A (en) * | 2011-12-28 | 2012-04-11 | 成都芯源***有限公司 | Switch converter and control circuit and control method thereof |
| CN102522880A (en) * | 2011-12-07 | 2012-06-27 | 西安启芯微电子有限公司 | Slope compensation circuit with frequency self-adaptation function |
| CN103138577A (en) * | 2011-11-21 | 2013-06-05 | 英特赛尔美国有限公司 | System and method of maintaining gain linearity of variable frequency modulator |
| CN104578774A (en) * | 2014-12-31 | 2015-04-29 | 矽力杰半导体技术(杭州)有限公司 | Step-down converter based on output voltage ripple control |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106712509B (en) * | 2016-12-21 | 2019-07-23 | 深圳市华星光电技术有限公司 | A kind of power circuit and liquid crystal display |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103138577A (en) * | 2011-11-21 | 2013-06-05 | 英特赛尔美国有限公司 | System and method of maintaining gain linearity of variable frequency modulator |
| CN102522880A (en) * | 2011-12-07 | 2012-06-27 | 西安启芯微电子有限公司 | Slope compensation circuit with frequency self-adaptation function |
| CN102412708A (en) * | 2011-12-28 | 2012-04-11 | 成都芯源***有限公司 | Switch converter and control circuit and control method thereof |
| CN104578774A (en) * | 2014-12-31 | 2015-04-29 | 矽力杰半导体技术(杭州)有限公司 | Step-down converter based on output voltage ripple control |
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