CN113890312B

CN113890312B - Device for detecting current and electronic device

Info

Publication number: CN113890312B
Application number: CN202111457388.4A
Authority: CN
Inventors: 朱伟; 刘鑫; 张树春
Original assignee: Silicon Content Technology Beijing Co ltd
Current assignee: Xinzhou Technology (Beijing) Co.,Ltd.
Priority date: 2021-12-02
Filing date: 2021-12-02
Publication date: 2022-02-15
Anticipated expiration: 2041-12-02
Also published as: CN113890312A

Abstract

The present disclosure provides an apparatus and an electronic apparatus for detecting a current. The apparatus for detecting a current includes: a voltage converter converting an input voltage into an output voltage; a current detection circuit that detects a first current detection signal indicating an average current flowing through the first switch and generates a second current detection signal indicating an average current flowing through the inductor based on the first current detection signal and a duty ratio of a control signal of the first switch; and a control circuit that adjusts a duty ratio of a control signal of the first switch based on the second current detection signal in response to the average current flowing through the inductor reaching a threshold current so that the average current flowing through the inductor is not higher than the threshold current. By generating the detection signal representing the average current flowing through the inductor based on the detection signal representing the average current flowing through the first switch and the duty ratio of the control signal of the first switch, the average current flowing through the inductor can be detected with low power consumption.

Description

Device for detecting current and electronic device

Technical Field

The present disclosure relates to electronic circuits, and more particularly, to an apparatus for detecting current.

Background

Voltage conversion circuits are widely used in power supply applications for various electronic devices. The voltage conversion circuit converts an input voltage supplied from a power supply device (such as a battery or an adapter) on the input side into an output voltage suitable for the load on the output side to operate, so that the load operates normally. In practical use, situations such as excessive input current, instantaneous current jump on the output side, and the like may occur, which may cause power overload on the input side or the output side, and may easily damage the electronic device and the power supply device thereof.

For this purpose, the voltage conversion circuit usually comprises a corresponding protection circuit to detect and limit the current flowing through the inductor of the voltage conversion circuit. However, in conventional voltage conversion circuits, inductor current sensing typically has high power losses.

Disclosure of Invention

To reduce power consumption for current sensing, the present disclosure provides an apparatus for sensing current.

In one aspect of the present disclosure, an apparatus for detecting current is provided. The apparatus for detecting a current includes a voltage converter, a current detection circuit, and a control circuit. The voltage converter includes a first switch, a second switch, and an inductor, and is configured to charge or discharge the inductor by alternately turning on the first switch and the second switch to convert an input voltage into an output voltage. The current detection circuit is coupled to the voltage converter and configured to detect a first current detection signal representative of an average current flowing through the first switch and generate a second current detection signal representative of the average current flowing through the inductor based on the first current detection signal and a duty cycle of a control signal of the first switch. The control circuit is coupled to the voltage converter and the current detection circuit and is configured to: the duty cycle of the control signal of the first switch is adjusted based on the second current detection signal in response to the average current flowing through the inductor reaching the threshold current so that the average current flowing through the inductor is not higher than the threshold current.

In a second aspect of the present disclosure, an electronic device is provided. The electronic device comprises a power supply device and a device for detecting current according to the first aspect, the device for detecting current being provided with an input voltage by the power supply device.

This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

Drawings

The above and other objects, structures and features of the present disclosure will become more apparent from the following detailed description when read in conjunction with the accompanying drawings. In the drawings, several embodiments of the present disclosure are shown by way of example and not limitation.

Fig. 1 illustrates an environmental schematic in which an apparatus for detecting current may be implemented, according to an embodiment of the present disclosure.

Fig. 2 shows a schematic block diagram of an apparatus for detecting current according to a first embodiment of the present disclosure.

Fig. 3 shows a schematic circuit diagram of a booster circuit in the apparatus for detecting a current according to the first embodiment of the present disclosure.

Fig. 4 shows a schematic circuit diagram of a control circuit in the apparatus for detecting a current according to the first embodiment of the present disclosure.

Fig. 5 shows a schematic circuit diagram of a current detection circuit in an apparatus for detecting a current according to a first embodiment of the present disclosure.

Fig. 6 shows a schematic waveform timing diagram of an apparatus for detecting current according to a first embodiment of the present disclosure.

Fig. 7 shows a schematic block diagram of an apparatus for detecting current according to a second embodiment of the present disclosure.

Fig. 8 shows a schematic circuit diagram of a step-down circuit in an apparatus for detecting current according to a second embodiment of the present disclosure.

Fig. 9 shows a schematic circuit diagram of a control circuit in an apparatus for detecting a current according to a second embodiment of the present disclosure.

Fig. 10 shows a schematic circuit diagram of a current detection circuit in an apparatus for detecting a current according to a second embodiment of the present disclosure.

Fig. 11 shows a schematic waveform timing diagram of an apparatus for detecting current according to a second embodiment of the present disclosure.

Detailed Description

Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure are shown in the drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the disclosure are for illustration purposes only and are not intended to limit the scope of the disclosure. It may be evident in some or all instances that any of the embodiments described below may be practiced without the specific design details described below. In other instances, well-known structures and devices are shown in block diagram form in order to facilitate describing one or more embodiments.

In the description of the embodiments of the present disclosure, the words "comprise" and variations such as "comprises" and "comprising" should be understood to be open-ended, i.e., "including but not limited to. The expression "based on" should be understood as "based at least in part on". The expression "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The expressions "first", "second", etc. may refer to different or the same object. Other explicit and implicit definitions are also possible below.

In one conventional voltage conversion circuit solution, the average current flowing through the inductor is typically limited indirectly by detecting and limiting the peak current flowing through the inductor. However, when the operating conditions of the circuit change, the difference between the inductor peak current and the inductor average current may change, and therefore the detection of the inductor peak current may not be well suited for detecting the inductor average current.

In another conventional voltage conversion circuit, a sampling resistor connected in series with an inductor may be used to implement inductor current detection. However, since the sampling resistor is located on a large current path, power consumption is large, thus resulting in a voltage conversion circuit having low power conversion efficiency.

In another conventional technical solution of the switching type voltage converting circuit, currents flowing through two power switching tubes of the voltage converting circuit may be detected respectively, and then signals are superimposed, so as to obtain complete information of the current flowing through the inductor. However, such an implementation would significantly increase the cost and complexity of the chip. In addition, the signal superimposing process requires proportional matching of detection signals of currents respectively flowing through the two power switching tubes, which makes it difficult to obtain an inductor current signal with high accuracy.

In an embodiment of the present disclosure, an improved apparatus for detecting current is provided. The means for detecting the current is capable of generating a detection signal indicative of the average current flowing through the inductor based on a detection signal indicative of the average current flowing through a power switch and a duty cycle of a control signal of the power switch. Thus, embodiments of the present disclosure enable detection of the average current flowing through the inductor with higher accuracy and lower power loss.

Fig. 1 shows a schematic environmental diagram of an apparatus 10 for detecting current according to one embodiment of the present disclosure. The electronic device 1 comprises a power supply device 2 and a device 10 for detecting a current. In one embodiment, the means for detecting current 10 may be configured to provide an operating voltage to a load 6, such as a music player. The means 10 for detecting the current may be powered by the power supply means 2. The supply device 2 may be, for example, a battery or an adapter and outputs a substantially constant direct supply voltage V_IN. Supply voltage V_INIs converted into a DC output voltage V by means of a device 10 for detecting current_OUTFor supply to the load 6. In one embodiment, a switch 4 is provided to control the supply of power to the load 6. It is desirable to detect the current flowing through the inductor of the device for detecting current 10 with high accuracy and low loss in order to prevent the power supply device 2 or the load 6 from being overloaded with power.

Examples of the apparatus 10 for detecting a current may include, for example, a step-up converting circuit or a step-down converting circuit. A step-up conversion circuit according to an embodiment of the present disclosure will be described below with reference to fig. 2 to 6, and a step-down conversion circuit according to an embodiment of the present disclosure will be described below with reference to fig. 7 to 11. By the embodiment of the disclosure, the detection of the average current flowing through the inductor can be realized with high precision and low loss, so that the power supply device and the load of the inductor are protected.

Fig. 2 shows a schematic block diagram of an apparatus 10' for detecting current according to a first embodiment of the present disclosure. The means 10' for sensing the current comprises a boost converter circuit. The apparatus 10' for detecting a current includes a voltage boosting circuit 12, a current detecting circuit 14, a control circuit 16, and a reference voltage generating circuit 18.

In one embodiment, the boost circuit 12 is configured to provide input power from the power supply 2Pressure V_INBoosted to an output voltage V supplied to a load 6_OUT. The current detection circuit 14 is coupled to the voltage boost circuit 12 and is configured to detect a current flowing through the voltage boost circuit 12 and generate a current detection signal indicative thereof. Control circuit 16 is coupled to current sensing circuit 14, boost circuit 12, and reference voltage generation circuit 18. The reference voltage generation circuit 18 is configured to provide a reference voltage required by the control circuit 16. The control circuit 16 is configured to output the voltage V from the booster circuit 12 based on the current detection signal from the current detection circuit 14_OUTAnd a reference voltage from a reference voltage generating circuit 18 to control the booster circuit 12.

Fig. 3 shows a schematic circuit diagram of the booster circuit 12 in the apparatus for detecting current 10' according to the first embodiment of the present disclosure. In the embodiment of fig. 3, the boost circuit 12 includes a low-side switch QL1, a high-side switch QH1, an inductor L, and a capacitor C. In one embodiment, the low side switch QL1 may be a field effect transistor. Alternatively, the low side switch QL1 may be a bipolar transistor. In one embodiment, the high-side switch QH1 may be a field effect transistor. Alternatively, the high-side switch QH1 may be a diode, a bipolar transistor, or a field effect transistor, or a switch formed from a combination of one or more of the above. Inductor L and high-side switch QH1 are coupled in series at input voltage V_INAnd an output voltage V_OUTIn the meantime. The low-side switch QL1 is coupled between an intermediate node SW between the inductor L and the high-side switch QH1 and ground GND. The capacitor C is coupled to the output voltage V_OUTAnd ground GND. The low-side switch QL1 and the high-side switch QH1 are responsive to a control signal SW from the control circuit 16 during one cycle₁And SW₂And alternately turned on to achieve boosting. Although inductor L and capacitor C are shown in fig. 3 as being separate from boost circuit 12, this is merely illustrative and not limiting of the scope of the present disclosure. In another embodiment, inductor L and capacitor C may be part of boost circuit 12.

Specifically, when the low-side switch QL1 is on, the input voltage V_INThe inductor L is charged. During this time, the high side switch QH1 is off and current flows throughThe current of the inductor L is equal to the current flowing through the low-side switch QL1 and gradually increases with time. When the high-side switch QH1 is turned on, the inductor L supplies power to the capacitor C and the load, and the current flowing through the inductor L gradually decreases. Subsequently, when the low-side switch QL1 is turned on, the input voltage V_INThe inductor L is charged and the capacitor C supplies power to the load. Thus, the low-side switch QL1 and the high-side switch QH1 are responsive to the control signal SW from the control circuit 16₁And SW₂And alternately conducting, the voltage boost circuit 12 can boost the input voltage V from the power supply 2_INBoosted to an output voltage V supplied to a load 6_OUT。

The change of boost voltage, e.g. the output voltage V, can be achieved by changing the duty cycle of the control signal of the low-side switch QL1 or the high-side switch QH1_OUTFrom the first voltage value to the second voltage value. Specifically, the low side switch QL1 has an on-time D_L*T，D_LControl signal SW representing low side switch QL1₂T denotes the cycle time. In one switching cycle, the low-side switch QL1 and the high-side switch QH1 are in complementary conducting logic, so that the high-side switch QH1 has a conducting time of (1-D)_L) T. In the case where the boost operation reaches steady state, when the low side switch QL1 is turned on, the current through the inductor L increases linearly and the voltage drop across the inductor L is V_IN(ii) a When the high-side switch QH1 is turned on, the current through the inductor L decreases linearly and the voltage drop across the inductor L is V_OUT-V_IN. The voltage-second balance is reached across the inductor L, in which case the input voltage V_INAnd an output voltage V_OUTHas the following relationship:

(1)

wherein D_LControl signal SW representing low side switch QL1₂The duty cycle of (c). Equation (1) can be rewritten as the following equation (2):

(2)

it follows that the output voltage V can be varied by varying the duty cycle of the control signal of the low-side switch QL1 or the high-side switch QH1_OUTThe output voltage value of (1). It will be appreciated that other boosting circuits may be used to boost the input voltage V_INBoosted to output voltage V_OUTAnd outputs a voltage V_OUTMay be varied from a first voltage value to a second voltage value.

Fig. 4 shows a schematic circuit diagram of the control circuit 16 in the apparatus for detecting current 10' according to the first embodiment of the present disclosure. The control circuit 16 includes a mode control circuit 20 and a switching signal generator 22, and is configured to adjust the duty cycle of the control signal of the low-side switch QL1 such that the average current flowing through the inductor L is not higher than a threshold current. The mode control circuit 20 is coupled to the voltage boost circuit 12 and the current detection circuit 14, and is configured to output the voltage V based on the current detection signal from the current detection circuit 14 and the output voltage V_OUTGenerating a pulse width modulated signal S_PWM. The switching signal generator 22 is coupled to the mode control circuit 20 and is configured to be based on the clock signal CLK and the pulse width modulation signal S_PWMGenerating a high side control signal SW₁And a low side control signal SW₂To control the turn-on and turn-off of the high-side switch QH1 and the low-side switch QL1, respectively. High side control signal SW₁For controlling the on and off of the high-side switch QH1, the low-side control signal SW₂For controlling the turn-on and turn-off of the low side switch QL 1.

The mode control circuit 20 may include a first error amplifier 24 and a pulse width modulation signal generator 28. The first error amplifier 24 is coupled to the boost circuit 12 and is configured to be based on the output voltage V_OUTAnd a preset output voltage V_REF0The difference between them to generate a compensation voltage V_COMP. In one embodiment, the first error amplifier 24 may be configured to output a voltage V based on the AND output voltage_OUTProportional feedback voltage V_FBAnd a first reference voltage V_REF1The difference between them to generate a compensation voltage V_COMP. For example by dividingVoltage network to obtain feedback voltage V_FB. In one example, the voltage divider network includes a voltage divider coupled at an output voltage V_OUTAnd a first resistor R1 and a second resistor R2 between ground. Feedback voltage V_FBFor example, the voltage drop across the second resistor R2. By setting the resistance values of the first resistor R1 and the second resistor R2, the feedback voltage V can be set_FBAnd an output voltage V_OUTTo each other. A first reference voltage V_REF1And a predetermined output voltage V_REF0Proportional and may be generated by the reference voltage generation circuit 18.

In one embodiment, the first error amplifier 24 may comprise an operational amplifier. When the output voltage V is_OUTIs equal to the preset output voltage V_REF0Time, feedback voltage V_FBIs equal to the first reference voltage V_REF1At this time, the compensation voltage V_COMPRemain unchanged. When the output voltage V is_OUTHigher than a predetermined output voltage V_REF0Time, feedback voltage V_FBHigher than the first reference voltage V_REF1The first error amplifier 24 discharges the capacitor C1 to compensate the voltage V_COMPAnd correspondingly decreases. When the output voltage V is_OUTLower than a predetermined output voltage V_REF0Time, feedback voltage V_FBLower than the first reference voltage V_REF1The first error amplifier 24 charges the capacitor C1 to compensate the voltage V_COMPAnd correspondingly increases. Resistor R3 and capacitor C1 may improve the stability of the compensation loop and improve noise immunity.

The current sense circuit 14 is coupled to the low-side switch QL1 and is configured to sense a current flowing through the low-side switch QL1 and generate a current sense signal, e.g., a sampled voltage V1, representative of the current flowing through the low-side switch QL1_S0. It can be understood that the current detection signal V_S0May be proportional to the current flowing through the low side switch QL1 and reach the current sense signal V when the current reaches a peak current_S0Peak value of (a). Although here the voltage V is sampled_S0The current sensing is shown in form, but this is merely illustrative and not limiting on the scope of the disclosure. Proportional current may also be used, for example, for low side switch QL1The current is proportionally sampled for detection.

The pulse width modulation signal generator 28 is coupled to the current detection circuit 14, the first error amplifier 24, and the switching signal generator 22, and may be configured to be based on the current detection signal V from the current detection circuit 14_S0And a compensation voltage V from the first error amplifier 24_COMPGenerating a pulse width modulated signal S_PWM. The switching signal generator 22 is configured to modulate the signal S based on the pulse width modulation signal_PWMAnd a clock signal CLK to alternately turn on the low-side switch QL1 and the high-side switch QH 1. In one embodiment, the switching signal generator 22 may be configured to respond to the current detection signal V_S0Equal to the compensation voltage V_COMPTo turn off the low-side switch QL1 and turn on the high-side switch QH 1; and turns on the low-side switch QL1 and turns off the high-side switch QH1 in response to the clock signal CLK. The output voltage V may be made available using a voltage feedback loop including the first error amplifier 24_OUTStabilized at a predetermined output voltage V_REF0Thereby providing a stable output voltage to the load 6.

In order to prevent power overload of the power supply device 2 or the load 6, the control circuit 16 may be further configured to detect and limit the current flowing through the inductor L of the device for detecting current 10'. In one embodiment, the current sense circuit 14 is configured to generate a current sense signal V representative of the average current flowing through the inductor L_S3. For example, the current sense circuit 14 may be configured to sense the current based on a current sense signal V representative of the current flowing through the low-side switch QL1_S0To generate a current detection signal V representing the average current flowing through the inductor L_S3. An example of a specific implementation of the current detection circuit 14 will be described in detail in connection with fig. 5.

The control circuit 16 may be configured to detect the current V based on the current detection signal V in response to the average current flowing through the inductor L reaching a threshold current_S3The duty cycle of the control signal of the low-side switch QL1 is adjusted so that the average current through the inductor L is not higher than the threshold current. In one embodiment, the mode control circuit 20 may further include a second error amplifier26 and a diode D1. The second error amplifier 26 is coupled to the current detection circuit 14 and is configured to detect the signal V based on the current_S3And a reference voltage V_REF2The difference between them to generate a regulated voltage V_EA2. Reference voltage V_REF2May be generated by the reference voltage generating circuit 18.

The diode D1 has an anode and a cathode, with the anode of the diode D1 being coupled to the output of the first error amplifier 24 and the cathode of the diode D1 being coupled to the output of the second error amplifier 26. When diode D1 is conductive, mode control circuit 20 may be configured to regulate voltage V based on_EA2To adjust the compensation voltage V_COMP。

In one embodiment, the current sense signal V is used when the average current through the inductor L is low_S3Below the reference voltage V_REF2Regulated voltage V generated by second error amplifier 26_EA2Above the compensation voltage V_COMPMinus the forward conduction voltage V of diode D1_thI.e. V_EA2＞V_COMP-V_th. At this time, the diode D1 is not conducted, and the compensation voltage V_COMPDetermined by a voltage feedback loop including the first error amplifier 24.

When the average current flowing through the inductor L is high, the current detection signal V_S3Close to the reference voltage V_REF2Regulated voltage V generated by second error amplifier 26_EA2Down to a compensation voltage V_COMPMinus the forward conduction voltage of diode D1, i.e. V_EA2≤V_COMP-V_th. At this time, the diode D1 is turned on in the forward direction, and the capacitor C1 is discharged to compensate the voltage V_COMPIs pulled down to V_EA2+V_thThus, the duty cycle D of the control signal of the low-side switch QL1_LAnd decreases. From equation (2), the duty ratio D_LThe reduction will result in an output voltage V_OUTWill decrease, e.g. below the preset output voltage V_REF0。

The input power supplied by the supply means 2 is equal to the output power received by the load 6, i.e. the power consumption of the means 10' for detecting the current is not taken into account

(3)

Wherein

Is the average output current, i.e. the average current through the load 6;

is the average input current, i.e. the average current flowing through the inductor L. Combining equation (2), the following formula (4) can be obtained:

(4)

in one embodiment, the average output current is determined when

At higher times, average input current

This may lead to power overload on the input side. With average input current

Increase of (3), regulating the voltage V_EA2And gradually decreases. When V is satisfied_EA2≤V_COMP-V_thAt this time, the control circuit 16 sets the duty ratio D of the control signal of the low-side switch QL1 to_LIs reduced so that the average input current is reduced

Stabilized at a threshold current I_thThereby preventing power overload of the power supply device 2. In other words, with the current feedback loop including the second error amplifier 26, the current detection signal V may be based on in response to the average current flowing through the inductor L reaching the threshold current_S3Adjusting the duty cycle of the control signal of the low-side switch QL1 such that the average current through the inductor L is not higher than the threshold current I_thAnd thus prevent power overload on the input side.

An example of a specific implementation of the current detection circuit 14 will be described below in conjunction with fig. 5. Fig. 5 shows a schematic circuit diagram of the current detection circuit 14 in the apparatus for detecting current 10' according to the first embodiment of the present disclosure. In one embodiment, the current detection circuit 14 includes a current sampling circuit 32 and a current signal generation circuit 33.

The current sampling circuit 32 is coupled to the low-side switch QL1 and is configured to sample the current flowing through the low-side switch QL1 to generate a current sense signal V representing the average current flowing through the low-side switch QL1_S1. In one embodiment, current sampling circuit 32 includes a current sampler 31, a chopper circuit 35, and an averaging circuit 36.

The current sampler 31 is coupled to the low-side switch QL1 and is configured to sample a current flowing through the low-side switch QL1 to generate a current detection signal V_S. In one embodiment, current sampler 31 may include an operational amplifier 34 and a resistor R4. The operational amplifier 34 is configured to generate a current detection signal V based on a voltage difference across the low-side switch QL1_S. In one embodiment, the operational amplifier 34 is coupled to the low side switch QL1 via a switch Q0, the switch Q being responsive to the low side control signal SW₂And simultaneously turns on and off with the low side switch QL 1. The operational amplifier 34 is configured to sample the current I _ LS flowing through the low-side switch QL1 and to scale the current I _ LS to flow into the resistor R4. Thus, the following formula (5) can be obtained:

(5)

where k is the gain of the operational amplifier 34,

is the resistance value of resistor R4. When the low sideWhen the switch QL1 is turned on, the current detection signal V_SIncreases with increasing current I _ LS through the low side switch QL 1; and when the low-side switch QL1 is turned off, the current detection signal V_SAnd drops to zero.

A chopper circuit 35 is coupled to the current sampler 31 and is configured to detect a signal V for the current_SChopping to generate a current detection signal V_S0. In one embodiment, the chopper circuit 35 may include a first switch Q1 and a second switch Q2. The first switch Q1 is coupled to the current sampler 31 and is responsive to the low side control signal SW₂And simultaneously turns on and off with the low side switch QL 1. The second switch Q2 is coupled between the first switch Q1 and ground GND and is responsive to a high-side control signal SW₁And is turned on and off simultaneously with the high-side switch QH 1. In one embodiment, the PWM signal generator 28 may be based on the current detection signal V_S0And a compensation voltage V_COMPGenerating a pulse width modulated signal S_PWM. The current sampler 31 and the chopper circuit 35 are configured to generate a current detection signal V_S0The current detector of (1). It will be appreciated that the structure of the current detector is merely exemplary, and that the current detection signal V may also be detected in other circuit arrangements_S0As long as it is capable of representing the current flowing through the low-side switch QL 1.

The averaging circuit 36 is coupled to the chopper circuit 35 and the current signal generation circuit 33, and is configured to detect the current signal V_S0Averaging to generate a current detection signal V_S1. In one embodiment, the averaging circuit 36 includes a resistor R5 coupled to the chopper circuit 35 and a capacitor C2 coupled between the resistor R5 and ground GND. The averaging circuit 36 may be configured to detect the current signal V through the resistor R5 and the capacitor C2_S0Integral filtering is performed to detect the current signal V_S0Averaging is performed. In conjunction with equation (5), the following formula (6) can be obtained:

(6)

wherein,

is the average current flowing through the low side switch QL 1. The following formula (7) can be obtained according to the direct current charge relation:

(7)

combining equation (5), the following formula (8) can be obtained:

(8)

the current signal generation circuit 33 is coupled to the averaging circuit 36, and is configured to detect the signal V based on the current_S1And the duty ratio of the control signal of the low-side switch QL1 to generate a current detection signal V_S3. The current signal generating circuit 33 includes an operational amplifier 37, a switching network 39, and a filter circuit 38.

Operational amplifier 37 may have a first input, a second input, and an output. A first input terminal of the operational amplifier 37 is coupled to the averaging circuit 36 for receiving the current detection signal V_S1. A second input of the operational amplifier 37 is coupled to the filter circuit 38 for receiving the voltage signal V_S2. An output of the operational amplifier 37 is coupled to the second error amplifier 26 to provide a current sense signal V to the second error amplifier 26_S3。

The filter circuit 38 includes a resistor R6 and a capacitor C3, the resistor R6 being coupled to the second input of the operational amplifier 37, the capacitor C3 being coupled to the second input of the operational amplifier 37 and ground GND.

The switching network 39 includes a third switch Q3 and a fourth switch Q4. The third switch Q3 is coupled to the output of the operational amplifier 37 and the resistor R6, and is responsive to the low side control signal SW₂And simultaneously turns on and off with the low side switch QL 1. A fourth switch Q4 is coupled between the midpoint of the resistor R6 and the third switch Q3 and ground GND,and is responsive to a high side control signal SW₁And is turned on and off simultaneously with the high-side switch QH 1. In other words, the duty cycle of the control signal of the third switch Q3 is D_LThe same as the duty cycle of the control signal of the low side switch QL 1. Thus, the input and output of the current signal generating circuit 33 can satisfy the following expression (9):

(9)

combining equation (8), the following formula (10) can be obtained:

(10)

thus, the current signal generating circuit 33 can detect the current V based on the current detection signal_S1And the duty cycle of the control signal of the low side switch QL1

Generating a current detection signal V_S3Current detection signal V_S1Representing the average current through the low side switch QL1

Current detection signal V_S3Representing the average current through the inductor L

。

Fig. 6 shows a schematic waveform timing diagram of the apparatus 10' for detecting current according to the first embodiment of the present disclosure. Specifically, fig. 6 shows the control signal SW₁And SW₂Current IL through inductor L, voltage V at node SW_SWCurrents I _ LS and I _ HS flowing through the low-side switch QL1 and the high-side switch QH1, and a current detection signal V_S0And V_S1。

With the boost converter circuit according to the embodiment of the present disclosure shown in fig. 2 to 6, it is possible to determine the average current flowing through the inductor by detecting the average current flowing through the low-side switch and based on the duty cycle of the control signal of the low-side switch, thereby enabling the current feedback loop to limit the average current flowing through the inductor to be not higher than the threshold current. Compared with the conventional boost conversion circuit, the embodiment of fig. 2 to 6 does not need to perform proportion matching and signal superposition between signals, thereby having higher detection accuracy; extra sampling resistors do not need to be arranged on a large current path, so that the power loss is low; and a voltage feedback loop and a current feedback loop can be realized by only adopting one current sampler, the circuit is simple, the circuit components are fewer, and the occupied area of the PCB is smaller.

Fig. 2 to 6 show examples of the boost converter circuit according to the embodiment of the present disclosure, but it is understood that the boost converter circuit is not limited thereto, but may have other boost converter circuits as long as it can generate the detection signal representing the average current flowing through the inductor based on the detection signal representing the average current flowing through one power switching tube and the duty ratio of the control signal of the power switching tube. Although in fig. 2-6 the boost converter circuit is shown as generating the detection signal representative of the average current flowing through the inductor based on the detection signal representative of the average current flowing through the low-side switch and the duty cycle of the control signal for the low-side switch, this is merely illustrative and not limiting of the scope of the disclosure. In another embodiment, the boost converter circuit may further generate the detection signal representing the average current flowing through the inductor based on a detection signal representing the average current flowing through the high-side switch and a duty cycle of a control signal of the high-side switch.

A buck conversion circuit according to an embodiment of the present disclosure will be described below in conjunction with fig. 7-11. Fig. 7 shows a schematic block diagram of an apparatus 10 "for detecting current according to a second embodiment of the present disclosure. The means 10 "for sensing current comprises a buck converter circuit. The apparatus 10 "for detecting a current includes a voltage step-down circuit 42, a current detection circuit 44, a control circuit 46, and a reference voltage generation circuit 48. The device 10' for detecting current of fig. 7 and the device for detecting current of fig. 2The apparatus 10' is similar except that: the device 10 "for detecting a current comprises a voltage-reducing circuit 42, the voltage-reducing circuit 42 being configured to reduce an input voltage V from the power supply 2_INDown to an output voltage V supplied to a load 6_OUT。

Fig. 8 shows a schematic circuit diagram of the step-down circuit 42 in the apparatus 10 ″ for detecting current according to the second embodiment of the present disclosure. In the embodiment of fig. 8, the voltage step-down circuit 42 includes a high-side switch QH2, a low-side switch QL2, an inductor L, and a capacitor C. In one embodiment, the high-side switch QH2 may be a field effect transistor. Alternatively, the high-side switch QH2 may be a bipolar transistor. In one embodiment, the low side switch QL2 may be a field effect transistor. Alternatively, the low-side switch QL2 may be a diode, a bipolar transistor, or a field effect transistor, or a switch formed by a combination of one or more of the above. The high-side switch QH2 and the inductor L are coupled in series at an input voltage V_INAnd an output voltage V_OUTIn the meantime. The low-side switch QL2 is coupled between an intermediate node SW between the inductor L and the high-side switch QH2 and ground GND. The capacitor C is coupled to the output voltage V_OUTAnd ground GND. The high-side switch QH2 and the low-side switch QL2 are responsive to a control signal SW from the control circuit 46 during one cycle₁And SW₂And alternately turned on to achieve voltage reduction.

Specifically, when the high-side switch QH2 is turned on, the input voltage V_INThe inductor L and the capacitor C are charged and power is supplied to the load. During this time, the low-side switch QL2 is off, and the current through the inductor L is equal to the current through the high-side switch QH2 and gradually increases over time. When the low-side switch QL2 is turned on, the inductor L and the capacitor C supply power to the load, and the current through the inductor L gradually decreases. Thus, the high-side switch QH2 and the low-side switch QL2 are responsive to the control signal SW from the control circuit 46₁And SW₂And alternately turned on, the voltage-reducing circuit 42 can supply the input voltage V from the power supply 2_INDown to an output voltage V supplied to a load 6_OUT。

By changing the high side switch QH2 or the low side switchThe duty cycle of the control signal to turn off QL2 to effect a change in buck, e.g., output voltage V_OUTFrom the first voltage value to the second voltage value. Specifically, the high-side switch QH2 has an on-time D_H*T，D_HDenotes the duty cycle of the control signal of the high-side switch QH2, and T denotes the cycle time. In one switching cycle, the high-side switch QH2 and the low-side switch QL2 are in a complementary relationship in conduction logic, so that the low-side switch QL2 has a conduction time of (1-D)_H) T. In the case where the buck operation reaches steady state, when the high side switch QH2 is turned on, the current through the inductor L increases linearly and the voltage drop across the inductor L is V_IN-V_OUT(ii) a When the low side switch QL2 is turned on, the current through the inductor L decreases linearly and the voltage drop across the inductor L is V_OUT. The voltage-second balance is reached across the inductor L, in which case the input voltage V_INAnd an output voltage V_OUTHas the following relationship:

(11)

wherein D_HRepresenting the duty cycle of the control signal for the high-side switch QH 2. Equation (7) can be rewritten as the following equation (12):

(12)

it can be seen that the output voltage V can be varied by varying the duty cycle of the control signal to the high-side switch QH2 or the low-side switch QL2_OUTThe output voltage value of (1). It will be appreciated that other voltage reduction circuits may be used to reduce the input voltage V_INStep-down to an output voltage V_OUTAnd outputs a voltage V_OUTMay be varied from a first voltage value to a second voltage value.

Fig. 9 shows a schematic circuit diagram of the control circuit 46 in the apparatus 10 "for detecting a current according to the second embodiment of the present disclosure. The control circuit 46 includes a mode control circuit 50 and a switching signal generator 52, and is configured to regulate the high-side switch QH2Such that the average current through the inductor L is not higher than the threshold current. Mode control circuit 50 includes a first error amplifier 54, a second error amplifier 56, a diode D1, and a pulse width modulated signal generator 58. The control circuit 46 of fig. 9 is similar to the control circuit 16 of fig. 4, except that: the current detection circuit 44 is coupled to the high-side switch QH2, and the current detection signal V generated by the current detection circuit 44_S0Representing the current flowing through the high-side switch QH 2. Similar to fig. 4, the pwm signal generator 48 may be configured to detect the current V based on the current detection signal from the current detection circuit 44_S0And compensation voltage V from first error amplifier 54_COMPGenerating a pulse width modulated signal S_PWM. The output voltage V may be made available using a voltage feedback loop including the first error amplifier 54_OUTStabilized at a predetermined output voltage V_REF0Thereby providing a stable output voltage to the load 6.

The current detection circuit 44 may be configured to detect the current flowing through the high-side switch QH2 based on a current detection signal V_S0And the duty cycle of the control signal of the high-side switch QH2 to generate a current detection signal V representing the average current flowing through the inductor L_S3. With the current feedback loop including the second error amplifier 56, the current detection signal V may be based on in response to the average current flowing through the inductor L reaching the threshold current_S3Adjusting the duty cycle of the control signal of the high-side switch QH2 so that the average current flowing through the inductor L is not higher than the threshold current I_th。

An example of a specific implementation of the current detection circuit 44 will be described in detail in connection with fig. 10. Fig. 10 shows a schematic circuit diagram of the current detection circuit 44 in the apparatus 10 ″ for detecting a current according to the second embodiment of the present disclosure. In one embodiment, the current detection circuit 44 includes a current sampling circuit 62 and a current signal generation circuit 63. The current sampling circuit 62 includes a current sampler 61, a chopper circuit 65, and an averaging circuit 66. The current sampler 61 may include an operational amplifier 64 and a resistor R4. The current signal generating circuit 63 includes an operational amplifier 67, a switching network 69, and a filter circuit 68. The current sense circuit 44 of fig. 10 is similar to the current sense circuit 14 of fig. 5, except that: the current detection signal V generated by the current sampling circuit 62_S1Representing the average current flowing through the high-side switch QH 2. The first switch Q1 and the third switch Q3 of the current detection circuit 44 are responsive to the high side control signal SW₁And is turned on and off simultaneously with the high-side switch QH 2; the second Q2 and fourth Q4 switches of the current sense circuit 44 are responsive to the low side control signal SW₂And simultaneously turns on and off with the low side switch QL 2. The duty cycle of the control signal for the third switch Q3 in the switching network 39 is D_HAnd the duty cycle of the control signal of the high-side switch QH 2. Thus, the input and output of the current signal generating circuit 63 can satisfy the following expression (13):

(13)

thus, the current signal generating circuit 63 can detect the current V based on the current detection signal V_S1And the duty ratio of the control signal of the high-side switch QH2 to generate a current detection signal V_S3。

Fig. 11 shows a schematic waveform timing diagram of the apparatus 10 ″ for detecting current according to the second embodiment of the present disclosure. The following formula (14) can be obtained from the direct current charge relationship:

(14)

wherein,

is the average current flowing through the high-side switch QH2,

is the average output current, i.e. the average current flowing through the inductor L. In the current detection signal V_S1Representing the average current flowing through the high-side switch QH2

In the case of (2), the current detection signal V generated by the current signal generation circuit 63_S3Representing the average current through the inductor L

。

With the step-down converter circuits according to the embodiments of the present disclosure shown in fig. 7 to 11, it is possible to determine the average current flowing through the inductor by detecting the average current flowing through the high-side switch and based on the duty ratio of the control signal of the high-side switch, thereby enabling the current feedback loop to limit the average current flowing through the inductor to be not higher than the threshold current. Compared with the conventional buck conversion circuit, the embodiments of fig. 7 to 11 do not need to perform proportion matching and signal superposition between signals, and thus have higher detection accuracy; extra sampling resistors do not need to be arranged on a large current path, so that the power loss is low; and a voltage feedback loop and a current feedback loop can be realized by only adopting one current sampler, the circuit is simple, the circuit components are fewer, and the occupied area of the PCB is smaller.

Fig. 7 to 11 show examples of the step-down converting circuit according to the embodiment of the present disclosure, but it is understood that the step-down converting circuit is not limited thereto, but may have other step-down converting circuits as long as it can generate a detection signal representing an average current flowing through an inductor based on a detection signal representing an average current flowing through one power switching tube and a duty ratio of a control signal of the power switching tube. Although in fig. 7-11, the buck conversion circuit is shown to generate the detection signal representing the average current flowing through the inductor based on the detection signal representing the average current flowing through the high-side switch and the duty cycle of the control signal of the high-side switch, this is merely illustrative and not limiting of the scope of the present disclosure. In another embodiment, the buck conversion circuit may further generate the sense signal indicative of the average current flowing through the inductor based on a sense signal indicative of the average current flowing through the low-side switch and a duty cycle of a control signal of the low-side switch.

The technical scheme of the embodiment of the disclosure generates the detection signal representing the average current flowing through the inductor based on the detection signal representing the average current flowing through the power switch tube and the duty ratio of the control signal of the power switch tube, so that the current feedback loop can limit the average current flowing through the inductor to be not higher than the threshold current. Compared with a conventional voltage conversion circuit, the technical scheme of the embodiment of the disclosure has a simple structure, can reduce the loss of the voltage conversion circuit, and occupies a smaller PCB area.

The embodiments may be further described using the following clauses:

clause 1. a device (10, 10', 10 ") for detecting current, comprising:

a voltage converter (12, 42) comprising a first switch, a second switch and an inductor (L) and configured to charge or discharge the inductor (L) by alternately turning on the first switch and the second switch to convert an input voltage (V)_IN) Conversion to an output voltage (V)_OUT）；

A current detection circuit (14, 44) coupled to the voltage converter (12, 42) and configured to detect a first current detection signal (V) indicative of an average current flowing through the first switch_S1) And based on said first current detection signal (V)_S1) And the duty cycle of the control signal of the first switch to generate a second current detection signal (V) representing the average current flowing through the inductor (L)_S3) (ii) a And

a control circuit (16, 46) coupled to the voltage converter (12, 42) and the current detection circuit (14, 44) and configured to: detecting a signal (V) based on the second current in response to an average current flowing through the inductor (L) reaching a threshold current_S3) Adjusting a duty cycle of a control signal of the first switch such that an average current flowing through the inductor (L) is not higher than the threshold current.

Clause 2. the apparatus (10, 10', 10 ") for detecting current according to clause 1, wherein the current detection circuit (14, 44) comprises:

a current sampling circuit (32, 62) coupled to the first switch and configured to sample a current flowing through the first switch to generate the first current detection signal (V;)_S1) (ii) a And

a current signal generation circuit (33, 63) coupled to the current sampling circuit (32, 62) and the control circuit (16, 46) and configured to detect a signal (V) based on the first current_S1) And the duty cycle of the control signal of the first switch to generate the second current detection signal (V) provided to the control circuit (16, 46)_S3）。

Clause 3. the apparatus (10, 10', 10 ") for detecting current according to clause 2, wherein the current signal generating circuit (33, 63) comprises:

an operational amplifier (37, 67) having a first input coupled to the current sampling circuit (32, 62) to receive the first current detection signal (V), a second input and an output_S1）；

A third switch (Q3) coupled to the output;

a fourth switch (Q4) coupled to the third switch (Q3) and ground; and

a filter circuit (38, 68) coupled between a midpoint between the third switch (Q3) and the fourth switch (Q4) and the second input;

wherein the control circuit (16, 46) is further configured to: the first switch is turned on and off simultaneously with the third switch (Q3), and the second switch is turned on and off simultaneously with the fourth switch (Q4).

Clause 4. the apparatus (10, 10', 10 ") for detecting current according to clause 2, wherein the current sampling circuit (32, 62) comprises:

a current detector coupled to the first switch and configured to detect a signal indicative of electricity flowing through the first switchThird current detection signal (V) of current_S0) (ii) a And

an averaging circuit (36, 66) coupled to the current detector and the current signal generating circuit (33, 63) and configured to detect a signal (V) for the third current_S0) Averaging to generate the first current detection signal (V) supplied to the current signal generating circuit (33, 63)_S1）。

Clause 5. the apparatus (10, 10', 10 ") for detecting current according to clause 4, wherein the current detector comprises:

a current sampler (31, 61) coupled to the first switch and configured to sample a current flowing through the first switch to generate a fourth current detection signal (V;)_S) (ii) a And

a chopper circuit (35, 65) coupled to the current sampler (31, 61) and the averaging circuit (36, 66) and configured to detect a signal (V) for the fourth current_S) Chopping to generate the third current detection signal (V) provided to the averaging circuit (36, 66)_S0）。

Clause 6. the apparatus (10, 10', 10 ") for detecting current according to clause 1, wherein the current detection circuit (14, 44) is further configured to detect a third current detection signal (V) indicative of the current flowing through the first switch_S0) (ii) a And wherein the control circuit (16, 46) comprises:

a mode control circuit (20, 50) coupled to the voltage converter (12, 42) and the current detection circuit (14, 44) and configured to detect a signal (V) based on the second current_S3) The third current detection signal (V)_S0) And the output voltage (V)_OUT) Generating a pulse width modulation signal (S)_PWM) (ii) a And

a switching signal generator (22, 52) coupled to the mode control circuit (20, 50) and configured to modulate the signal (S) based on the pulse width_PWM) Anda clock signal (CLK) to alternately turn on the first switch and the second switch.

Clause 7. the apparatus (10, 10', 10 ") for detecting current according to clause 6, wherein the mode control circuit (20, 50) comprises:

a first error amplifier (24, 54) coupled to the voltage converter (12, 42) and configured to be based on the output voltage (V)_OUT) And a preset output voltage (V)_REF0) The difference between them to generate a compensation voltage (V)_COMP）；

A compensation voltage adjustment circuit coupled to the current detection circuit (14, 44) and the first error amplifier (24, 54) and configured to detect a signal (V) based on the second current_S3) To adjust said compensation voltage (V)_COMP) (ii) a And

a pulse width modulation signal generator (28, 58) coupled to the current detection circuit (14, 44), the first error amplifier (24, 54), the compensation voltage adjustment circuit, and the switching signal generator (22, 52) and configured to detect a voltage based on the third current detection signal (V [) and to generate a second compensation voltage based on the second compensation voltage_S0) And the compensation voltage (V)_COMP) Generating the pulse width modulated signal (S) provided to the switching signal generator (22, 52)_PWM）。

Clause 8. the apparatus (10, 10', 10 ") for detecting current according to clause 7, wherein the compensation voltage adjustment circuit comprises:

a second error amplifier (26, 56) coupled to the current detection circuit (14, 44) and configured to detect a signal (V) based on the second current_S3) And a reference voltage (V)_REF2) The difference between them to generate a regulated voltage (V)_EA2) (ii) a And

a diode (D1) having an anode and a cathode, the anode of the diode (D1) being coupled to the first error amplifier (24, 54) and the cathode of the diode (D1) being coupled to the second error amplifier (26, 56).

Clause 9. the apparatus (10, 10', 10 ") for detecting current according to clause 8, wherein the compensation voltage adjustment circuit is further configured to: based on the regulated voltage (V) when the diode (D1) is conducting_EA2) Adjusting the compensation voltage (V)_COMP）。

Clause 10. an electronic device (1), comprising:

a power supply device (2); and

the device (10, 10', 10 ") for detecting electric current according to any of clauses 1-9, the input voltage (V) being provided by the power supply device (2)_IN）。

Further, the present disclosure provides various example embodiments, as described and as shown in the accompanying drawings. However, the present disclosure is not limited to the embodiments described and illustrated herein, but may extend to other embodiments, as known or as would be known to those skilled in the art. Reference in the specification to "one embodiment," "the embodiment," "these embodiments," or "some embodiments" means that a particular feature, structure, or characteristic described is included in at least one embodiment, and the appearances of the phrases in various places in the specification are not necessarily all referring to the same embodiment.

Finally, although various embodiments have been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended drawings is not necessarily limited to the specific features or acts described. Rather, the specific features and acts are disclosed as example forms of implementing the claimed subject matter.

Claims

1. An apparatus for detecting current, comprising:

a voltage converter including a first switch, a second switch, and an inductor, and configured to charge or discharge the inductor by alternately turning on the first switch and the second switch to convert an input voltage into an output voltage;

a current detection circuit coupled to the voltage converter and configured to detect a first current detection signal representative of an average current flowing through the first switch and generate a second current detection signal representative of an average current flowing through the inductor based on the first current detection signal and a duty cycle of a control signal of the first switch; and

a control circuit coupled to the voltage converter and the current detection circuit and configured to: adjusting a duty cycle of a control signal of the first switch based on the second current detection signal in response to an average current flowing through the inductor reaching a threshold current such that the average current flowing through the inductor is not higher than the threshold current.

2. The apparatus of claim 1, wherein the current detection circuit comprises:

a current sampling circuit coupled to the first switch and configured to sample a current flowing through the first switch to generate the first current detection signal; and

a current signal generation circuit coupled to the current sampling circuit and the control circuit and configured to generate the second current detection signal provided to the control circuit based on the first current detection signal and a duty cycle of a control signal of the first switch.

3. The apparatus of claim 2, wherein the current signal generating circuit comprises:

an operational amplifier having a first input coupled to the current sampling circuit to receive the first current detection signal, a second input, and an output;

a third switch coupled to the output;

a fourth switch coupled to the third switch and ground; and

a filter circuit coupled between an intermediate point between the third switch and the fourth switch and the second input terminal;

wherein the control circuit is further configured to: the first switch is turned on and off simultaneously with the third switch, and the second switch is turned on and off simultaneously with the fourth switch.

4. The apparatus of claim 2, wherein the current sampling circuit comprises:

a current detector coupled to the first switch and configured to detect a third current detection signal indicative of a current flowing through the first switch; and

an averaging circuit coupled to the current detector and the current signal generation circuit and configured to average the third current detection signal to generate the first current detection signal provided to the current signal generation circuit.

5. The apparatus of claim 4, wherein the current detector comprises:

a current sampler coupled to the first switch and configured to sample a current flowing through the first switch to generate a fourth current detection signal; and

a chopping circuit coupled to the current sampler and the averaging circuit and configured to chop the fourth current detection signal to generate the third current detection signal provided to the averaging circuit.

6. The apparatus of claim 1, wherein the current detection circuit is further configured to detect a third current detection signal representative of a current flowing through the first switch; and wherein the control circuit comprises:

a mode control circuit coupled to the voltage converter and the current detection circuit and configured to generate a pulse width modulated signal based on the second current detection signal, the third current detection signal, and the output voltage; and

a switching signal generator coupled to the mode control circuit and configured to alternately turn on the first switch and the second switch based on the pulse width modulation signal and a clock signal.

7. The apparatus of claim 6, wherein the mode control circuit comprises:

a first error amplifier coupled to the voltage converter and configured to generate a compensation voltage based on a difference between the output voltage and a preset output voltage;

a compensation voltage adjustment circuit coupled to the current detection circuit and the first error amplifier and configured to adjust the compensation voltage based on the second current detection signal; and

a pulse width modulation signal generator coupled to the current detection circuit, the first error amplifier, the compensation voltage adjustment circuit, and the switching signal generator and configured to generate the pulse width modulation signal provided to the switching signal generator based on the third current detection signal and the compensation voltage.

8. The apparatus of claim 7, wherein the compensation voltage adjustment circuit comprises:

a second error amplifier coupled to the current detection circuit and configured to generate a regulated voltage based on a difference between the second current detection signal and a reference voltage; and

a diode having an anode and a cathode, the anode of the diode coupled to the first error amplifier and the cathode of the diode coupled to the second error amplifier.

9. The apparatus of claim 8, wherein the compensation voltage adjustment circuit is further configured to: adjusting the compensation voltage based on the adjustment voltage when the diode is conducting.

10. An electronic device, comprising:

a power supply device; and

the apparatus of any of claims 1-9, the input voltage being provided by the power supply.