CN107171536A - Control circuit and switch converters - Google Patents
Control circuit and switch converters Download PDFInfo
- Publication number
- CN107171536A CN107171536A CN201710441195.7A CN201710441195A CN107171536A CN 107171536 A CN107171536 A CN 107171536A CN 201710441195 A CN201710441195 A CN 201710441195A CN 107171536 A CN107171536 A CN 107171536A
- Authority
- CN
- China
- Prior art keywords
- signal
- switch
- circuit
- output
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
Disclose a kind of control circuit and switch converters, by causing reference signal to change with output signal, simultaneously, so that the slope of ramp signal changes with input signal and FM signal, thus, input signal and FM signal can be incorporated into the control loop of the master power switch of power stage circuit shut-off time point simultaneously so that switch converters can also be to the saltus step quick response of input signal while switch periods are adjustable.
Description
Technical field
The present invention relates to Power Electronic Technique, and in particular to a kind of control circuit and apply its switch converters.
Background technology
The switch converters controlled with fixing ON time (Constant On Time, COT) mode can not only be maintained
Switching frequency is approximately constant during stable state, and in output loading saltus step with the instantaneous ability for changing dutycycle.This causes this
Class switch converters have more preferable dynamic response characteristic.In this control mode, produce ON time reference signal with
And the current source of ramp signal can have two kinds of different configuration modes.A kind of is the independent electrical for being configured to current source fixed value
Stream source, another is the controlled current source that current source is configured to be controlled by input voltage.In reference signal or ramp signal
Middle introducing input voltage relevant information allows circuit to respond quickly to the saltus step of input voltage and change.But, for opening
Pass cycle (namely switching frequency) adjustable fixed ON time control circuit, it is impossible to which input electricity is introduced directly into existing mode
Pressure, this causes the fixation ON time of Frequency Adjustable to control circuit to be difficult to faster response speed.
The content of the invention
In view of this, the present invention provides a kind of control circuit and switch converters, to cause switch converters in switch week
Can also be to the saltus step quick response of input signal while phase is adjustable.
Circuit is controlled there is provided one kind according to the first aspect of the invention, for the power stage circuit of controlling switch converter,
The control circuit includes：
Reference signal generative circuit, the reference signal that the output signal of the switch converters changes is followed for generating；
Ramp signal generative circuit, for generating the slope letter that slope follows the input signal and FM signal to change
Number；And
Comparator, generates the first control signal, when the ramp signal for comparing the reference signal and ramp signal
When reaching the reference signal, first control signal controls the master power switch of the power stage circuit to be cut by first state
The second state is shifted to, stationary value is maintained with the output signal for controlling the switch converters, and cause the master power switch
Switching frequency it is unrelated with the input signal and follow the FM signal to change.
Preferably, the power stage circuit is buck topology (BUCK)；
The dutycycle of the switch controlling signal of the reference signal and the output signal and the master power switch into
Ratio；
The peak value of the ramp signal and the input signal, FM signal and the master power switch are in described the
The time of one state is proportional.
Preferably, the reference signal generative circuit includes：
First controlled current source, for generating first electric current proportional to the input signal；
On first switch and first resistor, the electric current output channel for being connected on first controlled current source, wherein, it is described
First switch is synchronous with the master power switch to carry out state switching；And
Filter circuit, for being filtered the output reference signal to the first resistor both end voltage.
Preferably, the reference signal generative circuit also includes：
First multiplier, for first electric current to be multiplied by into the string constituted after predetermined value to first switch and first resistor
Join circuit output.
Preferably, the filter circuit includes：
Second electric capacity, is connected between the input of filter circuit and earth terminal；
Second resistance, is connected between the input of filter circuit and output end；And
3rd electric capacity, is connected between the output and ground of filter circuit.
Preferably, the ramp signal generative circuit includes：
Second controlled current source, for generating second electric current proportional to the input signal；
On second multiplier, the output channel for being arranged on second electric current, for being multiplied by sign to second electric current
Exported after the signal of FM signal；
Between 3rd electric capacity and second switch, the output and ground for being connected in second multiplier in parallel, wherein,
The second switch carries out state switching to generate the ramp signal in the mode opposite with the first switch.
Preferably, the control circuit also includes：
FM signal generative circuit, for generating the FM signal；
Wherein, the FM signal generative circuit includes：
Transistor, is arranged on current path, for producing the FM signal；
First error amplifier, input reference signal and current feedback signal, output end are connected to the grid of the transistor
Pole；And
Adjustable resistance, is arranged on current path, and both end voltage is input to the first error as current feedback signal and amplified
Device.
Preferably, the control circuit also includes：
Second control signal generative circuit, for the output feedback signal according to the switch converters and output with reference to letter
Number generation the second control signal,
When the output feedback signal reaches the output reference signal, second control signal controls the main work(
Rate switch switches to first state by the second state
According to the second aspect of the invention there is provided a kind of switch converters, including：
Power stage circuit；And,
Control circuit as described above.
By causing reference signal to change with output signal, simultaneously so that the slope of ramp signal is with input signal and tune
Frequency signal intensity, thus, it is possible to which the master power switch that input signal and FM signal are incorporated into power stage circuit simultaneously is turned off
In the control loop of time point so that switch converters can also be quick to the saltus step of input signal while switch periods are adjustable
Response.
Brief description of the drawings
By description referring to the drawings to the embodiment of the present invention, above-mentioned and other purpose of the invention, feature and
Advantage will be apparent from, in the accompanying drawings：
Fig. 1 is the local circuit schematic diagram according to the switch converters of the first comparative example；
Fig. 2 is the working waveform figure of the switch converters according to the first comparative example；
Fig. 3 is the working waveform figure in the case of input voltage saltus step according to the switch converters of the first comparative example；
Fig. 4 is the switch converters according to the setting fixed current source of prior art in the case of input voltage saltus step
Working waveform figure；
Fig. 5 is the local circuit schematic diagram according to the switch converters of the second comparative example；
Fig. 6 is the working waveform figure of the switch converters according to the second comparative example；
Fig. 7 is the local circuit schematic diagram of the switch converters of the embodiment of the present invention；
Fig. 8 is the working waveform figure of the switch converters of the embodiment of the present invention；
Fig. 9 is the controling parameter flow graph of the control circuit of the switch converters of the embodiment of the present invention.
Embodiment
Below based on embodiment, present invention is described, but the present invention is not restricted to these embodiments.Under
Text is detailed to describe some specific detail sections in the detailed description of the present invention.Do not have for a person skilled in the art
The description of these detail sections can also understand the present invention completely.In order to avoid obscuring the essence of the present invention, known method, mistake
Journey, flow, element and circuit do not have detailed narration.
In addition, it should be understood by one skilled in the art that provided herein accompanying drawing be provided to explanation purpose, and
What accompanying drawing was not necessarily drawn to scale.
It will also be appreciated that in the following description, " circuit " refers to be passed through by least one element or sub-circuit electric
The galvanic circle that connection or electromagnetism are connected and composed." connected when claiming element or circuit " being connected to " another element or element/circuit
" between two nodes when, it can directly be coupled or be connected to another element or there may be intermediary element, element it
Between connection can be physically, in logic or its combination.On the contrary, " connecting when title element " being directly coupled to " or directly
Be connected to " another element when, it is meant that both be not present intermediary element.
Unless the context clearly requires otherwise, otherwise entire disclosure is similar with the " comprising " in claims, "comprising" etc.
Word should be construed to the implication included rather than exclusive or exhaustive implication；That is, being containing for " including but is not limited to "
Justice.
In the description of the invention, it is to be understood that term " first ", " second " etc. be only used for describe purpose, without
It is understood that to indicate or imply relative importance.In addition, in the description of the invention, unless otherwise indicated, the implication of " multiple "
It is two or more.
Fig. 1 is the local circuit schematic diagram according to the switch converters of the first comparative example.As shown in figure 1, switch converters
Including control circuit 1 and power stage circuit.Wherein, power stage circuit uses buck topology (BUCK).In Fig. 1, it illustrate only
Master power switch HS and rectifier switch LS, the inductance and electric capacity of not shown power stage circuit.Circuit 1 is controlled to be given birth to including reference signal
Into the generation of circuit 11, ramp signal generative circuit 12, comparator 13, the second control signal generative circuit 14 and switch controlling signal
Circuit 15.Wherein, reference signal generative circuit 11 includes controlled current source CCS1, switch K1, resistance R1 and a filter circuit.
Controlled current source CCS1 is controlled by the electric current Iref that input voltage vin output is proportional to.Switch K1 be controlled by signal PWM with
Master power switch HS synchronization turn-on and turn-off.Resistance R1 is connected between switch K1 and earth terminal.Filter circuit is configured as " π "
The RC filter circuits of shape.Thus, electric current Iref flows through resistance R1 formation voltage drops under switch K1 control.Filter circuit is to electricity
Hinder the voltage on R1 and carry out average output reference signal kVout.Reference signal kVout is met：
KVout=Iref*R1*D.
Meanwhile, ramp signal generative circuit 12 includes controlled current source CCS2, electric capacity C1 and switch K2.Controlled current source
CCS2 is controlled by the electric current Iramp that input voltage vin output is proportional to.Electric capacity C1 and switch K2 are connected in controlled electricity in parallel
Between stream source CCS2 current output terminal and earth terminal.Switch K2 is controlled by signal PWMB with the side opposite with master power switch HS
Formula turn-on and turn-off.Thus, when master power switch HS is turned on, switch K1 conductings, switch K2 shut-offs.Closed in master power switch HS
When disconnected, switch K1 shut-offs, switch K2 conductings.When switching K2 shut-offs, electric capacity C1 is charged by electric current Iramp so that voltage Vcap
Linear rise.When switching K2 conductings, electric capacity C1 is short-circuited electric discharge so that voltage Vcap rapidly drops to zero, and under continueing to
Once switch K2 shut-offs.Thus voltage Vcap has the waveform of ramp shaped, hereinafter referred to as ramp signal.
Meanwhile, comparator 13 is used for benchmark signal kVout and ramp signal Vcap.Switching signal generative circuit includes
Rest-set flip-flop and drive circuit.The reset terminal of rest-set flip-flop is connected with the output end of comparator 13, output signal PWM and signal
PWMB, signal PWM and signal PWMB are anti-phase.When ramp signal Vcap rises above reference signal kVout, comparator 13 is defeated
Go out signal so that rest-set flip-flop resets, signal PWM is reset, and then master power switch HS is turned off.
Meanwhile, the second control signal generative circuit 14 is according to the feedback voltage FB and reference voltage of power stage circuit
0.6Vref controls rest-set flip-flop set, so as to control the opportunity that master power switch is turned on.
The drive circuit of switch controlling signal generative circuit 15 is used to be generated according to signal PWM in master power switch HS
Control signal Vgs and the control signal to rectifier switch LS.
Fig. 2 is the working waveform figure of the switch converters according to the first comparative example.With reference to Fig. 1 and Fig. 2, in control signal
Vgs is low level, when master power switch HS is off state, and switch K2 conductings, ramp signal Vcap remains zero.Now work(
The output voltage Vout continuous decreases of rate level circuit so that characterize output voltage Vout feedback voltage FB also continuous decrease.
When feedback voltage FB drops to 0.6 times (0.6Vref) of reference voltage, rest-set flip-flop is set.The output signal of rest-set flip-flop
PWM switches to high level so that control signal Vgs switches to high level.Master power switch HS switches to conducting.Accordingly, open
Close K2 and switch to shut-off, ramp signal Vcap is begun to ramp up by zero.When ramp signal Vcap rises to reference signal kVout,
The output signal reset saltus steps of comparator 13 are high level.Master power switch HS control signal Vgs is reset, and main power is opened
Close HS shut-offs, so circulation.ON time Tons of the master power switch HS in each switch periods is equal to ramp signal Vramp
By the time above freezing for being raised to reference signal kVout.Therefore, in the case where input voltage vin keeps stable, each switch periods
ON time Ton it is constant.
When there is saltus step in input voltage vin, the switch converters of the first comparative example and the setting fixation in control circuit
The working waveform figure difference of the switch converters of current source is as shown in Figure 3 and Figure 4.As shown in figure 4, for reference signal and tiltedly
The control circuit that slope signal does not change with input voltage vin, when there is saltus step in input voltage, reference signal V1 and slope letter
Number V2 keeps constant.This make it that the ON time Ton1 before and after saltus step is identical with Ton2.Input voltage vin after saltus step can
To inject more energy to power stage circuit in identical ON time, this can cause output voltage rapid increase.Switch
The time that converter adapts to input voltage saltus step is longer.And in figure 3, for the switch change-over described in the first above-mentioned comparative example
Device, due to reference signal kVout=Iref*R1*D, wherein, D is the dutycycle of switch converters, and reference signal kVout can be with
Characterize the output voltage Vout of power stage circuit.Meanwhile, ramp signal Vcap=Iramp*t/C1, wherein, t opens for ramp signal
Begin the time risen.Ramp signal Vcap peak value is equal to Iramp*Ton/C1, and it is equal to reference signal kVout.Thus, it is possible to
Derived as follows：
Iref*R1*D=Iramp*Ton/C1
And then：Iref*R1* (Ton/T)=Iramp*Ton/C1, wherein, T is switch periods.
Switch periods T is met：T=R1*C1* (Iref/Iramp)
Electric current Iref and electric current Iramp are proportional to input voltage vin, therefore, and switch periods T is not with Vin change
And change.
Because after input voltage vin saltus step, the dutycycle D of switch converters can correspondingly reduce, so, reference signal
KVout change is smaller.And slope Iramp*C1 saltus steps with the saltus step of input voltage vin of ramp signal, this causes conducting
The saltus step of time Ton.Ton2 is less than between the conducting before input voltage vin saltus step between conducting after input voltage vin saltus step
Ton1.The energy reduction of power stage circuit is input in each switch periods.Thus, fixed ON time control can both have been inherited
The advantage of the intrinsic faster output dynamic response of mode, can enable ON time change in time to input voltage vin again
Corresponding change is made in change, output voltage is had quick response speed to input voltage saltus step.
But, the first comparative example can not realize that switch periods are adjustable, that is, the switch frequency of master power switch can not be adjusted
Rate.
Fig. 5 is the local circuit schematic diagram according to the switch converters of the second comparative example.As shown in figure 5, switch converters
Including control circuit 2 and power stage circuit.Wherein, power stage circuit uses buck topology.In Figure 5, it illustrate only main power
Switch HS and rectifier switch LS, the inductance and electric capacity of not shown power stage circuit.Circuit 2 is controlled to include reference signal generative circuit
21st, ramp signal generative circuit 22, comparator 23, the second control signal generative circuit 24 and switch controlling signal generative circuit
25.Wherein, comparator 23, the second control signal generative circuit 24 and switch controlling signal generative circuit 25 and the first comparative example phase
Together.Meanwhile, reference signal generative circuit 21 has the structure similar with the reference signal generative circuit 11 of the first comparative example.It is different
It is, controlled current source is replaced with the current source CS1 with fixed output valve by reference signal generative circuit 21.In ramp signal
In generative circuit 22, controlled current source is replaced by the output valve current source CCS3 proportional to FM signal Ifs.Current source
The electric current Iramp of CCS3 outputs is A times of FM signal Ifs.This can be realized by a current-mirror structure.FM signal
Ifs can be generated by FM signal generative circuit 26.FM signal generative circuit 26 includes transistor Q, error amplifier EA
With adjustable resistance Rfs.Error amplifier EA is controlled according to the error between voltage drop in reference voltage Vref and adjustable resistance Rfs
System works in the transistor Q output FM signals Ifs of linear condition.By adjusting adjustable resistance Rfs, it is possible to adjust frequency modulation letter
Number Ifs, and then adjust the electric current Iramp in ramp signal generative circuit 22.
Fig. 6 is the working waveform figure of the switch converters according to the second comparative example.As shown in fig. 6, being in control signal Vgs
Low level, when master power switch HS is off state, switch K2 conductings, ramp signal Vcap remains zero.Now power stage
The output voltage Vout continuous decreases of circuit so that characterize output voltage Vout feedback voltage FB also continuous decrease.In feedback
When voltage FB drops to 0.6 times of reference voltage Vref, rest-set flip-flop is set.The output signal PWM of rest-set flip-flop is switched to
High level so that control signal Vgs switches to high level.Master power switch HS switches to conducting.Accordingly, switch K2 is switched to
Shut-off, ramp signal Vcap is begun to ramp up by zero.When ramp signal Vcap rises to reference signal kVout, comparator 23
Output signal reset saltus steps are high level.Master power switch HS switch controlling signal Vgs is reset, and master power switch HS is closed
It is disconnected, so circulation.ON time Tons of the master power switch HS in each switch periods is equal to ramp signal Vramp by above freezing
It is raised to reference signal kVout time.
Similar with the first comparative example, reference signal kVout and ramp signal Vcap peak value are equal.Thus, Iref*R1*D
=Iramp*Ton/C1
And then, Iref*R1*D=A*Ifs*Ton/C=A*Vref*Ton/ (Rfs*C1)
And then, Iref*R1* (Ton/T)=A*Vref*Ton/ (Rfs*C1), wherein, T is switch periods.
Thus, switch periods T is met：T=R1*C1*Rfs*Iref/ (A*Vref)
Because electric current Iref is fixed value in the second comparative example, therefore, switch periods can be by adjusting adjustable resistance
Rfs resistance is adjusted.
But, the switch converters of the second comparative example can not quick response input voltage vin change.Meanwhile, if simple
Current source in reference signal generative circuit is changed to controlled current source by single ground, then can cause switch periods simultaneously by input electricity
Press Vin and adjustable resistance Rfs influence so that the switch periods of switch converters are out of control.
Fig. 7 is the local circuit schematic diagram of the switch converters of the embodiment of the present invention.Fig. 8 is the switch change-over of the present embodiment
The working waveform figure of device.As shown in Figure 7 and Figure 8, the switch converters of the present embodiment include control circuit 3 and power stage circuit.
Wherein, power stage circuit uses buck topology.In the figure 7, master power switch HS and rectifier switch LS, not shown work(be illustrate only
The inductance and electric capacity of rate level circuit.Control circuit 3 includes reference signal generative circuit 31, ramp signal generative circuit 32, compared
Device 33, the second control signal generative circuit 34 and switch controlling signal generative circuit 35.Wherein, the control of comparator 33, second letter
The comparative example of number generative circuit 34 and switch controlling signal generative circuit 35 with more than is identical, will not be repeated here.It should be understood that the
Two control signal generative circuits 32 are not limited to the mode described in text, and those skilled in the art can use other equivalent sides
Formula or existing mode are to generate the second control signal to control master power switch HS conducting opportunity.
In the present embodiment, reference signal generative circuit 31 is used to generate the output voltage for following the switch converters
The reference signal kVout of Vout changes.Ramp signal generative circuit 32 is used to generate slope with input voltage vin and FM signal
The ramp signal Vcap of Ifs changes.The benchmark signal kVout of comparator 33 and ramp signal Vcap generates the first control signal
Reset, when ramp signal Vcap rises to reference signal kVout, the first control signal reset control master power switch HS by
Conducting switches to shut-off, keeps stable with the output voltage Vout of controlling switch converter, and cause opening for master power switch HS
Pass frequency is unrelated with input signal Vin and changes with FM signal Ifs.
Specifically, reference signal generative circuit 31 include controlled current source CCS4, multiplier M1, switch K3, resistance R2 and
Filter circuit.Wherein, controlled current source CCS4 is used to generate the electric current Ivin1 proportional to input voltage vin.Multiplier M1 is used
In being multiplied by predetermined value Idc to electric current Ivin1, to generate an electric current Iref1 proportional to input voltage vin.Switch K3 and
Resistance R2 is connected on electric current Iref1 current path.Switch K3 be controlled by signal PWM carry out state switching, that is, with main work(
Rate switch is synchronous to carry out state switching.Filter circuit is the RC filter circuits of " π " shape.Thus, controls of the electric current Iref1 in switch K3
Resistance R2 formation voltage drops are flowed through under system.Filter circuit carries out average output reference signal kVout to the voltage on resistance R2.Base
Calibration signal kVout is met：
KVout=Iref1*R2*D=Vin*m*R2*Idc*D.
Wherein, D is the dutycycle of switch converters, and m*Vin is equal to Ivin1.Due to the switch converters in buck topology
In, Vin*D=Vout, therefore, kVout are proportional to output voltage Vout.
Ramp signal generative circuit 32 includes controlled current source CCS5, multiplier M2, switch K4 and electric capacity C2.Wherein, by
Controlling current source CCS5 is used to generate the electric current Ivin2 proportional to input voltage vin.Multiplier M2 is arranged on electric current Ivin2's
On output channel, for being multiplied by A*Ifs output currents Iramp1 after the signal for characterizing FM signal Ifs to electric current Ivin2.At this
In embodiment, multiplier M2 is multiplied by the electric current A*Ifs proportional to FM signal Ifs to electric current Ivin2.It is input to multiplier M2
Electric current A*Ifs can be realized by a current mirror.FM signal Ifs can be given birth to by FM signal generative circuit 26
Into.FM signal generative circuit 36 includes transistor Q1, error amplifier EA1 and adjustable resistance Rfs.Error amplifier EA1 roots
The transistor Q1 for working in linear condition is controlled to export frequency modulation according to the error of pressure drop in reference voltage Vref and adjustable resistance Rfs
Signal Ifs.By adjusting adjustable resistance Rfs, it is possible to adjust FM signal Ifs, and then adjust ramp signal generative circuit 32
In electric current Iramp1.
Electric capacity C2 and switch K4 are connected in multiplier M2 output end in parallel (while being also whole ramp signal generative circuit
32 output) between earth terminal.Switch K4 is controlled by the signal PWMB anti-phase with signal PWM, with the side opposite with switch K3
Formula carries out state switching.Thus, during master power switch HS is turned on, switch K4 shut-offs, electric current Iramp1 charges to electric capacity C2,
So that ramp signal Vcap linear rises.When ramp signal Vcap rises to reference signal kVout, the letter that comparator 33 is exported
Number reset switches to the rest-set flip-flop in high level, reset switch control signal generative circuit 35.The signal of rest-set flip-flop output
PWM switches to low level, and then causes switch controlling signal Vgs to switch to low level.Master power switch HS controlled shutdowns.Switch
K4 is turned on so that ramp signal Vcap jumps vanishing, and continues to that switch K4 is turned off next time, so circulation.
Fig. 9 is the controling parameter flow graph of the control circuit of the switch converters of the embodiment of the present invention.As shown in figure 9, in base
In calibration signal generative circuit 31, controlled current source CCS4 is based on input voltage vin generation electric current Ivin1.Multiplier M1 input electricity
Flow Ivin1 and predetermined value Idc, output current Iref1 after both are multiplied.Electric current Iref1 flows through electricity after being modulated via switch K3
The average voltage (namely reference signal) that resistance R2 is formed meets kVout=Iref1*R1*D.As described above, reference signal
KVout substantially changes with output voltage Vout.
In ramp signal generative circuit 32, controlled current source CCS4 is based on input voltage vin generation electric current Ivin2.Multiply
The musical instruments used in a Buddhist or Taoist mass M2 input currents Ivin2 and signal A*Ifs=A*Vref/Rfs output currents Iramp1 for characterizing FM signal.Switch K4
By switching between turn-on and turn-off state so that electric current Iramp1 controllably charges to electric capacity C2, forms ramp signal Vcap,
Its peak value meets Iramp1*Ton/C2.
As described above, in control circuit 3, the peak value of ramp signal is equal to reference signal kVout.Thus, each parameter is expired
Foot：
Vin*m*R2*Idc*Ton/T=Vin*m*A*Vref*Ton/ (Rfs*C2)
Wherein, T is switch periods, and Ton is ON time, and Vref is reference voltage.
Thus, switch periods T is met：
T=R2*C2*Rfs*Idc/ (A*Vref)
Thus, switch periods T (other parameters are fixed amount) related only to the resistance Rfs of adjustable resistance, with adjustable
Resistance Rfs changes.
Meanwhile, when input voltage vin produces saltus step, because reference signal kVout changes with output voltage Vout, therefore
Change is smaller.And the slope Iramp1/C2=m*Vin*A*Vref/ (Rfs*C2) of ramp signal changes with input voltage vin.Cause
This, the slope of ramp signal increases with input voltage saltus step.This causes ramp signal to be climbed to reference signal during this period,
ON time Ton shortens accordingly.Thus, it is possible to while switch periods are adjustable, realize for the fast of input voltage change
Speed response.
It should be understood that in order to make it easy to understand, above derived by taking Ivin1=Ivin2=m*Vin as an example, still, electric current
Ivin1 and Ivin2 obviously can also be arranged to unequal, as long as both of which is proportional to input voltage vin.
Meanwhile, it can be seen from above-mentioned analysis, the electric current Iref1=m*Vin*Idc of multiplier M1 outputs.Because m and Idc are equal
For changeless value, therefore, via the multiplier M1 electric current Iref1 generated be actually also one with input voltage vin into
The electric current of ratio, this can be realized by single controlled current source.Therefore, in a deformation of above-described embodiment, multiply
Musical instruments used in a Buddhist or Taoist mass M1 can be omitted.
It should also be understood that in the above-described embodiments, multiplier M1 presence can ensure reference signal generative circuit 31 and oblique
The time delay in response to input voltage vin change process of slope signal generating circuit 32 is essentially identical, so as to improve whole electricity
The accuracy on road.
The embodiment of the present invention is by causing reference signal to change with output signal, simultaneously so that the slope of ramp signal with
Input signal and FM signal change, thus, it is possible to which input signal and FM signal to be incorporated into the master of power stage circuit simultaneously
In the control loop of power switch shut-off time point so that switch converters can also be believed input while switch periods are adjustable
Number saltus step quick response.
It should also be understood by those skilled in the art that illustrated above by taking the switch converters of buck topology as an example, but this
The principle of inventive embodiments can also change applied to using input current be input signal and/or using output current as output signal
Switch converters, can also be applied to have other topological switch converters.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for those skilled in the art
For, the present invention can have various changes and change.It is all any modifications made within spirit and principles of the present invention, equivalent
Replace, improve etc., it should be included in the scope of the protection.
Claims (9)
1. one kind control circuit, for the power stage circuit of controlling switch converter, the control circuit includes：
Reference signal generative circuit, the reference signal that the output signal of the switch converters changes is followed for generating；
Ramp signal generative circuit, for generating the ramp signal that slope follows the input signal and FM signal to change；With
And
Comparator, generates the first control signal, when the ramp signal reaches for comparing the reference signal and ramp signal
During the reference signal, first control signal controls the master power switch of the power stage circuit to be switched to by first state
Second state, is maintained stationary value, and cause opening for the master power switch with the output signal for controlling the switch converters
Pass frequency is unrelated with the input signal and follows the FM signal to change.
2. control circuit according to claim 1, it is characterised in that the power stage circuit is buck topology (BUCK)；
The reference signal is proportional to the dutycycle of the output signal and the switch controlling signal of the master power switch；
The peak value of the ramp signal is in first shape with the input signal, FM signal and the master power switch
The time of state is proportional.
3. control circuit according to claim 2, it is characterised in that the reference signal generative circuit includes：
First controlled current source, for generating first electric current proportional to the input signal；
On first switch and first resistor, the electric current output channel for being connected on first controlled current source, wherein, described first
Switch progress state switching synchronous with the master power switch；And
Filter circuit, for being filtered the output reference signal to the first resistor both end voltage.
4. control circuit according to claim 3, it is characterised in that the reference signal generative circuit also includes：
First multiplier, for first electric current to be multiplied by into the series electrical constituted after predetermined value to first switch and first resistor
Road is exported.
5. control circuit according to claim 3, it is characterised in that the filter circuit includes：
Second electric capacity, is connected between the input of filter circuit and earth terminal；
Second resistance, is connected between the input of filter circuit and output end；And
3rd electric capacity, is connected between the output and ground of filter circuit.
6. the control circuit according to any one of claim 3-5, it is characterised in that the ramp signal generative circuit bag
Include：
Second controlled current source, for generating second electric current proportional to the input signal；
On second multiplier, the output channel for being arranged on second electric current, for being multiplied by sign frequency modulation to second electric current
Exported after the signal of signal；
Between 3rd electric capacity and second switch, the output and ground for being connected in second multiplier in parallel, wherein, it is described
Second switch carries out state switching to generate the ramp signal in the mode opposite with the first switch.
7. control circuit according to claim 6, it is characterised in that the control circuit also includes：
FM signal generative circuit, for generating the FM signal；
Wherein, the FM signal generative circuit includes：
Transistor, is arranged on current path, for producing the FM signal；
First error amplifier, input reference signal and current feedback signal, output end are connected to the grid of the transistor；With
And
Adjustable resistance, is arranged on current path, and both end voltage is input to the first error amplifier as current feedback signal.
8. the control circuit stated according to claim 1, it is characterised in that the control circuit also includes：
Second control signal generative circuit, for the output feedback signal according to the switch converters and output reference signal life
Into the second control signal,
When the output feedback signal reaches the output reference signal, second control signal controls the main power to open
Pass switches to first state by the second state.
9. a kind of switch converters, including：
Power stage circuit；And,
Control circuit as any one of claim 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710441195.7A CN107171536B (en) | 2017-06-13 | 2017-06-13 | Control circuit and switch converters |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710441195.7A CN107171536B (en) | 2017-06-13 | 2017-06-13 | Control circuit and switch converters |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107171536A true CN107171536A (en) | 2017-09-15 |
| CN107171536B CN107171536B (en) | 2019-11-05 |
Family
ID=59825288
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710441195.7A Active CN107171536B (en) | 2017-06-13 | 2017-06-13 | Control circuit and switch converters |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107171536B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109004812A (en) * | 2018-07-03 | 2018-12-14 | 矽力杰半导体技术(杭州)有限公司 | Switch converters and its control circuit and control method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102412708A (en) * | 2011-12-28 | 2012-04-11 | 成都芯源***有限公司 | Switch converter and control circuit and control method thereof |
| CN102522880A (en) * | 2011-12-07 | 2012-06-27 | 西安启芯微电子有限公司 | Slope compensation circuit with frequency self-adaptation function |
| CN103138577A (en) * | 2011-11-21 | 2013-06-05 | 英特赛尔美国有限公司 | System and method of maintaining gain linearity of variable frequency modulator |
| CN104578774A (en) * | 2014-12-31 | 2015-04-29 | 矽力杰半导体技术(杭州)有限公司 | Step-down converter based on output voltage ripple control |
| CN106712509A (en) * | 2016-12-21 | 2017-05-24 | 深圳市华星光电技术有限公司 | Power circuit and liquid crystal display |
-
2017
- 2017-06-13 CN CN201710441195.7A patent/CN107171536B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103138577A (en) * | 2011-11-21 | 2013-06-05 | 英特赛尔美国有限公司 | System and method of maintaining gain linearity of variable frequency modulator |
| CN102522880A (en) * | 2011-12-07 | 2012-06-27 | 西安启芯微电子有限公司 | Slope compensation circuit with frequency self-adaptation function |
| CN102412708A (en) * | 2011-12-28 | 2012-04-11 | 成都芯源***有限公司 | Switch converter and control circuit and control method thereof |
| CN104578774A (en) * | 2014-12-31 | 2015-04-29 | 矽力杰半导体技术(杭州)有限公司 | Step-down converter based on output voltage ripple control |
| CN106712509A (en) * | 2016-12-21 | 2017-05-24 | 深圳市华星光电技术有限公司 | Power circuit and liquid crystal display |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109004812A (en) * | 2018-07-03 | 2018-12-14 | 矽力杰半导体技术(杭州)有限公司 | Switch converters and its control circuit and control method |
| US10826380B2 (en) | 2018-07-03 | 2020-11-03 | Silergy Semiconductor Technology (Hangzhou) Ltd | Switching converter, circuit and method for controlling the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107171536B (en) | 2019-11-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103023326B (en) | Constant time control method, control circuit and switching regulator using same | |
| CN104092360B (en) | Transconductance adjusting circuit, transconductance error amplifying unit and switching power converter | |
| CN100481701C (en) | Circuit for controlling switch power supply | |
| Lai et al. | A general constant-frequency pulsewidth modulator and its applications | |
| CN106788398A (en) | Clock division circuits, control circuit and power management integrated circuit | |
| US9684320B2 (en) | DC-DC converter and method for controlling the same and power supply of energy storage system including the same DC-DC converter | |
| CN102255504B (en) | Switch control circuit and method thereof | |
| CN105048808A (en) | Voltage conversion circuit, method and polyphase parallel power supply system | |
| CN102386659B (en) | Charging management circuit | |
| CN102158069A (en) | Power factor correction circuit | |
| CN103053102A (en) | Reducing ripple current in a switched-mode power converter employing a bridge topology | |
| KR101749292B1 (en) | Negative current sense feedback for reverse boost mode | |
| CN111245238B (en) | Three-level Boost circuit control method and system | |
| CN110957894A (en) | Load current detection method and circuit of inductive switching power converter | |
| CN104333203A (en) | Frequency-locking circuit and switch power supply control circuit | |
| CN107026568A (en) | control circuit, control method and switching power supply | |
| CN105162325B (en) | Pulse frequency modulation circuit based on reference voltage comparison oscillator | |
| CN204089595U (en) | Power inverter | |
| CN105811755B (en) | A kind of step down switching voltage regulator improving transient response | |
| CN202384784U (en) | Charging management circuit | |
| CN107171536A (en) | Control circuit and switch converters | |
| CN105226935A (en) | Warbled Switching Power Supply is realized based on divided oscillator device | |
| CN105305817A (en) | Switching type voltage stabilizer control circuit and method for stably outputting electric signals | |
| CN203967961U (en) | Transconductance adjusting circuit, transconductance error amplifying unit and switching power converter | |
| CN203135696U (en) | Switch converter double-rim pulse frequency modulation V2C type control device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |