CN107133066A - A kind of storage multiplexed control system in MCU chip - Google Patents
A kind of storage multiplexed control system in MCU chip Download PDFInfo
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- CN107133066A CN107133066A CN201710213678.1A CN201710213678A CN107133066A CN 107133066 A CN107133066 A CN 107133066A CN 201710213678 A CN201710213678 A CN 201710213678A CN 107133066 A CN107133066 A CN 107133066A
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- nvm
- nvm memory
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- paging
- mcu
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
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Abstract
The invention discloses the storage multiplexed control system in a kind of MCU chip, include MCU kernels CORE, chip configuration control unit CONFIG, NVM memory and NVM memory address mapping unit MAP_CTRL inside MCU chip, NVM memory is used for the program for storing user, MCU kernels CORE is operationally, instruction code of being read back from NVM memory is needed, corresponding operation is then performed according to instruction code.The present invention is when application program needs upgrading, it is only necessary to by other Fragmentation areas of the NVM memory of the program burn writing of renewal to disposable programmable type, without replacing original chip, so as to reduce the product development cost of user, improves the competitiveness of product.
Description
Technical field
The present invention relates to a kind of control system, the storage multiplexed control system in specifically a kind of MCU chip.
Background technology
In the MCU chip using the NVM memory of disposable programmable, user program can only work as user by programming once
When program needs to update, the MCU chip used can only be discarded.
The content of the invention
It is an object of the invention to provide the storage multiplexed control system in a kind of MCU chip, to solve above-mentioned background skill
The problem of being proposed in art.
To achieve the above object, the present invention provides following technical scheme：
Include MCU kernels CORE, chip configuration control list inside a kind of storage multiplexed control system in MCU chip, MCU chip
First CONFIG, NVM memory and NVM memory address mapping unit MAP_CTRL, the NVM memory have 2 kinds of access modules,
It is general modfel and paging multiplexer mode respectively, when MCU chip works in general modfel, the NVM memory in MCU chip
In be not present paging multiplexing, whole NVM memory spaces all be used for store user program and data, be not required to when chip is applied to
During the application scenario to be upgraded to program, user can use the general modfel of chip, so as to use NVM to store
All memory spaces in device；When MCU chip works in paging multiplexer mode, whole NVM memory spaces are divided into 2 panel regions：
NVM memory public area NVM_COM and NVM memory paging area NVM_PAGE, NVM memory public area NVM_COM are used for
The program and data that need not be updated in storage user's application, NVM memory paging area NVM_PAGE are used to store user's application
The program and data that may be updated middle future, 4 subpages of NVM memory paging area paging, user can be as needed by not
Chip configuration control unit CONFIG of the same Configuration Values programming in MCU chip, when MCU chip works in paging multiplexer mode
When, it will the Configuration Values configured according to chip in control unit CONFIG select a certain subpage in NVM memory paging area, are needing
When wanting, instruction code in this subpage is read, corresponding operation is performed, chip configuration control unit CONFIG is responsible for preserving to MCU core
The configuration control information of overall importance of piece.
It is used as further scheme of the invention：The NVM memory has 2 kinds of access modules can be by user by configuring core
Piece configures the model selection control signal pen in control unit CONFIG to be selected.
It is used as further scheme of the invention：When pen is 0, NVM memory works in general modfel；When pen is 1
NVM memory works in paging multiplexer mode.
It is used as further scheme of the invention：When user selects the mode of operation of chip to be multiplexed for NVM memory paging
During pattern, in addition it is also necessary to configure paging selection signal psel.
Compared with prior art, the beneficial effects of the invention are as follows：The present invention is when application program needs upgrading, it is only necessary to will
The program burn writing of renewal is to other Fragmentation areas of the NVM memory of disposable programmable type, without replacing original core
Piece, so as to reduce the product development cost of user, improves the competitiveness of product.
Brief description of the drawings
Fig. 1 is the theory diagram for storing multiplexed control system in MCU chip.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
Referring to Fig. 1, in the embodiment of the present invention, the storage multiplexed control system in a kind of MCU chip, inside MCU chip
Including MCU kernels CORE, chip configuration control unit CONFIG, NVM memory and NVM memory address mapping unit MAP_
CTRL。
NVM memory is used for the program for storing user, and MCU kernels CORE from NVM memory operationally, it is necessary to read
Instruction code is returned, corresponding operation is then performed according to instruction code.In this programme, the NVM memory in MCU chip has 2 kinds of visits
Pattern is asked, is general modfel and paging multiplexer mode respectively.When MCU chip works in general modfel, in MCU chip
Paging is not present in NVM memory to be multiplexed, whole NVM memory spaces are all used for storing user program and data.When chip quilt
When being applied to the application scenario that need not be upgraded to program, user can use the general modfel of chip, so as to so that
Memory spaces all in NVM memory are used, memory space valuable in NVM memory will not be wasted.
When MCU chip works in paging multiplexer mode, whole NVM memory spaces are divided into 2 panel regions：NVM memory is public
Common area NVM_COM and NVM memory paging area NVM_PAGE.NVM memory public area NVM_COM is used to store user's application
In the program and data that need not update.NVM memory paging area NVM_PAGE in the future may in user's application for storing
The program and data of renewal.4 subpages of NVM memory paging area paging, user as needed can burn different Configuration Values
It is written on the chip configuration control unit CONFIG in MCU chip.When MCU chip works in paging multiplexer mode, it will according to
A certain subpage in Configuration Values selection NVM memory paging area in chip configuration control unit CONFIG, when needed, reads this
Instruction code in subpage, performs corresponding operation.Chip configuration control unit CONFIG is responsible for preserving to be matched somebody with somebody to the of overall importance of MCU chip
Put control information.In this programme, NVM memory has 2 kinds of access modules single by configuring chip configuration control by user
Model selection control signal pen in first CONFIG is selected.When pen is 0, NVM memory works in general modfel；
When pen is 1, NVM memory works in paging multiplexer mode.When user selects the mode of operation of chip to be NVM memory paging
During multiplexer mode, in addition it is also necessary to configure paging selection signal psel.MCU chip selects the value according to paging selection signal psel
Corresponding Fragmentation area (by NVM_P0 ~ NVM_P7, totally 8 sub- pagings are constituted).MCU kernels send reading NVM memory request
(read), while corresponding initial request address adr0 is inputted to NVM storage address map units.NVM memory address is reflected
Unit MAP_CTRL is penetrated to be responsible for entering row decoding to the initial request address of MCU kernels.As NVM memory address mapping unit MAP_
CTRL detect model selection control signal pen for low level state when, will directly by initial request address adr0 directly as
Mapping request address addr_map is exported to NVM memory.When NVM memory address mapping unit MAP_CTRL detects pattern
When selecting control signal psel for high level state, control signal page_sel will be selected according to paging to initial request address
Adr0 enters the mapping request address obtained after row decoding, decoding, by the physical address phase with selected NVM memory paging area
Correspondence.NVM memory detect read signals it is effective after, will be according to penetrating request address addr_map, pair that will be stored in it
The value of address location is answered to be back to MCU kernels by data-signal data_out, MCU kernels carry out phase further according to the data of return
The operation answered.
It is obvious to a person skilled in the art that the invention is not restricted to the details of above-mentioned one exemplary embodiment, Er Qie
In the case of without departing substantially from spirit or essential attributes of the invention, the present invention can be realized in other specific forms.Therefore, no matter
From the point of view of which point, embodiment all should be regarded as exemplary, and be nonrestrictive, the scope of the present invention is by appended power
Profit is required rather than described above is limited, it is intended that all in the implication and scope of the equivalency of claim by falling
Change is included in the present invention.Any reference in claim should not be considered as to the claim involved by limitation.
Moreover, it will be appreciated that although the present specification is described in terms of embodiments, not each embodiment is only wrapped
Containing an independent technical scheme, this narrating mode of specification is only that for clarity, those skilled in the art should
Using specification as an entirety, the technical solutions in the various embodiments may also be suitably combined, forms those skilled in the art
It may be appreciated other embodiment.
Claims (4)
1. the storage multiplexed control system in a kind of MCU chip, it is characterised in that include inside MCU chip MCU kernels CORE,
Chip configuration control unit CONFIG, NVM memory and NVM memory address mapping unit MAP_CTRL, the NVM memory
There are 2 kinds of access modules, be general modfel and paging multiplexer mode respectively, when MCU chip works in general modfel, MCU core
Paging is not present in NVM memory in piece to be multiplexed, whole NVM memory spaces are all used for storing user program and data, when
When chip is applied to the application scenario that need not be upgraded to program, user can use the general modfel of chip, so that
Memory spaces all in NVM memory can be used；When MCU chip works in paging multiplexer mode, whole NVM storages
Space is divided into 2 panel regions：NVM memory public area NVM_COM and NVM memory paging area NVM_PAGE, NVM memory is public
Area NVM_COM is used to store the program and data that need not be updated in user's application altogether, and NVM memory paging area NVM_PAGE is used
The program and data that may be updated in the future in storage user's application, 4 subpages of NVM memory paging area paging, Yong Huneng
It is enough that chip of the different Configuration Values programmings in MCU chip is configured into control unit CONFIG as needed, when MCU chip work
When paging multiplexer mode, it will the Configuration Values configured according to chip in control unit CONFIG select NVM memory paging area
In a certain subpage, when needed, read instruction code in this subpage, perform corresponding operation, chip configuration control unit CONFIG
It is responsible for preserving the configuration control information of overall importance to MCU chip.
2. the storage multiplexed control system in MCU chip according to claim 1, it is characterised in that the NVM memory
There are 2 kinds of access modules can be by user by configuring the model selection control signal pen in chip configuration control unit CONFIG
To be selected.
3. the storage multiplexed control system in MCU chip according to claim 2, it is characterised in that the NVM when pen is 0
Memory operation is in general modfel；When pen is 1, NVM memory works in paging multiplexer mode.
4. the storage multiplexed control system in MCU chip according to claim 1, it is characterised in that when user selects core
When the mode of operation of piece is NVM memory paging multiplexer mode, in addition it is also necessary to configure paging selection signal psel.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710213678.1A CN107133066A (en) | 2017-04-01 | 2017-04-01 | A kind of storage multiplexed control system in MCU chip |
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| CN201710213678.1A CN107133066A (en) | 2017-04-01 | 2017-04-01 | A kind of storage multiplexed control system in MCU chip |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108153559A (en) * | 2017-12-08 | 2018-06-12 | 芯海科技（深圳）股份有限公司 | Framework is reconfigured quickly in a kind of MCU work real-time that do not influence |
| CN108268265A (en) * | 2018-01-24 | 2018-07-10 | 深圳市道通科技股份有限公司 | Link mapping method, software code method for burn-recording and the burning host in common code library |
| CN111176694A (en) * | 2019-12-31 | 2020-05-19 | 无锡矽杰微电子有限公司 | Multi-paging burning method for OTP type MCU |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101604248A (en) * | 2009-07-20 | 2009-12-16 | 北京海尔集成电路设计有限公司 | A kind of embedded system and its implementation of revising program in the ROM (read-only memory) |
| CN101727987A (en) * | 2008-10-29 | 2010-06-09 | 旺宏电子股份有限公司 | Data programming and reading method and single time programmable memory applying the same |
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2017
- 2017-04-01 CN CN201710213678.1A patent/CN107133066A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101727987A (en) * | 2008-10-29 | 2010-06-09 | 旺宏电子股份有限公司 | Data programming and reading method and single time programmable memory applying the same |
| CN101604248A (en) * | 2009-07-20 | 2009-12-16 | 北京海尔集成电路设计有限公司 | A kind of embedded system and its implementation of revising program in the ROM (read-only memory) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108153559A (en) * | 2017-12-08 | 2018-06-12 | 芯海科技（深圳）股份有限公司 | Framework is reconfigured quickly in a kind of MCU work real-time that do not influence |
| CN108268265A (en) * | 2018-01-24 | 2018-07-10 | 深圳市道通科技股份有限公司 | Link mapping method, software code method for burn-recording and the burning host in common code library |
| WO2019144819A1 (en) * | 2018-01-24 | 2019-08-01 | 深圳市道通科技股份有限公司 | Link mapping method for common codebase, software code burning method, and burning host |
| CN111176694A (en) * | 2019-12-31 | 2020-05-19 | 无锡矽杰微电子有限公司 | Multi-paging burning method for OTP type MCU |
| CN111176694B (en) * | 2019-12-31 | 2023-09-08 | 无锡矽杰微电子有限公司 | Multi-paging burning method for OTP MCU |
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Application publication date: 20170905 |