CN111176694A - Multi-paging burning method for OTP type MCU - Google Patents

Multi-paging burning method for OTP type MCU Download PDF

Info

Publication number
CN111176694A
CN111176694A CN201911421197.5A CN201911421197A CN111176694A CN 111176694 A CN111176694 A CN 111176694A CN 201911421197 A CN201911421197 A CN 201911421197A CN 111176694 A CN111176694 A CN 111176694A
Authority
CN
China
Prior art keywords
mcu
different
paging
configuration
programs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201911421197.5A
Other languages
Chinese (zh)
Other versions
CN111176694B (en
Inventor
方马龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuxi Xijie Microelectronics Co ltd
Original Assignee
Wuxi Xijie Microelectronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuxi Xijie Microelectronics Co ltd filed Critical Wuxi Xijie Microelectronics Co ltd
Priority to CN201911421197.5A priority Critical patent/CN111176694B/en
Publication of CN111176694A publication Critical patent/CN111176694A/en
Application granted granted Critical
Publication of CN111176694B publication Critical patent/CN111176694B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • G06F8/654Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

The invention relates to the technical field of OTP type MCU burning methods, in particular to a multi-paging burning method for an OTP type MCU, which comprises the following steps: based on that when the MCU is powered on, a plurality of configuration options defined by a user can be loaded in the preheating period of the circuit system to adapt to different schemes, in the configuration word area of the MCU, the first configuration option is set as a paging option, the system selects and loads configuration words with different addresses according to different pages to adapt to different programs, the address of the program area in the hardware circuit is provided by a program counter PC pointer, and the PC signal is processed when different pages are selected. The invention can burn a plurality of programs by one OTP type MCU, and a user only needs to select one of the programs to operate according to requirements, thereby not only greatly reducing the burning time of MCU scheme design manufacturers, but also shortening the stocking cycle and the cost.

Description

Multi-paging burning method for OTP type MCU
Technical Field
The invention relates to the technical field of OTP type MCU burning methods, in particular to a multi-paging burning method for an OTP type MCU.
Background
At present, the conventional OTP (i.e. One Time programmable) type MCU can only be burned once, while the cost of the OTP type MCU with 1K ROM capacity is almost the same as that of the OTP type MCU with smaller ROM capacity, MCU scheme design manufacturers often choose to purchase 1K OTP type MCU for program burning, as shown in fig. 1, for the existing OTP type MCU burning design, the ROM area is usually divided into a user configuration word area and a program area, but with the development of portable electronic products, more and more simple and variable design schemes appear according to the user's usage requirements, and accordingly, more and more short programs in the MCU market need to be burned, and for MCU scheme design manufacturers, the burning program required by the client often cannot fill up the 1K ROM space of the MCU, which is easy to cause MCU waste, and if the OTP type MCU with different specifications and smaller capacity is purchased according to different program contents, this results in a complicated stock plan, which in turn results in high stock cost and long stock cycle.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a multi-paging burning method for an OTP type MCU.
In order to achieve the technical purpose, the technical scheme of the invention is as follows:
a multi-time paging burning method for OTP type MCU is based on that when MCU is powered on, multiple configuration options defined by user can be loaded in preheating period of circuit system to adapt different schemes, in configuration word region of MCU, the first configuration option is set as paging option, system selects and loads configuration words with different addresses according to different paging to adapt different programs, address of program region in hardware circuit is provided by program counter PC pointer, and PC signal is processed when different paging is selected.
From the above description, it can be seen that the present invention has the following advantages:
the multi-paging burning method for the OTP type MCU can burn a plurality of programs by one OTP type MCU, and when a design manufacturer of the MCU goes out of a product, a customer only needs to select one of the programs to operate according to requirements, so that the burning time of the design manufacturer of the MCU scheme can be greatly shortened (a plurality of programs are burned in the same MCU at one time, the burning time is greatly saved), and the product preparation period and the cost can be reduced.
Drawings
FIG. 1 is a schematic diagram of a ROM region of a conventional OTP type MCU;
FIG. 2 is a schematic diagram of a ROM setup of an OTP type MCU according to the present invention;
fig. 3 is a circuit schematic of the present invention.
Detailed Description
An embodiment of the present invention is described in detail with reference to fig. 1 to 3, but the present invention is not limited in any way by the claims.
A multi-paging burning method for an OTP type MCU is characterized in that: based on that when the MCU is powered on, a plurality of configuration options defined by a user can be loaded in the preheating period of the circuit system to adapt to different schemes, in the configuration word area of the MCU, the first configuration option is set as a paging option, the system selects and loads configuration words with different addresses according to different pages to adapt to different programs, the address of the program area in the hardware circuit is provided by a program counter PC pointer, and the PC signal is processed when different pages are selected.
The following is an example of the specific application of the above method:
taking an OTP MCU with 1K memory space as an example, usually, when the MCU is powered on, a plurality of configuration options customized by a user are loaded during system warm-up to adapt to different schemes, as shown in fig. 1;
first, setting a first configuration option as a paging option, selecting a configuration word corresponding to a program page according to different pages by the system, assuming that the configuration word 0 has 16 bits, as shown in table 1:
TABLE 1
Bit15 Bit14 Bit13 Bit12 …… Bit0
Bank_num1 Bank_num0 Bank_sel1 Bank_sel0 ……
The paging option settings in table 1 are as follows:
bank _ num <1:0 >: selecting the number of pages to be paged
Bnak _ sel <1:0 >: selecting pages for program execution
Bank _ num 00: select 1K ROM, no paging
Bank _ num is 01: select 0.5K ROM, split into two pages
Bank _ num is 10: select 0.25K ROM, divide into four pages
Bank _ sel ═ 00: selecting a first page
Bank _ sel ═ 01: selecting the second page
Bank _ sel ═ 10: selecting the third page
Bank _ sel ═ 11: select the fourth page
Then, the configuration words loaded with different addresses are selected according to different pages to apply different programs, as shown in table 2:
TABLE 2
Bank_sel=00 Bank_sel=01 Bank_sel=10 Bank_sel=11
Bank_num=00 Configuration word loading 1-3
Bank_num=01 Configuration word loading 1-3 Configuration word loads 4-6
Bank_num=10 Configuration word loading 1-3 Configuration word loads 4-6 Configuration word loads 7-9 Configuration word loading a-c
As shown in FIG. 2, the original 1K ROM area can store two programs within 0.5K and 4 programs within 0.25K based on the above page design.
In the above-mentioned paging design method, the address of the program area in the circuit is provided by the program counter PC pointer, and the PC signal is processed when different pages are selected.
The PC address of 1K is 10 bits PC <9:0>, and the paged PC pointer design is shown in Table 3:
TABLE 3
First page Second page Third page Fourth page
Non-paging PC<9:8>Is not processed
Divided into two pages PC<9>Is fixed to 0 PC<9>Fixed as 1
Divided into four pages PC<9:8>Fixed as 00 PC<9:8>Fixed to 01 PC<9:8>Fixed at 10 PC<9:8>Is fixed at 11
The circuit schematic of the above design is shown in fig. 3.
It can be seen from the above embodiments that, based on the paging burning method for OTP MCU of the present invention, two programs within 0.5K or 4 programs within 0.25K can be burned in the original 1K ROM area of MCU, the ROM space is fully utilized, when the MCU scheme design manufacturer is in shipment, the customer only needs to select one of the programs to operate as required, which not only can greatly shorten the burning time of the MCU scheme design manufacturer (burn multiple programs in the same MCU at one time, greatly saving the burning time), but also can reduce the stocking cycle and cost.
In summary, the invention has the following advantages:
the multi-paging burning method for the OTP type MCU can burn a plurality of programs by one OTP type MCU, and when a design manufacturer of the MCU goes out of a product, a customer only needs to select one of the programs to operate according to requirements, so that the burning time of the design manufacturer of the MCU scheme can be greatly shortened (a plurality of programs are burned in the same MCU at one time, the burning time is greatly saved), and the product preparation period and the cost can be reduced.
It should be understood that the detailed description of the invention is merely illustrative of the invention and is not intended to limit the invention to the specific embodiments described. It will be appreciated by those skilled in the art that the present invention may be modified or substituted equally as well to achieve the same technical result; as long as the use requirements are met, the method is within the protection scope of the invention.

Claims (1)

1. A multi-paging burning method for an OTP type MCU is characterized in that: based on that when the MCU is powered on, a plurality of configuration options defined by a user can be loaded in the preheating period of the circuit system to adapt to different schemes, in the configuration word area of the MCU, the first configuration option is set as a paging option, the system selects and loads configuration words with different addresses according to different pages to adapt to different programs, the address of the program area in the hardware circuit is provided by a program counter PC pointer, and the PC signal is processed when different pages are selected.
CN201911421197.5A 2019-12-31 2019-12-31 Multi-paging burning method for OTP MCU Active CN111176694B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911421197.5A CN111176694B (en) 2019-12-31 2019-12-31 Multi-paging burning method for OTP MCU

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911421197.5A CN111176694B (en) 2019-12-31 2019-12-31 Multi-paging burning method for OTP MCU

Publications (2)

Publication Number Publication Date
CN111176694A true CN111176694A (en) 2020-05-19
CN111176694B CN111176694B (en) 2023-09-08

Family

ID=70646497

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911421197.5A Active CN111176694B (en) 2019-12-31 2019-12-31 Multi-paging burning method for OTP MCU

Country Status (1)

Country Link
CN (1) CN111176694B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016095570A1 (en) * 2014-12-17 2016-06-23 中兴通讯股份有限公司 Debugging method and apparatus for embedded system, and storage medium
CN106598660A (en) * 2016-12-08 2017-04-26 深圳市博巨兴实业发展有限公司 Program memory management device used for microcontroller
CN107133066A (en) * 2017-04-01 2017-09-05 深圳市博巨兴实业发展有限公司 A kind of storage multiplexed control system in MCU chip

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016095570A1 (en) * 2014-12-17 2016-06-23 中兴通讯股份有限公司 Debugging method and apparatus for embedded system, and storage medium
CN106598660A (en) * 2016-12-08 2017-04-26 深圳市博巨兴实业发展有限公司 Program memory management device used for microcontroller
CN107133066A (en) * 2017-04-01 2017-09-05 深圳市博巨兴实业发展有限公司 A kind of storage multiplexed control system in MCU chip

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
SUZHEN WANG: "Design and research of new biological particle heating stove system" *
宋庆华;宋庆国;: "SPMC65P的算法设计与实现" *

Also Published As

Publication number Publication date
CN111176694B (en) 2023-09-08

Similar Documents

Publication Publication Date Title
EP3183661B1 (en) Systems and methods for expanding memory for a system on chip
WO2018040270A1 (en) Method and device for loading linux-system elf file in windows system
WO2015153479A1 (en) System and method for modifying firmware used to initialize a computing device
CN103516945A (en) Information processing apparatus and method for controlling information processing apparatus
CN111176694A (en) Multi-paging burning method for OTP type MCU
CN105138604A (en) Terminal data processing method and apparatus
CN107247695A (en) Coding rule generation method, system and storage device
CN111142956B (en) Method, system, device and medium for modifying maximum effective load value
CN106326150B (en) Memory access processing method and device
Vaglica et al. How to select a microcontroller
EP3252583A1 (en) Dpi adaptation method and electronic device
US11860747B2 (en) Method and apparatus for performing power stress test on FPGA acceleration card, and storage medium
CN107632864A (en) A kind of method for the UEFI Boot Order for establishing particular sorted
CN106933933B (en) Data table information processing method and device
CN106598660A (en) Program memory management device used for microcontroller
CN104281463A (en) Version-selectable DSP (Digital Signal Processor) program loading method
CN104199678B (en) The method for obtaining the type ID of board method and software release upgrade
CN112506574A (en) Method for modifying BIOS configuration options in ARM server based on CentOS in-band
CN112732186A (en) DDR self-adaptation method, device and computer readable storage medium
CN105511909A (en) Plug-in processing method and device
CN116149677B (en) Method, device, equipment and medium for burning serial numbers
CN111147091A (en) Antenna tuning switch logic control method, system and terminal
CN107688474B (en) Starting method, and method and device for generating kernel mirror image
US20030188050A1 (en) System and method to configure input/output (IO) devices to use selected pairs of port addresses
US9268680B2 (en) Electronic apparatus with compressed data storage and control method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant