CN107093984B - Injection locking frequency tripler - Google Patents
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- CN107093984B CN107093984B CN201710260120.9A CN201710260120A CN107093984B CN 107093984 B CN107093984 B CN 107093984B CN 201710260120 A CN201710260120 A CN 201710260120A CN 107093984 B CN107093984 B CN 107093984B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
- H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
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Abstract
The invention discloses an injection locking frequency tripler, and relates to the technical field of integrated circuits. The injection locking frequency tripler comprises an oscillator and a harmonic generator, wherein the oscillator and the harmonic generator are connected through a transformer network. On one hand, the injection locking frequency tripler realizes the purpose that the output frequency f is generated by the corresponding NMOS transistor in the harmonic generator by adopting a transformer network0Third harmonic component 3f of0Injecting the mixed solution into the oscillator, and completing frequency selection by a resonant network in the oscillator to realize that the output frequency of the output end of the oscillator is 3f0So that the injection-locked frequency tripler is locked at the frequency 3f0To (3). On the other hand, the injection locking frequency tripler provides direct current bias for the oscillator through the NMOS transistor which is arranged independently, normal oscillation starting of the oscillator is achieved, the injection locking frequency tripler works within the range of a conduction angle of 50-100 degrees, and therefore the injection locking range of the injection locking frequency tripler is enlarged.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to an injection locking frequency tripler applied to a radio frequency synthesizer.
Background
Currently, 60GHz millimeter wave wireless communication becomes the first choice technology of the next generation of ultra-high speed wireless network with the transmission rate up to several Gbps and the bandwidth of 7GHz, and especially has huge market prospect in the consumer electronics field such as non-compressed high definition video wireless transmission. The 60GHz millimeter wave wireless communication technology has become a research hotspot in the world at present, Chinese 60GHz millimeter wave wireless communication is divided into two frequency bands, namely a 42.3-48.4GHz frequency band and a 59-64GHz frequency band, and both the two frequency bands are opened at present.
The phase-locked loop circuit is an important component of the transceiver and provides local oscillation signals required by frequency conversion of the receiver in the radio frequency receiver. In the millimeter wave band, the design of the phase-locked loop circuit has a great challenge. When the phase-locked loop circuit is applied to a broadband millimeter wave transceiver, performance indexes such as tuning range, phase noise, power consumption and the like of a voltage-controlled oscillator in the phase-locked loop circuit are more difficult to realize compared with a low frequency band. The frequency divider following the voltage-controlled oscillator also works at the highest frequency, and the performances of the frequency divider, such as power consumption, locking range and the like, also bring design challenges in the millimeter wave frequency band. In order to solve the problem, the prior art provides a scheme of a low-frequency phase-locked loop cascade frequency multiplier, so that a phase-locked loop circuit still works in a low-frequency range, and the design difficulty of the phase-locked loop circuit is reduced. As shown in fig. 1, a 20GHz phase-locked loop 101 cascaded injection-locked frequency tripler structure 102 may provide a local oscillator signal for a 60GHz transceiver 103(LNA is a low noise amplifier), but the locking range of the injection-locked frequency tripler structure 102 is smaller, so how to increase the locking range of the injection-locked frequency tripler becomes a problem to be solved.
Disclosure of Invention
Embodiments of the present invention provide an injection locking frequency tripler to solve the problem of a small locking range of a locking frequency tripler structure in the prior art.
In order to achieve the purpose, the invention adopts the following technical scheme:
an injection locking frequency tripler comprises an oscillator and a harmonic generator, wherein the oscillator and the harmonic generator are connected through a transformer network;
the harmonic generator is used for generating a third harmonic component of a preset frequency according to a fundamental wave signal of the preset frequency, and the third harmonic component is injected into the oscillator through the transformer network to complete a frequency selection function, so that the injection locking frequency tripler outputs a signal of three times the preset frequency;
and a fifth NMOS transistor loaded with bias voltage is connected with the oscillator, so that the direct current bias is provided for the oscillator instead of the harmonic generator, and the injection locking range of the injection locking frequency tripler is enlarged.
Specifically, the oscillator includes a resonant network, a third NMOS transistor, a fourth NMOS transistor, and the fifth NMOS transistor; the grid electrode of the fifth NMOS transistor is connected with a bias voltage, the source electrode of the fifth NMOS transistor is grounded, and the drain electrode of the fifth NMOS transistor is respectively connected with the source electrode of the third NMOS transistor and the source electrode of the fourth NMOS transistor; the grid electrode and the drain electrode of the third NMOS transistor and the grid electrode and the drain electrode of the fourth NMOS transistor are connected with the resonant network; and providing direct current bias for the oscillator through the fifth NMOS transistor, so that the oscillator starts oscillation normally.
Specifically, the resonant network comprises the transformer network, a first variable capacitor and a second variable capacitor; one end of the first variable capacitor and one end of the second variable capacitor are correspondingly connected with the transformer network, and the other end of the first variable capacitor is connected with the other end of the first variable capacitor in series; the transformer network is respectively connected with the first power supply voltage and the second power supply voltage, and the frequency selection function is realized through the resonance network, so that the injection locking frequency tripler outputs a signal with three times of the preset frequency, and the injection locking frequency tripler is locked at the position of the three times of the preset frequency.
Specifically, the transformer network includes a first inductor, a second inductor, a third inductor and a fourth inductor; one end of the first inductor and one end of the second inductor are respectively connected with the first power voltage, and the other end of the first inductor is respectively connected with the drain electrode of the third NMOS transistor and one end of the first variable capacitor; the other end of the second inductor is connected with the drain electrode of the fourth NMOS transistor and one end of the second variable capacitor respectively; one end of the third inductor and one end of the fourth inductor are respectively connected with the second power supply voltage; the other end of the third inductor is connected with the grid electrode of the third NMOS transistor and the harmonic generator respectively, and the other end of the fourth inductor is connected with the grid electrode of the fourth NMOS transistor and the harmonic generator respectively.
In addition, the first inductor and the fourth inductor are coupled with each other, and the second inductor and the third inductor are coupled with each other; the inductance values of the first inductor and the second inductor are the same, and the inductance values of the third inductor and the fourth inductor are the same; and realizing cross coupling between the gates of the third NMOS transistor and the fourth NMOS transistor by coupling between a first inductor and a fourth inductor of the transformer network and coupling between a second inductor and a third inductor, so that the third NMOS transistor and the fourth NMOS transistor provide negative resistance to maintain oscillation.
Specifically, the harmonic generator includes a first NMOS transistor and a second NMOS transistor; the source electrode of the first NMOS transistor and the source electrode of the second NMOS transistor are grounded respectively; resistors are respectively arranged between the grid electrode of the first NMOS transistor and the bias voltage, and between the grid electrode of the second NMOS transistor and the bias voltage; a capacitor is arranged between the grid electrode of the first NMOS transistor and the positive input end of the radio frequency signal, and a capacitor is arranged between the grid electrode of the second NMOS transistor and the negative input end of the radio frequency signal; the drain electrode of the first NMOS transistor is respectively connected with the grid electrode of the third NMOS transistor and the other end of the third inductor; and the drain electrode of the second NMOS transistor is respectively connected with the grid electrode of the fourth NMOS transistor and the other end of the fourth inductor.
Further, the gate of the first NMOS transistor and the gate of the second NMOS transistor are injected with the fundamental wave signal of the preset frequency, so that when the first NMOS transistor and the second NMOS transistor are biased in a weak inversion region, the drain of the first NMOS transistor and the drain of the second NMOS transistor output the third harmonic component of the preset frequency.
One aspect of the injection locking frequency tripler provided by the inventionThe generation of the output frequency f by corresponding NMOS transistors in the harmonics generator is achieved by using a transformer network0Third harmonic component 3f of0Injecting the mixed solution into the oscillator, and completing frequency selection by a resonant network in the oscillator to realize that the output frequency of the output end of the oscillator is 3f0So that the injection-locked frequency tripler is locked at the frequency 3f0And realizing the successful frequency multiplication of the input signal locked by the injection locking frequency tripler. On the other hand, the injection locking frequency tripler provides direct current bias for the oscillator through the NMOS transistor which is arranged independently, normal oscillation starting of the oscillator is achieved, the injection locking frequency tripler works within the range of a conduction angle of 50-100 degrees, and therefore the injection locking range of the injection locking frequency tripler can be enlarged.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a millimeter wave transceiver using a frequency tripler to provide a local oscillator in the prior art;
FIG. 2 is a schematic diagram of a conventional injection locked frequency tripler circuit;
FIG. 3 is a diagram of the relationship between the third harmonic current component and the conduction angle in an injection locked frequency tripler;
fig. 4 is a schematic circuit diagram of an injection-locked frequency tripler according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The technical contents of the present invention will be further described in detail with reference to the accompanying drawings and specific embodiments.
In the process of implementing the present invention, the inventor finds that the conventional injection locking frequency tripler structure is shown in fig. 2:
the traditional injection locking frequency tripler consists of a harmonic generator and an oscillator, wherein the harmonic generator is connected with the oscillator, and the harmonic generator can generate a third harmonic component and provide direct current bias for the oscillator so that the oscillator can start oscillation normally. The third harmonic component generated by the harmonic generator is injected into the oscillator to complete the frequency selection function. The harmonic generator comprises a pair of NMOS transistors, namely a first NMOS transistor M3 and a second NMOS transistor M4, wherein the source of the first NMOS transistor M3 and the source of the second NMOS transistor M4 are grounded respectively, a resistor is arranged between the gate of the first NMOS transistor M3 and the gate of the second NMOS transistor M4 and bias voltage, and a capacitor is arranged between the gate of the first NMOS transistor M3 and the gate of the second NMOS transistor M4 and a radio frequency signal input end (RFin + and RFin-). The oscillator comprises a resonant network and a pair of cross-coupled transistors, wherein the resonant network comprises a first variable capacitor C1, a second variable capacitor C2, a first inductor L1 and a second inductor L2, and frequency selection is achieved through the resonant network. The cross-coupled transistors are the third NMOS transistor M1 and the fourth NMOS transistor M2, respectively, and the third NMOS transistor M1 and the fourth NMOS transistor M2 provide negative resistance to sustain oscillation.
The connection relationship between the components of the oscillator is as follows: the sources of the third NMOS transistor M1 and the fourth NMOS transistor M2 are correspondingly connected to the drains of the first NMOS transistor M3 and the second NMOS transistor M4, after the gates of the third NMOS transistor M1 and the fourth NMOS transistor M2 are cross-coupled, the gate of the third NMOS transistor M1 is connected to the drain of the fourth NMOS transistor M2 and one end of the second variable capacitor C2 and one end of the second inductor L2, the gate of the fourth NMOS transistor M2 is connected to the drain of the third NMOS transistor M1 and one end of the first variable capacitor C1 and one end of the second inductor L1, the first variable capacitor C1 is connected to the other end of the second variable capacitor C2, and the first inductor L1 and the second inductor L2 are connected to the power supply voltage VDD, respectively.
When the gate injection frequency f of the first NMOS transistor M3 and the second NMOS transistor M4 of the harmonics generator is given0When the first and second NMOS transistors M3 and M4 are biased in the weak inversion region, the drains of the first and second NMOS transistors M3 and M4 will output the frequency f due to the non-linearity of the MOS devices0Third harmonic component 3f of0The third harmonic component 3f0Will be injected into the oscillator. And the oscillator is also provided with direct current bias through the harmonic generator, so that the oscillator can start oscillation normally. The frequency selection function is completed by utilizing the resonant network of the oscillator, so that the third harmonic signal is output by the differential output end of the injection locking frequency tripler, and the injection locking frequency tripler is locked at the frequency 3f0And realizing the successful frequency multiplication of the input signal locked by the injection locking frequency tripler.
Third harmonic current component vs. conduction angle in an injection-locked frequency tripler as shown in fig. 3, where I3Is the magnitude of the third harmonic current component, ImaxIs the total operating current of the circuit. Obviously, in order to obtain a larger third harmonic current and thus a larger locking range, the first NMOS transistor M3 and the second NMOS transistor M4 should be biased in a weak inversion region, i.e., a conduction angle of 50-100 degrees. However, in the conventional injection locking frequency tripler (as shown in fig. 2), the first NMOS transistor M3 and the second NMOS transistor M4 provide bias current for the oscillator to start oscillation normally, so the gate voltage bias of the first NMOS transistor M3 and the second NMOS transistor M4 is larger than the transistor threshold voltage VthThat is, the injection locking frequency tripler needs to work in the range of conduction angle greater than 200 degrees, rather than the range of conduction angle 50-100 degrees. This results in a conventional injection locked frequency tripler with a low injection efficiency and a small injection locking range.
In order to solve the problem of small injection locking range of the conventional injection locking frequency tripler, the invention provides an injection locking frequency tripler, as shown in fig. 4The input locking frequency tripler comprises a harmonic generator 3 and an oscillator 1, wherein the harmonic generator 3 is connected with the oscillator 1 through a transformer network 1. The harmonics generator 3 includes a first NMOS transistor M3 and a second NMOS transistor M4, wherein the sources of the first NMOS transistor M3 and the second NMOS transistor M4 are grounded, respectively; a resistor is arranged between the gates of the first NMOS transistor M3 and the second NMOS transistor M4 and the bias voltage, and a capacitor is arranged between the gates of the first NMOS transistor M3 and the second NMOS transistor M4 and the radio frequency signal input end (positive input end RFin + and negative input end RFin-). The oscillator 1 includes a third NMOS transistor M1, a fourth NMOS transistor M2, a first variable capacitor C1, a second variable capacitor C2, a transformer network 2, and a fifth NMOS transistor M5. The transformer network 2 comprises a first inductor L1, a second inductor L2, a third inductor L3 and a fourth inductor L4, wherein one ends of the first inductor L1 and the second inductor L2 are respectively connected with a first power supply voltage VDD1, and the other end of the first inductor L1 is respectively connected with a drain of a third NMOS transistor M1 and one end of a first variable capacitor C1; the other end of the second inductor L2 is connected to the drain of the fourth NMOS transistor M2 and one end of the second variable capacitor C2, respectively; the first variable capacitor C1 is connected in series with the other end of the second variable capacitor C2; one ends of the third inductor L3 and the fourth inductor L4 are respectively connected to the second power voltage VDD2, the other end of the third inductor L3 is respectively connected to the gate of the third NMOS transistor M1 and the drain of the first NMOS transistor M3, and the other end of the fourth inductor L4 is respectively connected to the gate of the fourth NMOS transistor M2 and the drain of the second NMOS transistor M4. The inductance values of the first inductor L1 and the second inductor L2 are the same, the inductance values of the third inductor L3 and the fourth inductor L4 are the same, the first inductor L1 and the fourth inductor L4 are coupled with each other, the second inductor L2 and the third inductor L3 are coupled with each other, the coupling coefficients are k1 and k2, and the coupling coefficients are k1 and k2 are the same. The cross coupling between the gates of the third NMOS transistor M1 and the fourth NMOS transistor M2 may be achieved through the transformer network 2, such that the third NMOS transistor M1 and the fourth NMOS transistor M2 provide negative resistance sustain oscillation. The transformer network 2, the first variable capacitor C1 and the second variable capacitor C2 form a resonant network of the oscillator 1, and when the resonant frequency of the oscillator is 3f0And nearby, completing the frequency selection function. Third NMOThe sources of the S transistor M1 and the fourth NMOS transistor M2 are connected to the drain of the fifth NMOS transistor M5, respectively, the gate of the fifth NMOS transistor M5 is connected to the bias voltage Vbias, and the source of the fifth NMOS transistor M5 is grounded; the dc bias is provided to the oscillator 1 by the fifth NMOS transistor M5, so that the oscillator 1 can start oscillation normally.
The embodiment of the invention provides an injection locking frequency tripler, when the injection frequency f is given to the gates of a first NMOS transistor M3 and a second NMOS transistor M4 of a harmonic generator 30When the first and second NMOS transistors M3 and M4 are biased in the weak inversion region, the drains of the first and second NMOS transistors M3 and M4 will output the frequency f due to the non-linearity of the MOS devices0Third harmonic component 3f of0The third harmonic component 3f0The voltage is injected into the oscillator 1 through the transformer network 2, and the oscillator 1 is provided with a direct current bias through the fifth NMOS transistor M5, so that the oscillator 1 can start oscillation normally. The frequency selection is completed by adjusting the first variable capacitor C1 and the second variable capacitor C2 of the resonant network in the oscillator 1, so that the output frequency Vout + and Vout-of the output end of the oscillator 1 is 3f0So that the injection-locked frequency tripler is locked at the frequency 3f0And realizing the successful frequency multiplication of the input signal locked by the injection locking frequency tripler. Because the fifth NMOS transistor M5 is adopted to replace the first NMOS transistor M3 and the second NMOS transistor M4 in the harmonic generator 3 to provide direct current bias for the oscillator 1, the injection locking frequency tripler works within the range of a conduction angle of 50-100 degrees, and the injection locking range of the injection locking frequency tripler is improved. And the injection locking frequency tripler can provide 60GHz local oscillation signals for the millimeter wave transceiver.
On one hand, the injection locking frequency tripler provided by the invention realizes the generation of the output frequency f by the corresponding NMOS transistor in the harmonic generator by adopting a transformer network0Third harmonic component 3f of0Injecting the mixed solution into the oscillator, and completing frequency selection by a resonant network in the oscillator to realize that the output frequency of the output end of the oscillator is 3f0The differential signal of (2) to make the injection locking frequency tripler locked on frequency3f0And realizing the successful frequency multiplication of the input signal locked by the injection locking frequency tripler. On the other hand, the injection locking frequency tripler provides direct current bias for the oscillator by independently arranging the NMOS transistor, so that the oscillator starts oscillation normally, and the injection locking frequency tripler works within the range of a conduction angle of 50-100 degrees, and the injection locking range of the injection locking frequency tripler is enlarged.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The principle and the implementation mode of the invention are explained by applying specific embodiments in the invention, and the description of the embodiments is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (4)
1. An injection locking frequency tripler is characterized by comprising an oscillator and a harmonic generator, wherein the oscillator is connected with the harmonic generator;
the harmonic generator is used for generating a third harmonic component of a preset frequency according to a fundamental wave signal of the preset frequency, and the third harmonic component is injected into the oscillator through a transformer network to complete a frequency selection function, so that the injection locking frequency tripler outputs a signal of three times the preset frequency;
the fifth NMOS transistor loaded with bias voltage is connected with the oscillator, so that the direct current bias is provided for the oscillator instead of the harmonic generator, and the injection locking range of the injection locking frequency tripler is enlarged;
the oscillator comprises a resonant network, a third NMOS transistor, a fourth NMOS transistor and the fifth NMOS transistor; the grid electrode of the fifth NMOS transistor is connected with a bias voltage, the source electrode of the fifth NMOS transistor is grounded, and the drain electrode of the fifth NMOS transistor is respectively connected with the source electrode of the third NMOS transistor and the source electrode of the fourth NMOS transistor; the grid electrode and the drain electrode of the third NMOS transistor and the grid electrode and the drain electrode of the fourth NMOS transistor are connected with the resonant network; providing direct current bias for the oscillator through the fifth NMOS transistor to enable the oscillator to start oscillation normally;
the resonant network comprises the transformer network, a first variable capacitor and a second variable capacitor; one end of the first variable capacitor and one end of the second variable capacitor are correspondingly connected with the transformer network, and the other end of the first variable capacitor is connected with the other end of the first variable capacitor in series; the transformer network is respectively connected with a first power supply voltage and a second power supply voltage, and the frequency selection function is realized through the resonance network, so that the injection locking frequency tripler outputs a signal with three times of a preset frequency, and the injection locking frequency tripler is locked at the position of the three times of the preset frequency;
the transformer network comprises a first inductor, a second inductor, a third inductor and a fourth inductor; one end of the first inductor and one end of the second inductor are respectively connected with the first power voltage, and the other end of the first inductor is respectively connected with the drain electrode of the third NMOS transistor and one end of the first variable capacitor; the other end of the second inductor is connected with the drain electrode of the fourth NMOS transistor and one end of the second variable capacitor respectively; one end of the third inductor and one end of the fourth inductor are respectively connected with the second power supply voltage; the other end of the third inductor is connected with the grid electrode of the third NMOS transistor and the harmonic generator respectively, and the other end of the fourth inductor is connected with the grid electrode of the fourth NMOS transistor and the harmonic generator respectively.
2. The injection-locked frequency tripler according to claim 1, wherein:
the first inductor and the fourth inductor are mutually coupled, and the second inductor and the third inductor are mutually coupled; the inductance values of the first inductor and the second inductor are the same, and the inductance values of the third inductor and the fourth inductor are the same; and realizing cross coupling between the gates of the third NMOS transistor and the fourth NMOS transistor by coupling between a first inductor and a fourth inductor of the transformer network and coupling between a second inductor and a third inductor, so that the third NMOS transistor and the fourth NMOS transistor provide negative resistance to maintain oscillation.
3. The injection-locked frequency tripler according to claim 2, wherein:
the harmonic generator comprises a first NMOS transistor and a second NMOS transistor; the source electrode of the first NMOS transistor and the source electrode of the second NMOS transistor are grounded respectively; resistors are respectively arranged between the grid electrode of the first NMOS transistor and the bias voltage, and between the grid electrode of the second NMOS transistor and the bias voltage; a capacitor is arranged between the grid electrode of the first NMOS transistor and the positive input end of the radio frequency signal, and a capacitor is arranged between the grid electrode of the second NMOS transistor and the negative input end of the radio frequency signal; the drain electrode of the first NMOS transistor is respectively connected with the grid electrode of the third NMOS transistor and the other end of the third inductor; and the drain electrode of the second NMOS transistor is respectively connected with the grid electrode of the fourth NMOS transistor and the other end of the fourth inductor.
4. The injection-locked frequency tripler according to claim 3, wherein:
the grid electrode of the first NMOS transistor and the grid electrode of the second NMOS transistor are injected with the fundamental wave signal with the preset frequency, so that when the first NMOS transistor and the second NMOS transistor are biased in a weak inversion region, the drain electrode of the first NMOS transistor and the drain electrode of the second NMOS transistor output the third harmonic component with the preset frequency.
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| CN108599762B (en) * | 2018-04-26 | 2022-04-12 | 深圳大学 | Dual-mode low-power-consumption wide-locking-range injection locking frequency divider |
| CN111313892B (en) * | 2018-12-12 | 2023-07-28 | 天津大学青岛海洋技术研究院 | Wide locking range switchable dual-core injection locking frequency divider |
| CN109510597B (en) * | 2018-12-19 | 2024-03-29 | 成都瑞迪威科技有限公司 | Broadband enhancement type injection locking quad-frequency device |
| CN110460309A (en) * | 2019-05-31 | 2019-11-15 | 华讯方舟科技有限公司 | A kind of injection locking frequency multiplier circuit and injection locked frequency multiplier |
| CN110113007A (en) * | 2019-05-31 | 2019-08-09 | 华讯方舟科技有限公司 | A kind of injection locking oscillating circuit, frequency adjustment method and injection locked oscillator |
| CN110350868A (en) * | 2019-06-27 | 2019-10-18 | 伍晶 | A kind of self-mixing voltage controlled oscillator based on current multiplexing |
| CN111478668A (en) * | 2020-04-02 | 2020-07-31 | 电子科技大学 | Millimeter wave voltage-controlled oscillator with low flicker noise |
| CN111404487A (en) * | 2020-04-02 | 2020-07-10 | 电子科技大学 | Harmonic current multiplexing millimeter wave voltage-controlled oscillator |
| CN112350669B (en) * | 2020-09-18 | 2022-07-12 | 天津大学 | Reconfigurable injection locking multi-mode single-ended output frequency multiplier for ultra-wideband millimeter waves |
| CN112653456A (en) * | 2020-12-04 | 2021-04-13 | 电子科技大学 | Low-power consumption is from mixing frequency voltage controlled oscillator |
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