CN107068613A - Oled显示装置的阵列基板及其制作方法 - Google Patents

Oled显示装置的阵列基板及其制作方法 Download PDF

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Publication number
CN107068613A
CN107068613A CN201611262923.XA CN201611262923A CN107068613A CN 107068613 A CN107068613 A CN 107068613A CN 201611262923 A CN201611262923 A CN 201611262923A CN 107068613 A CN107068613 A CN 107068613A
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China
Prior art keywords
film transistor
tft
thin film
underlay substrate
doping region
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CN201611262923.XA
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English (en)
Inventor
姜春生
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to CN201611262923.XA priority Critical patent/CN107068613A/zh
Priority to PCT/CN2017/071162 priority patent/WO2018120309A1/zh
Priority to US15/327,403 priority patent/US10068955B2/en
Publication of CN107068613A publication Critical patent/CN107068613A/zh
Pending legal-status Critical Current

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Abstract

本发明提供一种OLED显示装置的阵列基板制作方法，通过第一光罩在衬底基板形成第一薄膜晶体管T1与第二薄膜晶体管T2的有源区域，通过第二光罩形成T1与T2的沟道掺杂区、源极掺杂区及漏极掺杂区，通过第三光罩形成T1与T2栅极，通过第四光罩形成过孔，通过第五光罩形成T1与T2的源漏极，以及数据线及像素电极；相较于现有的阵列基板制作方法，本发明的制作方法，通过同一道光罩可得到数据线、源极、漏极及像素电极，节省了工程流程，进而降低加工成本。

Description

OLED显示装置的阵列基板及其制作方法
技术领域
本发明涉及显示技术领域，尤其涉及一种OLED显示装置的阵列基板及其制作方法。
背景技术
现有的OLED显示装置的阵列基板制作工艺，包括：在主动层的工艺当中以连续沉积缓冲层与非晶硅层，第一道光罩即为薄膜晶体管沟道掺杂，第二道光罩定义出主动区域，沉积氧化硅作为栅极氧化层，沉积金属层并以第三道光罩定义第一金属层(或称之为扫描电极)，由第一金属层作为光罩，以低剂量的离子注入形成高阻值的轻掺杂漏区域，再以第四道及第五道光罩定义N型掺杂与P型掺杂低温多晶硅区域利用氧化硅/氮化硅薄膜作为保护层，第六道与第七道光罩分别定义出接触孔与第二金属层(或称之为信号电极)，搭配不同方式涂布的有机材料作为平坦化保护层，以第八道光罩定义导通孔，最後沉积透明导电电极，并以第九道光罩对其进行定义，配合高温退火工艺将非晶态氧化铟锡转换成多晶态氧化铟锡薄膜。
综上所述，现有技术的OLED显示装置的阵列基板制作工艺较为复杂，生产效率较低，而且制作工序较多，会使相关流程受到制程中产生的导电粒子的影响，进而影响产品的品质。
发明内容
本发明提供一种OLED显示装置的阵列基板制作方法，制作工序简单，以解决现有技术的薄膜晶体管制作工艺较为复杂，生产效率较低，而且制作工序较多，会使相关流程受到制程中产生的导电粒子的影响，进而影响产品的品质的技术问题。
为解决上述问题，本发明提供的技术方案如下：
本发明的OLED显示装置的阵列基板制作方法，所述制作方法包括以下步骤：
提供一衬底基板；
利用第一掩膜板图案，在所述衬底基板上形成半导体的图形，其中包括每个驱动单元中的第一薄膜晶体管与第二薄膜晶体管的有源区域；
在以上图形的基础上，利用第二掩膜板图案，在所述衬底基板上形成第一薄膜晶体管的导电沟道及第二薄膜晶体管的导电沟道，并通过离子注入工艺，形成沟道掺杂区，以及位于沟道掺杂区两侧的源极掺杂区与漏极掺杂区；
在以上图形的基础上，形成绝缘层的图形；
在以上图形的基础上，利用第三掩膜板图案，形成第一金属层的图形，其中包括所述第一薄膜晶体管的栅极，以及所述第二薄膜晶体管的栅极；
在以上图形的基础上，形成中间介质层的图形，利用第四掩膜板图案，形成所述第一薄膜晶体管中的贯穿所述绝缘层及中间介质层的过孔，以及所述第二薄膜晶体管中的贯穿所述绝缘层及中间介质层的过孔；
在以上图形的基础上，利用第五掩膜板图案，形成第二金属层的图形，其中包括所述第一薄膜晶体管的源极与漏极、所述第二薄膜晶体管的源极与漏极以及数据线与像素电极。
在以上图形的基础上，形成保护层，利用第六掩膜板图案，刻蚀掉所述像素电极表面的保护层。
在以上图形的基础上，形成空穴注入层及空穴传输层。
优选的，所述第二金属层选用石墨烯薄膜材料。
优选的，所述在衬底基板上形成半导体的图形之前，在所述衬底基板表面形成缓冲层。
依据上述发明目的，本发明还提供一种OLED显示装置的阵列基板，包括：
衬底基板；
有源层，形成于所述衬底基板上，其中包括第一薄膜晶体管的沟道掺杂区、源极掺杂区及漏极掺杂区，以及第二薄膜晶体管的沟道掺杂区、源极掺杂区及漏极掺杂区；
栅极绝缘层，形成于所述衬底基板上；
第一金属层，形成于所述衬底基板上，其中包括所述第一薄膜晶体管的栅极，以及所述第二薄膜晶体管的栅极；
中间介质层，形成于所述衬底基板上；
过孔，贯穿于所述中间介质层与栅极绝缘层；
第二金属层，形成于所述衬底基板上，其中包括所述第一薄膜晶体管的源极与漏极、所述第二薄膜晶体管的源极与漏极以及数据线与像素电极；
其中，所述第一薄膜晶体管的源极连接所述数据线，所述第一薄膜晶体管的漏极连接所述第二薄膜晶体管的栅极，所述第二薄膜晶体管的漏极连接所述像素电极。
优选的，在所述衬底基板上形成保护层，并蚀刻掉所述像素电极表面的保护层。
优选的，在所述衬底基板上形成空穴注入层及空穴传输层。
优选的，所述第二金属层选用石墨烯薄膜材料。
优选的，在所述有源层与所述衬底基板之间，形成有缓冲层。
本发明的有益效果为：相较于现有的阵列基板制作方法，本发明的制作方法，通过同一道光罩可得到数据线、源极、漏极及像素电极，节省了加工不同电极所需的光罩，减少了形成不同层电极之间电连接的过孔所需的光罩，进而减少了曝光的工艺处理从而降低了工序复杂度，节省了材料，在缩短了加工时间的同时降低了加工成本。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1a至图1f是本发明提供的OLED显示装置的阵列基板的制造过程的示意图；
图2为本发明提供的OLED显示装置的阵列基板截面示意图。
具体实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
本发明针对现有的OLED显示装置的阵列基板制作方法，制作工艺较为复杂，生产效率较低，而且制作工序较多，成本增加，并且会使相关流程受到制程中产生的导电粒子的影响，进而影响产品的品质的技术问题，本实施例能够解决该缺陷。
本发明所提供的阵列基板制作方法，主要包括以下步骤：
S101，参照图1a，提供一衬底基板100；利用第一掩膜板图案，在所述衬底基板100上形成半导体的图形，其中包括每个驱动单元中的第一薄膜晶体管与第二薄膜晶体管的有源区域101、102。
具体的，利用物理气相沉积(Physical Vapor Deposition，简称PVD)工艺在衬底基板100上沉积一层a-Si(非晶硅)薄膜，然后利用所述第一掩膜板图案对a-Si薄膜进行湿法蚀刻，形成第一薄膜晶体管与第二薄膜晶体管的有源区域101、102。
S102，参照图1b，在以上图形的基础上，利用第二掩膜板图案，在所述衬底基板100上形成第一薄膜晶体管的导电沟道及第二薄膜晶体管的导电沟道，并通过离子注入工艺，形成第一薄膜晶体管的沟道掺杂区103、第二薄膜晶体管的沟道掺杂区104，位于第一薄膜晶体管的沟道掺杂区两侧的源极掺杂区105与漏极掺杂区106，以及位于第二薄膜晶体管的沟道掺杂区104两侧的源极掺杂区107与漏极掺杂区108。
S103，参照图1c，在以上图形的基础上，形成绝缘层109的图形。
具体的，利用化学气相沉积(Chemical Vapor Deposition，简称CVD)工艺在所述衬底基板100及半导体图形上沉积所述绝缘层109。
S104，参照图1c，在以上图形的基础上，利用第三掩膜板图案，形成第一金属层的图形，其中包括所述第一薄膜晶体管的栅极110，以及所述第二薄膜晶体管的栅极111。
具体的，利用PVD工艺在所述绝缘层109上沉积第一金属层，然后利用所述第三掩膜板对所述第一金属层进行湿法蚀刻，形成所述第一薄膜晶体管的栅极110，以及所述第二薄膜晶体管的栅极111。
S105，参照图1d，在以上图形的基础上，形成中间介质层112的图形，利用第四掩膜板图案，形成所述第一薄膜晶体管中的贯穿所述绝缘层109及中间介质层的过孔113，以及所述第二薄膜晶体管中的贯穿所述绝缘层109及中间介质层的过孔114。
具体的，利用所述第四掩膜板图案对所述中间介质层112及绝缘层109进行干法蚀刻，形成贯穿所述绝缘层109及中间介质层的过孔，其中包括用于连接第一薄膜晶体管的源极与源极掺杂区105、漏极与漏极掺杂区106、漏极与第二薄膜晶体管的栅极111、第二薄膜晶体管的源极与源极掺杂区107、第二薄膜晶体管的漏极与漏极掺杂区108的过孔。
S106，参照图1e，在以上图形的基础上，利用第五掩膜板图案，形成第二金属层的图形，其中包括所述第一薄膜晶体管的源极115与漏极116、所述第二薄膜晶体管的源极与漏极118以及数据线与像素电极。
具体的，第二薄膜晶体管的源极于所述第一薄膜晶体管的漏极116位于同一层，且位于所述第一薄膜晶体管的漏极116后方，因此所述第二薄膜晶体管的源极被遮挡，在图中未示出。
最后，参照图1f，在以上图形的基础上，沉积PV保护层119，并将位于所述像素电极表面的保护层119蚀刻掉，阵列基板制备完成。
具体的，在制作半导体层之前，在衬底基本上形成有缓冲层。
具体的，由于所述第一薄膜晶体管的源漏极与第二薄膜晶体管的源漏极与所述像素电极同层制作，因此全部选用具有高导电性、高透明度的石墨烯薄膜材料。
根据本发明的上述方法，得到一种OLED显示装置的阵列基板，参照图2，本实施例的OLED显示装置的阵列基板，包括：
衬底基板201；有源层，形成于所述衬底基板201上，其中包括第一薄膜晶体管T1的沟道掺杂区202、源极掺杂区203及漏极掺杂区204，以及第二薄膜晶体管T2的沟道掺杂区205、源极掺杂区206及漏极掺杂区207；栅极绝缘层208，形成于所述衬底基板201上；第一金属层，形成于所述衬底基板201上，其中包括所述第一薄膜晶体管T1的栅极211，以及所述第二薄膜晶体管T2的栅极212；中间介质层213，形成于所述衬底基板201上；过孔，贯穿于所述中间介质层213与栅极绝缘层208；第二金属层，形成于所述衬底基板201上，其中包括所述第一薄膜晶体管T1的源极214与漏极215、所述第二薄膜晶体管T2的源极与漏极216以及数据线与像素电极；其中，所述第一薄膜晶体管T1的源极214连接所述数据线，所述第一薄膜晶体管T1的漏极215连接所述第二薄膜晶体管T2的栅极212，所述第二薄膜晶体管T2的漏极216连接所述像素电极。
在上述步骤完成之后，在所述阵列基板的像素电极上依次制作空穴注入层、空穴传输层、发光层、电子传输层及阴极电极，即可得到OLED显示装置。
OLED显示装置中的驱动单元，由两个薄膜晶体管(Thin FilmTransistor，简称TFT)和一个存储电容Cst组成；其中，第一薄膜晶体管T1的栅极输入扫描信号Vgate，第一薄膜晶体管T1的源极输入数据信号Vdata，第一薄膜晶体管T1的漏极连接第二薄膜晶体管T2的栅极；第二薄膜晶体管T2的源极连接数字电源Vdd，第二薄膜晶体管的漏极连接数字地Vss，存储电容Cst设置在第二薄膜晶体管T2的栅极与源极之间，发管二极管串联在第二薄膜晶体管T2的漏极与数字地Vss之间。
优选的，在所述衬底基板201上形成保护层217，并蚀刻掉所述像素电极表面的保护层217。
优选的，在所述衬底基板201上形成空穴注入层及空穴传输层。
优选的，所述第二金属层选用石墨烯薄膜材料。
优选的，在所述有源层与所述衬底基板201之间，形成有缓冲层。
本发明的有益效果为：相较于现有的阵列基板制作方法，本发明的制作方法，通过同一道光罩可得到数据线、源极、漏极及像素电极，节省了加工不同电极所需的光罩，减少了形成不同层电极之间电连接的过孔所需的光罩，进而减少了曝光的工艺处理从而降低了工序复杂度，节省了材料，在缩短了加工时间的同时降低了加工成本。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种OLED显示装置的阵列基板制作方法，其特征在于，所述制备方法包括：
提供一衬底基板；
利用第一掩膜板图案，在所述衬底基板上形成半导体的图形，其中包括每个驱动单元中的第一薄膜晶体管与第二薄膜晶体管的有源区域；
在以上图形的基础上，利用第二掩膜板图案，在所述衬底基板上形成第一薄膜晶体管的导电沟道及第二薄膜晶体管的导电沟道，并通过离子注入工艺，形成沟道掺杂区，以及位于沟道掺杂区两侧的源极掺杂区与漏极掺杂区；
在以上图形的基础上，形成绝缘层的图形；
在以上图形的基础上，利用第三掩膜板图案，形成第一金属层的图形，其中包括所述第一薄膜晶体管的栅极，以及所述第二薄膜晶体管的栅极；
在以上图形的基础上，形成中间介质层的图形，利用第四掩膜板图案，形成所述第一薄膜晶体管中的贯穿所述绝缘层及中间介质层的过孔，以及所述第二薄膜晶体管中的贯穿所述绝缘层及中间介质层的过孔；
在以上图形的基础上，利用第五掩膜板图案，形成第二金属层的图形，其中包括所述第一薄膜晶体管的源极与漏极、所述第二薄膜晶体管的源极与漏极以及数据线与像素电极。
2.根据权利要求1所述的制作方法，其特征在于，还包括：在以上图形的基础上，形成保护层，利用第六掩膜板图案，刻蚀掉所述像素电极表面的保护层。
3.根据权利要求1所述的制作方法，其特征在于，在以上图形的基础上，形成空穴注入层及空穴传输层。
4.根据权利要求1所述的制作方法，其特征在于，所述第二金属层选用石墨烯薄膜材料。
5.根据权利要求1所述的制作方法，其特征在于，所述在衬底基板上形成半导体的图形之前，在所述衬底基板表面形成缓冲层。
6.一种OLED显示装置的阵列基板，其特征在于，包括：
衬底基板；
有源层，形成于所述衬底基板上，其中包括第一薄膜晶体管的沟道掺杂区、源极掺杂区及漏极掺杂区，以及第二薄膜晶体管的沟道掺杂区、源极掺杂区及漏极掺杂区；
栅极绝缘层，形成于所述衬底基板上；
第一金属层，形成于所述衬底基板上，其中包括所述第一薄膜晶体管的栅极，以及所述第二薄膜晶体管的栅极；
中间介质层，形成于所述衬底基板上；
过孔，贯穿于所述中间介质层与栅极绝缘层；
第二金属层，形成于所述衬底基板上，其中包括所述第一薄膜晶体管的源极与漏极、所述第二薄膜晶体管源极与的漏极以及数据线与像素电极；
其中，所述第一薄膜晶体管的源极连接所述数据线，所述第一薄膜晶体管的漏极连接所述第二薄膜晶体管的栅极，所述第二薄膜晶体管的漏极连接所述像素电极。
7.根据权利要求6的阵列基板，其特征在于，在所述衬底基板上形成保护层，并蚀刻掉所述像素电极表面的保护层。
8.根据权利要求6的阵列基板，其特征在于，在所述衬底基板上形成空穴注入层及空穴传输层。
9.根据权利要求6所述的阵列基板，其特征在于，所述第二金属层选用石墨烯薄膜材料。
10.根据权利要求6所述的阵列基板，其特征在于，在所述有源层与所述衬底基板之间，形成有缓冲层。
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