CN107017255A - 氮化物半导体装置及其制造方法 - Google Patents

氮化物半导体装置及其制造方法 Download PDF

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CN107017255A
CN107017255A CN201611054323.4A CN201611054323A CN107017255A CN 107017255 A CN107017255 A CN 107017255A CN 201611054323 A CN201611054323 A CN 201611054323A CN 107017255 A CN107017255 A CN 107017255A
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nitride semiconductor
control
electric potentials
semiconductor layer
area
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CN107017255B (zh
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长里喜隆
富田英幹
兼近将
兼近将一
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Denso Corp
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Toyota Motor Corp
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Abstract

本发明涉及一种氮化物半导体装置，其具备导电性基板和氮化物半导体层。氮化物半导体层存在于导电性基板之上。氮化物半导体层包括横向型的第一晶体管结构和横向型的第二晶体管结构。导电性基板包括第一电位控制区和第二电位控制区，第二电位控制区能够相对于第一电位控制区而独立地进行电位控制。在对氮化物半导体层进行俯视观察时，第一晶体管结构与第一电位控制区重叠，并且第二晶体管结构与第二电位控制区重叠。

Description

氮化物半导体装置及其制造方法
技术领域
本申请要求基于2015年11月27日提交的日本专利申请第2015-232371号申请的优先权。该申请的全部内容以参照的方式被引用于此。本说明书公开了涉及氮化物半导体装置及其制造方法的技术。
背景技术
将多个晶体管结构设置在一个氮化物半导体层中的氮化物半导体装置被公开于文献《“GaN Monolithic Inverter IC using Normally-off Gate InjectionTransistors with Planar Isolation on Si Substrate”,IEDM Tech.Dig.2009,p.165-168.》中(以下称为文献1)。在文献1的氮化物半导体装置中，在被设置于硅基板之上的氮化物半导体层内内置有多个横向型晶体管的结构。通过内置有多个晶体管结构，从而以一个氮化物半导体装置而构成了半导体电路。
发明内容
发明所要解决的问题
在横向型的氮化物半导体装置中，有时将导电性基板固定在特定电位(例如接地电位)。在该情况下，当晶体管结构各自独立地进行动作时，有时晶体管结构的主电极和导电性基板的电位差在每个晶体管结构中存在差异。其结果为，有时各个晶体管结构的特性会从设计值偏离，从而导致半导体电路无法正常地动作，缺乏可靠性。在本说明书中，提供一种实现了可靠性较高的氮化物半导体装置的技术。
用于解决课题的方法
在本说明书中公开的氮化物半导体装置具备：导电性基板，其具有导电性；氮化物半导体层，其存在于所述半导体基板之上，并且包括横向型的第一晶体管结构和横向型的第二晶体管结构。导电性基板包括第一电位控制区和第二电位控制区。第二电位控制区能够相对于第一电位控制区而独立地进行电位控制。在该氮化物半导体装置中，在对氮化物半导体层进行俯视观察时，第一晶体管结构与第一电位控制区重叠。此外，在对氮化物半导体层进行俯视观察时，第二晶体管结构与第二电位控制区重叠。
在上述的氮化物半导体装置中，由于在导电性基板之上设置有多个电位控制区(第一电位控制区、第二电位控制区)，因此，能够针对每个电位控制区来调节半导体基板的电位。其结果为，能够针对每个晶体管结构而对一对主电极中的一方(典型而言为低电位侧的电极)与导电性基板之间的电位差进行调节。即，在整体的晶体管结构中，能够将主电极中的一方与导电性基板之间的电位差设为固定。另外，主电极中的一方与导电性基板之间的电位差为固定也包括电位差为零(处于短路状态)的情况。此外，“包括横向型的第一晶体管结构和横向型的第二晶体管结构的氮化物半导体层”是指，在氮化物半导体层内存在至少两个横向型晶体管结构，并且有时也存在三个以上的横向型晶体管结构的情况。关于“导电性基板”也是存在至少两个电位控制区即可，有时也存在三个以上的电位控制区。
本说明书还公开了一种氮化物半导体装置的制造方法。该制造方法具备氮化物半导体层形成工序、晶体管形成工序和电位控制区分割工序。在氮化物半导体层形成工序中，在导电性基板上形成氮化物半导体层。在晶体管形成工序中，在氮化物半导体层内形成多个晶体管结构。在电位控制区分割工序中，将导电性基板分割为以能够独立地进行电位控制的方式而构成的多个电位控制区。
附图说明
图1表示第一实施例的氮化物半导体装置的剖视图。
图2表示第二实施例的氮化物半导体装置的剖视图。
图3表示第三实施例的氮化物半导体装置的剖视图。
图4表示第四实施例的氮化物半导体装置的剖视图。
图5表示第四实施例的氮化物半导体装置的制造工序。
图6表示第四实施例的氮化物半导体装置的制造工序。
图7表示第四实施例的氮化物半导体装置的制造工序。
图8表示第四实施例的氮化物半导体装置的制造工序。
图9表示利用第一至第四实施例的氮化物半导体装置而构成的半导体电路图。
具体实施方式
实施发明的方式
下面，对本说明书所公开的技术特征进行整理。另外，以下所记载的事项各自独立地具有技术上的有用性。
本说明书所公开的氮化物半导体装置具备导电性基板、和氮化物半导体层。作为导电性基板的材料，能够使用硅、碳化硅、氮化镓等。导电性基板也可以是向这些材料中导入了杂质的基板。另外，杂质可以是n型杂质及p型杂质中的任意一种。导电性基板可以被分割为能够独立地进行电位控制的多个电位控制区。多个电位控制区可以具有第一电位控制区和第二电位控制区。即，导电性基板可以至少包括第一电位控制区和第二电位控制区，所述第二电位控制区能够相对于第一电位控制区而独立地进行电位控制。
各电位控制区可以通过分离区而与其他的电位控制区分离。即，可以在第一电位控制区与第二电位控制区之间设置有将两者电性分离的分离区。分离区可以具有绝缘性。分离区可以通过对导电性基板进行物理性加工而形成。例如，可以采用如下方式，即，对导电性基板的一部分进行蚀刻，且设置从导电性基板的表面起至背面为止的沟槽，并通过沟槽而使各电位控制区彼此分离。在该情况下，沟槽为分离区。另外，也可以在沟槽内埋设绝缘体。作为绝缘体而列举出例如聚酰亚胺。或者，分离区也可以通过对导电性基板进行化学处理而形成。例如，可以通过对导电性基板的一部分进行氧化从而形成分离区。
氮化物半导体层被设置在导电性基板上。氮化物半导体层可以为一般式以InXAlYGa1-X-YN(0≤X≤1，0≤Y≤1，0≤1－X－Y≤1)来表示的物质。氮化物半导体层可以为层压了不同成分的氮化物半导体的半导体层。例如，氮化物半导体层可以包括异质结层。也可以在异质结层的表面的一部分上设置有p型氮化物半导体区。p型氮化物半导体区可以具有使形成在异质结面的附近的二维电子气层的一部分耗尽化的功能。氮化物半导体层可以为外延层。另外，氮化物半导体层也可以隔着缓冲层而被设置于导电性基板上。缓冲层可以为与氮化物半导体层成分不同的氮化物半导体。此外，缓冲层可以与导电性基板相比而为高电阻。通过高电阻的缓冲层而防止了各电位控制区的导通，从而能够防止各电位控制区意外地成为相同电位的情况。另外，在导电性基板和氮化物半导体层为相同材料时，不需要缓冲层。在该情况下，也可以在导电性基板与氮化物半导体层之间设置与导电性基板相比为高电阻的半导体层。
在氮化物半导体层的内部可以设置有多个横向型晶体管结构。多个横向型晶体管结构可以具有第一晶体管结构和第二晶体管结构。即，在氮化物半导体层内，可以至少形成横向型第一晶体管结构和横向型第二晶体管结构。可以采用如下方式，即，第一晶体管结构对应于上述第一电位控制区而被配置在氮化物半导体层内，并且第二晶体管结构对应于上述第二电位控制区而被配置在氮化物半导体层内。具体而言，也可以采用如下方式，即，在对氮化物半导体层进行俯视观察时，第一晶体管结构与第一电位控制区重叠，并且第二晶体管结构与第二电位控制区重叠。
另外，上述的“重叠”并不意味着在进行俯视观察时第一晶体管结构与第一电位控制区(第二晶体管结构与第二电位控制区)完全一致。例如，如果第一晶体管结构的大部分与第一电位控制区重叠，则第一晶体管结构的一部分也可以与第二电位控制区重叠。同样，如果第二晶体管的大部分与第二电位控制区重叠，则第二晶体管结构的一部分也可以与第一电位控制区重叠。更具体而言，在进行俯视观察时，只需第一晶体管结构的一对主电极间位于第一电位控制区的范围内即可，一对主电极间的外侧也可以位于第二电位控制区的范围内。同样，只需第二晶体管结构的一对主电极间位于第二电位控制区的范围内即可，一对主电极间的外侧也可以位于第一电位控制区的范围内。
各晶体管的结构可以为肖特基栅极晶体管、MOS晶体管等。此外，在氮化物半导体层的内部也可以设置有横向型晶体管结构以外的半导体结构。例如，在氮化物半导体层内也可以设置有横向型二极管结构。二极管结构可以为具有PN二极管、JBS(JunctionBarrier Schottky：结势垒肖特基)结构的肖特基栅极晶体管等。
在氮化物半导体层的内部也可以设置有将多个晶体管结构进行电性分离的元件分离结构。元件分离结构可以将晶体管结构与二极管结构电性分离。在对氮化物半导体层进行俯视观察时，元件分离结构也可以与上述分离区重叠。元件分离结构可以通过对氮化物半导体层的表面的一部分实施离子注入而形成。另外，此处所说的“重叠”也并不意味着元件分离结构与分离区完全一致。只要至少元件分离结构的一部分与分离区的一部分重叠即可。
也可以采用如下方式，即，在氮化物半导体层的背面上设置有导电性基板，并且在表面上设置有与晶体管结构连接的一对主电极。一对主电极可以为与高电位侧连接的高电位侧电极、和与低电位侧连接的低电位侧电极。此外，一对主电极中的一方可以与所对应的电位控制区短路。具体而言，可以采用如下方式，即，与第一晶体管结构对应的一对主电极中的一方在第一电位控制区内短路，并且与第二晶体管结构对应的一对主电极中的一方在第二电位控制区内短路。
上述主电极中的一方可以经由配线而与电位控制区连接。或者，可以采用如下方式，即，设置有从氮化物半导体层的表面起至导电性基板为止的贯穿孔，且在该贯穿孔内填充有导电性部件，并经由该导电性部件而对上述主电极中的一方与电位控制区进行连接。具体而言，氮化物半导体装置可以具备导电性部件，所述导电性部件被填充于从氮化物半导体层的表面起至背面为止的贯穿孔中。另外，可以采用如下方式，即，设置有多个从氮化物半导体层的表面起至背面为止的贯穿孔，并且在各个贯穿孔内填充导电性部件。多个导电性部件可以具有第一导电性部件和第二导电性部件。在该情况下，第一晶体管结构的一方的主电极与第一电位控制区经由第一导电性部件而短路，并且第二晶体管结构的一方的主电极与第二电位控制区经由第二导电性部件而短路。另外，在一对主电极之中，低电位侧电极可以与电位控制区短路。
通过本说明书中公开的制造方法，可以获得在被设置于导电性基板之上的氮化物半导体层内设置有多个晶体管结构的氮化物半导体装置。该制造方法可以具备：氮化物半导体层形成工序、晶体管形成工序和电位控制区分割工序。在氮化物半导体层形成工序中，在导电性基板上形成氮化物半导体层。在晶体管形成工序中，在氮化物半导体层内形成多个晶体管结构。此外，在电位控制区分割工序中，将导电性基板分割为以能够独立地进行电位控制的方式而构成的多个电位控制区。晶体管形成工序与电位控制区分割工序中的哪一方先实施均可。此外，晶体管形成工序可以在电位控制区分割工序的中途实施。另外，可以通过将导电性基板与氮化物半导体层贴合，从而在导电性基板上设置氮化物半导体层。或者，也可以在导电性基板上使氮化物半导体层结晶生长(外延生长)。也可以在导电性基板上使缓冲层生长，之后使氮化物半导体层结晶生长。另外，在使氮化物半导体层外延生长的情况下，例如无法使用SOI基板而使其生长。即，无法将氮化物半导体层与导电性基板绝缘，从而无法避免晶体管结构受到导电性基板的电位的影响。本说明书中所公开的技术在氮化物半导体层为外延层的情况下具有有用性。
在电位控制区分割工序中，可以形成从导电性基板的表面起至背面为止的沟槽。通过形成沟槽，从而导电性基板被物理分割，由此形成有相互绝缘(电性独立)的多个电位控制区。在电位控制区分割工序中，可以在形成沟槽之前使导电性基板的厚度变薄。由此能够使沟槽深度变浅，并且能够使电位控制区分割工序(蚀刻)简化。此外，在电位控制区分割工序中，可以在形成了沟槽之后将绝缘物填充在沟槽内。另外，在电位控制区分割工序中，可以通过使导电性基板的一部分变化为具有绝缘性，从而将所述导电性基板分割为多个电位控制区。
实施例
参照图1而对氮化物半导体装置100进行说明。在氮化物半导体装置100中，在共同的氮化物半导体层12内设置有多个晶体管结构。具体而言，氮化物半导体装置100具备第一晶体管结构50a、第二晶体管结构50b及第三晶体管结构50c。各晶体管结构50a、50b和50c为横向型晶体管结构。另外，在以下的说明中，对于与晶体管结构50a、50b和50c的共同的结构，有时会省略作为参照号码的字母来进行说明。
在硅基板2的表面上隔着缓冲区4而设置有氮化物半导体层12。在硅基板2中被导入有p型杂质。硅基板2的厚度被调节为400～600μm。硅基板2为导电性基板的一个示例。此外，缓冲层4的材料为氮化铝(AlN)。氮化物半导体层12具备第一氮化物半导体层6、第二氮化物半导体层8和第三氮化物半导体层10。在第一氮化物半导体层6的表面上设置有第二氮化物半导体层8，并且在第二氮化物半导体层8的表面上设置有第三氮化物半导体层10。第三氮化物半导体层10被设置于第二氮化物半导体层8的表面的一部分上。第一氮化物半导体层6的材料为氮化镓(GaN)，第二氮化物半导体层8的材料为氮化铝镓(AlGaN)，并且第三氮化物半导体层10的材料为氮化镓。第一氮化物半导体层6与第二氮化物半导体层8形成异质结。氮化物半导体层6、8为非掺杂半导体层，并且第三氮化物半导体层10作为p型杂质而含有镁(Mg)。第三氮化物半导体层10的杂质浓度被调节为7×1018～2×1019/cm-3。另外，作为缓冲层4的材料，也能够代替氮化铝而使用氮化铝镓。
在氮化物半导体层12内设置有元件分离结构24。元件分离结构24从第二氮化物半导体层8的表面起到达第一氮化物半导体层6内。即，元件分离结构24将第一氮化物半导体层6与第二氮化物半导体层8的异质结面截断。通过元件分离结构24，从而各晶体管结构50a、50b和50c被电性截断。即，各晶体管结构50a、50b和50c的范围通过相邻的元件分离结构24而被划分。另外，元件分离结构24通过向氮化物半导体层12内导入氮(N)离子而形成。
在氮化物半导体层12的表面上设置有源极14、漏极22以及栅电极18。源极14和漏极22以在第二氮化物半导体层8的表面上相分离的方式而配置。栅电极18被设置于第三氮化物半导体层10的表面上。栅电极18和第三氮化物半导体层10构成晶体管结构50的栅极部20。栅极部20被设置于源极14与漏极22之间。栅电极18的材料为镍(Ni)。源极14和漏极22为钛和铝的层压电极。源极14和漏极22通过钝化膜16而与栅极部20绝缘。作为钝化膜16而使用氮化硅(SiN)、氧化硅(SiO2)等。
在硅基板2中形成有多个沟槽28。沟槽28从硅基板2的表面(氮化物半导体层12侧)起到达背面。在沟槽28内填充有聚酰亚胺26。通过沟槽28而使硅基板2被分割为第一电位控制区2a、第二电位控制区2b及第三电位控制区2c。各电位控制区2a、2b及2c相互绝缘，并且能够独立地进行电位控制。沟槽28相当于被设置在硅基板2内的分离区。第一电位控制区2a与源极14a、第二电位控制区2b与源极14b、第三电位控制区2c与源极14c通过配线(省略图示)而被连接。另外，在对氮化物半导体层12进行俯视观察(从与氮化物半导体层12的表面正交的方向进行观察)时，沟槽28与元件分离结构24重叠。
第一晶体管结构50a、第二晶体管结构50b及第三晶体管结构50c以分别对应于第一电位控制区2a、第二电位控制区2b及第三电位控制区2c的方式而被配置在氮化物半导体层12内。更详细而言，在对氮化物半导体层12进行俯视观察时，第一晶体管结构50a与第一电位控制区2a重叠，第二晶体管结构50b与第二电位控制区2b重叠，并且第三晶体管结构50c与第三电位控制区2c重叠。另外，虽然详细内容将在后文中进行叙述，但可以采用如下方式，即，沟槽28以从背面朝向表面(氮化物半导体层12侧)而对硅基板2的一部分进行蚀刻的方式而形成。此时，沟槽28的底部可以到达缓冲区4内。
对晶体管结构50进行说明。晶体管结构50为常闭型的HFET(HeterostructureField Effect Transistor：异质结场效应晶体管)，并且作为沟道而利用形成在异质结面的附近的二维电子气层。具体而言，当向漏极22施加正电压、向源极14施加接地电压、向栅极部20施加正电压(导通电压)时，从源极14被注入的电子将穿过二维电子气层而向漏极22行进。在未向栅极部20施加导通电压时，耗尽层将从第三氮化物半导体层10起朝向异质结面延伸。通过耗尽层，从而使二维电子气层的电子匮乏，进而电子从源极14向漏极22的行进将停止。即，在未向栅极部20施加导通电压时，晶体管结构50维持断开状态，并且在向栅极部20施加导通电压时切换为导通状态。晶体管结构50为常闭型的晶体管。
如上文所述，在氮化物半导体装置100中，电位控制区2a、2b及2c能够分别独立地进行电位控制。因此，即使源极14a、14b或14c的电位各不相同，在各晶体管结构50a、50b及50c中也能够将源极14与电位控制区(硅基板)2之间的电位差设为固定(或电位差为零)。由此能够抑制各晶体管结构50a、50b及50c的动作从设计值偏离的情况。
在此，参照图9而对使用了氮化物半导体层100的半导体电路60进行说明。半导体电路60具备四个晶体管70、72、74及76。四个晶体管70、72、74及76构成全桥电路。具体而言，晶体管70与72被串联连接，晶体管74与76被串联连接，并且晶体管70与74被并联连接。在晶体管70与72之间连接有输入输出配线65。此外，在晶体管74与76之间连接有输入输出配线63。
晶体管70、74与高电位配线62连接，从而构成上桥臂电路。晶体管72、76与低电位配线64连接，从而构成下桥臂电路。各晶体管70、72、74及76分别与栅极配线70g、72g、74g及76g连接。栅极配线70g、72g、74g及76g与控制器66连接。控制器66能够对各栅极配线70g、72g、74g及76g输出不同的控制信号。即，晶体管70、72、74及76能够各自独立地进行驱动。此外，各个晶体管70、72、74及76分别与各个反馈二极管70a、72a、74a及76a连接。
图1所示的晶体管结构50a、50b及50c能够被应用在晶体管70、72、74及76中的任意一个上。例如，能够采用如下方式，即，第一晶体管结构50a构成晶体管70，第二晶体管结构50b构成晶体管74，第三晶体管结构50c构成晶体管72。另外，也可以将与晶体管76对应的晶体管结构设置在氮化物半导体层12内。在该情况下，晶体管70及74(晶体管结构50a、50b)的源极电位会发生变动。然而，在氮化物半导体装置100的情况下，源极14a所连接的第一电位控制区2a、和源极14b所连接的第二电位控制区2b从其他的电位控制区中电性独立。因此，能够使晶体管结构50a、50b中的源极和电位控制区(基板)之间的电位差、与其他的晶体管结构中的源极和电位控制区之间的电位差相等。
另外，在半导体电路60中，晶体管72与晶体管76的源极电位不发生变动。因此，晶体管72、76的源极也可以与共同的电位控制区连接。例如，在图1的第三晶体管结构50c构成图9的晶体管结构72的情况下，当在氮化物半导体层12内设置有与晶体管76对应的晶体管结构时，其晶体管结构的电位控制区也可以与晶体管结构50c的电位控制区2c导通。但是，晶体管72、76的源极也可以与能够独立地进行电位控制的电位控制区连接。例如，也可以采用如下方式，即，第一晶体管结构50a构成晶体管72，并且第二晶体管结构50b构成晶体管76。在该情况下，晶体管72的电位控制区2a与晶体管76的电位控制区2b为非导通状态，并且能够独立地实施电位控制。
或者，也可以采用如下方式，即，第一晶体管结构50a构成晶体管70，第二晶体管结构50b构成晶体管72，第三晶体管结构50c构成晶体管76。在该情况下，由于第一电位控制区2a与第二电位控制区2b电性独立，因此在晶体管70和晶体管72中能够将源极与电位控制区之间的电位差设为固定。另外，在该情况下，也可以将与晶体管74对应的晶体管结构设置在氮化物半导体层12内。
参照图2而对第二实施例的氮化物半导体装置200进行说明。氮化物半导体装置200为氮化物半导体装置100的改变例，并且对于在氮化物半导体层12内设置有二极管结构的这一点，与氮化物半导体装置100不同。在氮化物半导体装置200中，通过对与氮化物半导体装置100相同的结构标注相同的参照符号而省略说明。
氮化物半导体装置200具备：第一晶体管结构50a、第二晶体管结构50b以及二极管50d。二极管50d具备氮化物半导体层12、阳极32和阴极30。阳极32和阴极30以在氮化物半导体层12上隔开间隔的方式而配置。阳极32和阴极30通过钝化膜而被相互绝缘。在氮化物半导体装置200中，第一晶体管机构50a、第二晶体管结构50b也能够构成晶体管70、72、74和76中的任意一个(参照图9)。此外，二极管50d也能够构成二极管70a、72a、74a及76a中的任意一个。另外，在氮化物半导体层12内，也可以设置有图9所示的晶体管70、72、74及76、二极管70a、72a、74a及76a的全部。
参照图3而对第三实施例的氮化物半导体装置300进行说明。氮化物半导体装置300为氮化物半导体装置100的改变例，并且源极14与硅基板2(电位控制区2a～2c)的连接方法与氮化物半导体装置100不同。在氮化物半导体装置300中，通过对与氮化物半导体装置100相同的结构标注相同的参照符号而省略说明。
在氮化物半导体装置300中，设置有从氮化物半导体层12的表面起至硅基板2为止的贯穿孔42。在贯穿孔42内填充有导电性部件40。导电性部件40的材料为铝。导电性部件40利用溅射法而被填充于贯穿孔42内。导电性部件40对各个源极14、和与各个源极对应的电位控制区2a、2b或2c进行连接。即，导电性部件40使源极14a与第一电位控制区2a、源极14b与第二电位控制区2b、源极14c与第三电位控制区2c短路。氮化物半导体装置300通过利用被配置在氮化物半导体层12内的导电性部件40，从而能够省略连接源极14与电位控制区2a～2c的配线。另外，贯穿孔42并未使各晶体管结构50a、50b及50c分离。贯穿孔42在各晶体管结构50a、50b及50c的内部从氮化物半导体层12的表面起到达硅基板2。
参照图4而对第四实施例的氮化物半导体装置400进行说明。氮化物半导体装置400为氮化物半导体装置100的改变例，并且硅基板402的厚度与氮化物半导体装置100的硅基板2不同。具体而言，硅基板402的厚度被调节为50～100μm。在硅基板402中配置有沟槽428，并且在沟槽428内填充有聚酰亚胺426。由于氮化物半导体装置400的其他结构与氮化物半导体装置100相同，因此通过标注相同的参照符号而省略说明。
参照图5至图8而对氮化物半导体装置400的制造方法进行说明。首先，如图5所示，在硅基板402的表面上使以AlN作为材料的缓冲区4生长。缓冲区4大致在700℃下生长。之后，使以GaN为材料的第一氮化物半导体层6结晶生长，使以AlGaN为材料的第二氮化物半导体层结晶生长，并且使以GaN为材料的第三氮化物半导体层10d结晶生长。氮化物半导体层的形成工序结束。在使第三氮化物半导体层10d结晶生长时，向原料气体导入Cp2Mg(二茂基镁)。氮化物半导体层6、8及10d大致在1000℃下结晶生长。另外，硅基板402d的厚度被调节为400～600μm。另外，也可以在硅基板402d的表面上使以AlGaN为材料的缓冲区4生长。
接下来，如图6所示，对硅基板402d的背面进行研磨，从而完成厚度被调节为50～100μm的硅基板402。图6中的硅基板402的厚度与图4所示的硅基板402的厚度相同。之后，如图7所示，对硅基板402的一部分进行蚀刻，从而形成沟槽428。沟槽428相当于图4的沟槽428。通过对硅基板402d进行研磨而能够使沟槽428的深度变浅，从而能够简化形成沟槽的工序(比较参照图1)。通过形成沟槽428，从而硅基板402被分割为电位控制区402a、402b及402c。
接下来，如图8所示，在氮化物半导体层12的表面上形成源极14、漏极22及栅电极18等而形成晶体管结构50。在晶体管结构50中，在图7的第三氮化物半导体层10d的表面的一部分上形成蚀刻掩模(省略图示)，并且对未形成蚀刻掩模的部分的第三氮化物半导体层10d进行蚀刻直至第二氮化物半导体层8露出。由此，图8所示的第三氮化物半导体层10(10a～10c)完成。之后，在第二氮化物半导体层8和第三氮化物半导体层10a～10c的表面的一部分上形成蚀刻掩模(省略图示)，并且向未形成有蚀刻掩模的部分注入氮(N)离子。素子分离结构24完成。之后，将蚀刻掩模去除，并且通过利用已知的方法来形成栅电极18、源极14、漏极22及钝化膜16，从而结束晶体管形成工序。
接下来，在沟槽428内填充聚酰亚胺426。通过以上方式而使电位控制区分割工序结束，从而完成图4所示的氮化物半导体装置400。另外，虽然在上述说明中，以在电位控制区分割工序的中途实施晶体管形成工序为例而进行了说明，但也可以在晶体管形成工序结束之后实施电位控制区分割工序。在沟槽428内填充聚酰亚胺426的情况下，为了防止聚酰亚胺因形成电极时的热量而劣化，至少在沟槽428内填充聚酰亚胺426的工序要在晶体管形成工序结束后实施。另外，也可以不在沟槽428内填充聚酰亚胺426。在该情况下，在形成了沟槽428时电位控制区分割工序结束。在沟槽428内不填充聚酰亚胺426的情况下，电位控制区分割工序和晶体管形成工序中的哪一个先实施均可。此外，在形成沟槽428时，沟槽428的底部也可以到达缓冲区4内。
另外，硅基板402d的厚度与氮化物半导体装置100的硅基板2的厚度(参照图1)相同。因此，通过省略图6的研磨，从而能够以实质上与氮化物半导体装置100相同的工序来制造氮化物半导体装置400。此外，在对图8的第三氮化物半导体层10d进行蚀刻的工序中，通过将设置有第一二极管50d的范围的第三氮化物半导体层10d去除，从而能够以实质上与氮化物半导体装置100相同的工序来制造氮化物半导体装置200。在晶体管形成工序中，通过追加形成从氮化物半导体层12的表面起至硅基板2为止的贯穿孔42的工序，从而能够以实质上与氮化物半导体装置100相同的工序来制造氮化物半导体装置300。
在上述的实施例中，示出了如下的氮化物半导体装置，即，在氮化物半导体层内设置有三个晶体管结构的氮化物半导体装置(氮化物半导体装置100、300、400)、以及在氮化物半导体层内设置有两个晶体管结构和一个二极管结构的氮化物半导体装置。但是，被设置于氮化物半导体层内的晶体管的数量并不限定于上述实施例。本说明书所公开的技术能够应用于在共同的氮化物半导体层内具备两个以上晶体管结构的任意一种氮化物半导体装置中。
此外，在上述实施例中，以源极(低电位侧电极)与电位控制区相连接(即，处于短路状态)为例来进行了说明。但是，本说明书所公开的技术也能够应用于例如在源极与电位控制区之间存在有电位差的方式中。重要的是，基板被分割为多个电位控制区，并且能够独立于其他电位控制区而对各个电位控制区的电位进行控制。
虽然以上对本发明的具体例进行了详细说明，但这些只不过是例示，并不对权利要求书进行限定。在权利要求书中所记载的技术中，包括对上文所示的具体例进行了各种变形、变更的技术。此外，本说明书或附图中所说明的技术要素通过单独或各种组合的方式来发挥技术上的有用性，其并不被限定于申请时权利要求中所记载的组合。此外，本说明书或附图中所例示的技术为同时达成多个目的的技术，而达成其中一个目的本身便具有技术上的有用性。

Claims (13)

1.一种氮化物半导体装置，具备：
导电性基板，其具有导电性；
氮化物半导体层，其存在于所述半导体基板之上，并且包括横向型的第一晶体管结构和横向型的第二晶体管结构，
所述导电性基板包括第一电位控制区和第二电位控制区，所述第二电位控制区能够相对于所述第一电位控制区而独立地进行电位控制，
在对所述氮化物半导体层进行俯视观察时，所述第一晶体管结构与所述第一电位控制区重叠，并且所述第二晶体管结构与所述第二电位控制区重叠。
2.如权利要求1所述的氮化物半导体装置，其中，
在所述第一电位控制区与所述第二电位控制区之间，存在有将二者电性分离的分离区。
3.如权利要求2所述的氮化物半导体装置，其中，
所述分离区为，存在于所述第一电位控制区与所述第二电位控制区之间的沟槽。
4.如权利要求2或3所述的氮化物半导体装置，其中，
将所述第一晶体管结构与所述第二晶体管结构电性分离的元件分离结构存在于所述氮化物半导体层内，
在对所述氮化物半导体层进行俯视观察时，所述元件分离结构与所述分离区重叠。
5.如权利要求1所述的氮化物半导体装置，其中，
在所述导电性基板与所述氮化物半导体层之间，存在有与所述导电性基板相比为高电阻的半导体层。
6.如权利要求1所述的氮化物半导体装置，其中，
与所述第一晶体管结构对应的一对主电极中的一方在所述第一电位控制区内短路，
与所述第二晶体管结构对应的一对主电极中的一方在所述第二电位控制区内短路。
7.如权利要求6所述的氮化物半导体装置，其中，
还具备导电性部件，所述导电性部件被填充于从所述氮化物半导体层的表面起至所述导电性基板为止的贯穿孔中，
所述导电性部件具有第一导电性部件和第二导电性部件，
所述第一晶体管结构的所述一方的主电极与所述第一电位控制区经由所述第一导电性部件而短路，
所述第二晶体管结构的所述一方的主电极与所述第二电位控制区经由所述第二导电性部件而短路。
8.如权利要求1所述的氮化物半导体装置，其中，
所述第一晶体管结构和第二晶体管结构中的至少一方与全桥电路的上桥臂相对应，
所述第一晶体管结构的所述一方的主电极为源极，
所述第二晶体管结构的所述一方的主电极为源极。
9.如权利要求1所述的氮化物半导体装置，其中，
所述第一晶体管结构与第二晶体管结构为异质结场效应晶体管。
10.如权利要求1所述的氮化物半导体装置，其中，
所述氮化物半导体为外延层。
11.一种制造方法，具备：
氮化物半导体层形成工序，在导电性基板上形成氮化物半导体层；
晶体管形成工序，在所述氮化物半导体层内形成多个晶体管结构；
电位控制区分割工序，将所述导电性基板分割为以能够独立地进行电位控制的方式而构成的多个电位控制区。
12.如权利要求11所述的制造方法，其中，
所述电位控制区分割工序具有形成从所述导电性基板的表面起至背面为止的沟槽的工序。
13.如权利要求12所述的制造方法，其中，
所述电位控制区分割工序具有在形成所述沟槽之前使所述导电性基板的厚度变薄的工序。
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