CN106932986B - 阵列基板结构及阵列基板的制备方法 - Google Patents
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- 239000002184 metal Substances 0.000 claims abstract description 83
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 35
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 4
- 238000000059 patterning Methods 0.000 claims description 12
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims description 6
- 239000007772 electrode material Substances 0.000 claims description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- GRPQBOKWXNIQMF-UHFFFAOYSA-N indium(3+) oxygen(2-) tin(4+) Chemical compound [Sn+4].[O-2].[In+3] GRPQBOKWXNIQMF-UHFFFAOYSA-N 0.000 claims 1
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Abstract
本发明涉及一种阵列基板结构及阵列基板的制备方法。该阵列基板的制备方法包括:步骤1、在基板上制备第一金属层,图案化第一金属层,制备栅电极;步骤2、在基板上制备栅极绝缘层,制备有源层;步骤3、在栅极绝缘层上对应于第一金属层形成第一过孔;步骤4、在栅极绝缘层上制备第二金属层,图案化第二金属层,制备源/漏电极,并且对应于有源层形成第二过孔,第一金属层与第二金属层在第一过孔处连接;步骤5、通制备像素电极,像素电极与源/漏电极在第二过孔处直接连接,第二金属层由像素电极覆盖保护。本发明还提供了相应的阵列基板结构。本发明能够提升高分辨率下像素开口率和液晶显示器的显示效果和品质,改善了面板的电学特性。
Description
技术领域
本发明涉及液晶显示器领域,尤其涉及一种阵列基板结构及阵列基板的制备方法。
背景技术
液晶显示器是目前使用最广泛的一种平板显示器,已经逐渐成为各种电子设备如移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕所广泛应用具有高分辨率彩色屏幕的显示器。目前普遍采用的液晶显示器,通常有上下衬底和中间液晶层组成,衬底有玻璃和电极等组成。如果上下衬底都有电极,可以形成纵向电场模式的显示器,如扭曲向列(TN,Twist Nematic)模式,垂直配向(VA,Vertical Alignment)模式,以及为了解决视角过窄开发的多畴垂直配向(MVA,Multi-domain Vertical Alignment)模式。另外一类与上述显示器不同,电极只位于衬底的一侧,形成横向电场模式的显示器,如平面转换(IPS,In-plane switching)模式、边缘场开关(FFS,Fringe Field Switching)模式等。
薄膜晶体管显示器,以其高开口、高分辨率、广视角等特点为液晶电视等大尺寸面板采用,但高分辨率面板中,使用传统制程方法设计的像素开口率低,边框宽度的阵列基板行驱动(GOA)电路宽。
参见图1,其为现有的阵列基板5道光罩制程示意图。现有的5道光罩制程主要包括:提供基板10,在基板10上制备第一金属层11,通过第一道光罩图案化第一金属层11,制备栅(Gate)电极12,除栅电极12外的第一金属层11可形成扫描线和公共电极线等结构;在基板10上制备栅极绝缘层(GI)13,通过第二道光罩制备有源层14;制备第二金属层15,通过第三道光罩图案化第二金属层15,制备源/漏(Source/Drain)电极16,除源/漏电极16外的第二金属层15可形成数据线等结构;制备保护层17,通过第四道光罩制备在保护层17上形成过孔,过孔位置分别对应于源/漏电极16,液晶显示***驱动电路部分的第一金属层11和第二金属层15;通过第五道光罩制备像素电极18,像素电极材料可以为氧化铟锡(ITO)。
图2所示为基于现有5道光罩制程的像素结构示意图,图中所示为VA像素结构,除VA像素外还可以是IPS等像素结构。有源层(Active layer)及其附近的栅极,源极和漏极构成了驱动像素电极(Pixel electrode)的薄膜晶体管,像素电极与源/漏电极经由过孔(VIA)相互连接。液晶显示***驱动电路主要包括扫描线(Gate line),数据线(Dataline),公共电极线(Comline)。
基于以上技术制造的高分辨率液晶显示器,有以下缺点:
1.像素内源/漏(Source/Drain)电极与像素电极连接需要过孔,在高分辨率液晶显示器中,该过孔降低了液晶显示器的开口率,进而影响液晶显示器的液晶效率。
2.在液晶显示***驱动电路,第一层金属和第二层金属连接需要使用ITO桥接,该种桥接结构增加了边框,尤其是影响GOA电路的面积,另外ITO桥接结构增加了桥接的阻抗,影响面板的电学特性。
发明内容
因此,本发明的目的在于提供一种阵列基板的制备方法,提升高分辨液晶显示器的穿透率,降低边框宽度。
本发明的另一目的在于提供一种阵列基板结构,提升高分辨液晶显示器的穿透率,降低边框宽度。
为实现上述目的,本发明提供了一种阵列基板的制备方法,包括:
步骤1、提供基板,在基板上制备第一金属层,通过第一道光罩图案化第一金属层,制备栅电极;
步骤2、在基板上制备栅极绝缘层,通过第二道光罩制备有源层;
步骤3、通过第三道光罩在栅极绝缘层上对应于第一金属层形成第一过孔;
步骤4、在栅极绝缘层上制备第二金属层,通过第四道光罩图案化第二金属层,制备源/漏电极,并且对应于有源层形成第二过孔,第一金属层与第二金属层在第一过孔处连接;
步骤5、通过第五道光罩制备像素电极,像素电极与源/漏电极在第二过孔处直接连接,第二金属层由像素电极覆盖保护。
其中,所述阵列基板为VA型液晶显示器的阵列基板。
其中,所述阵列基板为IPS型液晶显示器的阵列基板。
其中,所述像素电极材料为氧化铟锡。
其中,步骤1中,该第一金属层图案化后还形成扫描线和公共电极线。
其中,步骤4中,该第二金属层图案化后还形成数据线。
本发明还相应提供了一种阵列基板结构,其包括逐层制备得到的基板,第一金属层和栅电极,栅极绝缘层,有源层,第二金属层和源/漏电极,以及像素电极;在栅极绝缘层上对应于第一金属层设有第一过孔,源/漏电极对应于有源层的位置形成第二过孔,第一金属层与第二金属层在第一过孔处连接,像素电极与源/漏电极在第二过孔处直接连接,第二金属层由像素电极覆盖保护。
其中,所述阵列基板为VA型液晶显示器的阵列基板。
其中,所述阵列基板为IPS型液晶显示器的阵列基板。
其中,所述像素电极材料为氧化铟锡。
综上,本发明的阵列基板结构及阵列基板的制备方法能够提升高分辨率下像素开口率和液晶显示器的显示效果和品质,改善了面板的电学特性。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其他有益效果显而易见。
附图中,
图1为现有的阵列基板5道光罩制程示意图;
图2为基于现有5道光罩制程的像素结构示意图;
图3为本发明阵列基板的制备方法的制程示意图;
图4为本发明阵列基板的像素结构示意图;
图5为本发明阵列基板的像素结构分层示意图;
图6为本发明阵列基板的制备方法的流程图。
具体实施方式
参见图6,其为本发明阵列基板的制备方法的流程图。该方法主要包括:
步骤1、提供基板,在基板上制备第一金属层,通过第一道光罩图案化第一金属层,制备栅电极;
步骤2、在基板上制备栅极绝缘层,通过第二道光罩制备有源层;
步骤3、通过第三道光罩在栅极绝缘层上对应于第一金属层形成第一过孔;
步骤4、在栅极绝缘层上制备第二金属层,通过第四道光罩图案化第二金属层,制备源/漏电极,并且对应于有源层形成第二过孔,第一金属层与第二金属层在第一过孔处连接;
步骤5、通过第五道光罩制备像素电极,像素电极与源/漏电极在第二过孔处直接连接,第二金属层由像素电极覆盖保护。
本发明提供了一种新的液晶显示器阵列基板的制作工艺,该工艺中第一金属层和第二金属层通过过孔直接相连,第二金属层使用ITO覆盖保护,基于该种制程制作的液晶显示器,具有高像素开口率和窄边框等优点。
参见图3,其为本发明阵列基板的制备方法的制程示意图,用于进一步说明本发明阵列基板的制备方法。
提供基板30,在基板30上制备第一金属层31,通过第一道光罩图案化第一金属层31,制备栅电极32,除栅电极32外的第一金属层31可形成扫描线和公共电极线等结构;
然后在基板30上制备栅极绝缘层33,通过第二道光罩制备有源层34;
通过第三道光罩在栅极绝缘层33上对应于第一金属层31形成第一过孔38,第一过孔38位置对应于液晶显示***驱动电路部分的第一金属层31;
在栅极绝缘层33上制备第二金属层35,通过第四道光罩图案化第二金属层35,制备源/漏电极36,并且对应于有源层34的位置形成第二过孔39,第一金属层31与第二金属层35在第一过孔38处连接,除源/漏电极36外的第二金属层35可形成数据线等结构;
通过第五道光罩制备像素电极37,像素电极37与源/漏电极36在第二过孔39处直接连接,第二金属层35由像素电极37覆盖保护,像素电极37材料可以为氧化铟锡(ITO)。
本发明的工艺中第一金属层31和第二金属层35通过第一过孔38直接相连,第二金属层35使用ITO覆盖保护。
根据本发明阵列基板的制备方法,本发明提供了相应的阵列基板结构,如图3所示,包括逐层制备得到的基板30,第一金属层31和栅电极32,栅极绝缘层33,有源层34,第二金属层35和源/漏电极36,以及像素电极37;在栅极绝缘层33上对应于第一金属层31设有第一过孔38,源/漏电极36对应于有源层34的位置形成第二过孔39,第一金属层31与第二金属层35在第一过孔38处连接,像素电极37与源/漏电极36在第二过孔39处直接连接,第二金属层35由像素电极37覆盖保护。
参见图4,其为本发明阵列基板的像素结构示意图。图中所示为VA像素结构,除VA像素外还可以是IPS等像素结构。有源层(Active layer)及其附近的栅极,源极和漏极构成了驱动像素电极(Pixel electrode)的薄膜晶体管,像素电极与源/漏电极在有源层位置的过孔处直接连接。液晶显示***驱动电路主要包括扫描线(Gate line),数据线(Dataline),公共电极线(Com line)。
基于以上技术制造的高分辨率液晶显示器,有以下优点:
1.像素内源/漏电极与像素电极通过过孔直接连接,在高分辨率液晶显示器中,该过孔提升了液晶显示器的开口率,进而提升液晶显示器的液晶效率。
2.在液晶显示器***驱动电路,第一金属层和第二金属层连接不需要使用ITO桥接,本发明的桥接方式降低了边框宽度,尤其是降低GOA电路的面积,另外该种桥接方式降低了桥接的阻抗,改善了面板的电学特性。
参见图5,其为本发明阵列基板的像素结构分层示意图,分层别说明了图4中像素的结构,可对应五道光罩制程。第一道光罩制程,形成栅电极,以及其余第一金属层图案,可包括扫描线和公共电极线等;第二道光罩制程,对应于栅电极的位置形成有源层;第三道光罩制程,对应于其余第一金属层图案形成过孔;第四道光罩制程,形成源/漏电极;第五道光罩制程,形成像素电极,第二金属层利用氧化铟锡覆盖保护。
综上,本发明的阵列基板结构及阵列基板的制备方法能够提升高分辨率下像素开口率和液晶显示器的显示效果和品质,改善了面板的电学特性。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。
Claims (10)
1.一种阵列基板的制备方法,其特征在于,包括:
步骤1、提供基板,在基板上制备第一金属层,通过第一道光罩图案化第一金属层,制备栅电极;
步骤2、在基板上制备栅极绝缘层,通过第二道光罩制备有源层;
步骤3、通过第三道光罩在栅极绝缘层上对应于第一金属层形成第一过孔;
步骤4、在栅极绝缘层上制备第二金属层,通过第四道光罩图案化第二金属层,制备源/漏电极,并且对应于有源层形成第二过孔,第一金属层与第二金属层在第一过孔处连接;
步骤5、通过第五道光罩制备像素电极,像素电极与源/漏电极在第二过孔处直接连接,第二金属层由像素电极覆盖保护。
2.如权利要求1所述的阵列基板的制备方法,其特征在于,所述阵列基板为VA型液晶显示器的阵列基板。
3.如权利要求1所述的阵列基板的制备方法,其特征在于,所述阵列基板为IPS型液晶显示器的阵列基板。
4.如权利要求1所述的阵列基板的制备方法,其特征在于,所述像素电极材料为氧化铟锡。
5.如权利要求1所述的阵列基板的制备方法,其特征在于,步骤1中,该第一金属层图案化后还形成扫描线和公共电极线。
6.如权利要求1所述的阵列基板的制备方法,其特征在于,步骤4中,该第二金属层图案化后还形成数据线。
7.一种阵列基板结构,其特征在于,包括逐层制备得到的基板,第一金属层和栅电极,栅极绝缘层,有源层,第二金属层和源/漏电极,以及像素电极;在栅极绝缘层上对应于第一金属层设有第一过孔,源/漏电极对应于有源层的位置形成第二过孔,第一金属层与第二金属层在第一过孔处连接,像素电极与源/漏电极在第二过孔处直接连接,第二金属层由像素电极覆盖保护。
8.如权利要求7所述的阵列基板结构,其特征在于,所述阵列基板为VA型液晶显示器的阵列基板。
9.如权利要求7所述的阵列基板结构,其特征在于,所述阵列基板为IPS型液晶显示器的阵列基板。
10.如权利要求7所述的阵列基板结构,其特征在于,所述像素电极材料为氧化铟锡。
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