CN106816468A - 具有resurf结构的横向扩散金属氧化物半导体场效应管 - Google Patents

具有resurf结构的横向扩散金属氧化物半导体场效应管 Download PDF

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CN106816468A
CN106816468A CN201510864548.5A CN201510864548A CN106816468A CN 106816468 A CN106816468 A CN 106816468A CN 201510864548 A CN201510864548 A CN 201510864548A CN 106816468 A CN106816468 A CN 106816468A
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source electrode
doped region
gate
drain electrode
grid
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CN106816468B (zh
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祁树坤
孙贵鹏
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Wuxi CSMC Semiconductor Co Ltd
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Wuxi CSMC Semiconductor Co Ltd
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Priority to JP2018527941A priority patent/JP6615348B2/ja
Priority to US15/779,666 priority patent/US10505036B2/en
Priority to PCT/CN2016/096730 priority patent/WO2017092419A1/zh
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Abstract

本发明涉及一种具有RESURF结构的横向扩散金属氧化物半导体场效应管,包括衬底,栅极,源极,漏极,体区,源极和漏极之间的场氧区,以及衬底上的第一、第二阱区,所述栅极下方的第二阱区内设有多个栅极掺杂区,所述栅极的多晶硅栅为多段式结构,各段之间相互分离,各个所述栅极掺杂区设于各段多晶硅栅之间的空隙下方,每个所述栅极掺杂区均与其两侧的两段多晶硅栅中靠源极方向的一段电性连接。本发明沟道电子的数量得到了增加,且电子在从源极流向漏极的过程中被多次加速,相当于提高了沟道电场和沟道电流,因此沟道电阻得到降低,从而降低了导通电阻。

Description

具有RESURF结构的横向扩散金属氧化物半导体场效应管
技术领域
本发明涉及半导体工艺,特别是涉及一种具有RESURF结构的横向扩散金属氧化物半导体场效应管。
背景技术
采用RESURF(降低表面电场)原理的基本结构由低掺杂的P型衬底和低掺杂的N型外延层组成。在外延层上形成P阱并注入N+、P+,形成一个横向的P-well/N-epi结和一个纵向的P-sub/N-epi结。由于横向结两端有着更高的掺杂浓度,因此击穿电压比纵向结更低。RESURF的基本原理是利用横向结和纵向结的相互作用,使外延层在横向结达到临界雪崩击穿电场前完全耗尽,通过合理优化器件参数使得器件的击穿发生在纵向结,从而起到降低表面电场的作用。
传统RESURF结构的横向扩散金属氧化物半导体场效应管(LDMOSFET)要改善导通电阻Rsp,主要通过调整漂移区的杂质浓度,同时满足RESURF要求。但由于掺杂浓度与关态击穿是呈现反比关系,仅通过改善漂移区电阻Rdr来改善导通电阻有其局限性。
发明内容
基于此,有必要提供一种导通电阻较低的具有RESURF结构的横向扩散金属氧化物半导体场效应管。
一种具有RESURF结构的横向扩散金属氧化物半导体场效应管,包括衬底,栅极,源极,漏极,体区,源极和漏极之间的场氧区,以及衬底上的第一、第二阱区,其中第一阱区为第一导电类型,第二阱区为第二导电类型,第一导电类型和第二导电类型为相反的导电类型,所述源极和体区设于所述第二阱区内,所述漏极设于所述第一阱区内;所述栅极下方的第二阱区内设有多个第一导电类型的栅极掺杂区,所述栅极的多晶硅栅为多段式结构,各段之间相互分离,各个所述栅极掺杂区设于各段多晶硅栅之间的空隙下方,每个所述栅极掺杂区均与其两侧的两段多晶硅栅中靠源极方向的一段多晶硅栅电性连接。
在其中一个实施例中,所述栅极中的一段多晶硅栅延伸至所述场氧区上。
在其中一个实施例中,还包括金属连线层,每个所述栅极掺杂区是通过所述金属连线层与多晶硅栅电性连接。
在其中一个实施例中,各相邻的两段多晶硅栅在垂直于源极和漏极之间的沟道电流的方向上也设置有多个栅极掺杂区。
在其中一个实施例中,源极和漏极之间的沟道电流的方向上相邻的栅极掺杂区的间距不大于0.8微米。
在其中一个实施例中,在源极和漏极之间的沟道电流的方向上设置有3~5组所述栅极掺杂区,每组包括至少一个栅极掺杂区。
在其中一个实施例中,每组栅极掺杂区包括多个,每组中的各栅极掺杂区的排列方向为垂直于源极和漏极之间的沟道电流的方向。
在其中一个实施例中,每个栅极掺杂区的宽度为1~2.5微米。
在其中一个实施例中,各栅极掺杂区峰值浓度为1.0~2.0E17/cm3。
在其中一个实施例中,所述第一导电类型为N型,所述第二导电类型为P型。
上述具有RESURF结构的横向扩散金属氧化物半导体场效应管,沟道电子的数量增加,且电子在从源极流向漏极的过程中被多次加速,相当于提高了沟道电场和沟道电流,因此沟道电阻得到降低,从而降低了导通电阻。同时,由于沟道电阻的降低有助于提高漂移区的优化空间,漂移区的浓度可以进一步降低,从而改善了器件的耐压(击穿电压),或者可以在保持耐压不变的前提下进一步缩短漂移区长度,从而降低成本。
附图说明
通过附图中所示的本发明的优选实施例的更具体说明,本发明的上述及其它目的、特征和优势将变得更加清晰。在全部附图中相同的附图标记指示相同的部分,且并未刻意按实际尺寸等比例缩放绘制附图,重点在于示出本发明的主旨。
图1是一实施例中具有RESURF结构的横向扩散金属氧化物半导体场效应管的结构示意图;
图2是一实施例中器件的俯视角度局部示意图。
具体实施方式
为了便于理解本发明,下面将参照相关附图对本发明进行更全面的描述。附图中给出了本发明的首选实施例。但是,本发明可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使对本发明的公开内容更加透彻全面。
除非另有定义,本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本发明。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
本文所使用的半导体领域词汇为本领域技术人员常用的技术词汇,例如对于P型和N型杂质,为区分掺杂浓度,简易的将P+型代表重掺杂浓度的P型,P型代表中掺杂浓度的P型,P-型代表轻掺杂浓度的P型,N+型代表重掺杂浓度的N型,N型代表中掺杂浓度的N型,N-型代表轻掺杂浓度的N型。
本发明提供一种具有RESURF结构的横向扩散金属氧化物半导体场效应管,该LDMOSFET的新结构能够使得其具有较低的导通电阻。该LDMOSFET包括衬底,栅极,源极,漏极,体区,源极和漏极之间的场氧区,以及衬底上的第一、第二阱区。其中第一阱区为第一导电类型,第二阱区为第二导电类型,在本实施例中第一导电类型为N型,第二导电类型为P型;在其他实施例中也可以是第一导电类型为P型,第二导电类型为N型。源极和体区设于第二阱区内,漏极设于第一阱区内。栅极下方的第二阱区内设有多个第一导电类型的栅极掺杂区,本发明中栅极的多晶硅栅为多段式结构,各段之间相互分离,各个栅极掺杂区设于各段多晶硅栅之间的空隙下方,每个栅极掺杂区均与其两侧的两段多晶硅栅中靠源极方向的一段电性连接(可以是直接接触,也可以通过金属连线层连接),使得各栅极掺杂区的电位均与栅极相等。
图1是一实施例中具有RESURF结构的横向扩散金属氧化物半导体场效应管的结构示意图,包括P型的衬底110,N阱122,P阱124,P阱124内的N+源极150和P+体区160,N阱122内的N+漏极140,P阱124内的栅极掺杂区184,源极150和漏极140之间的场氧区170。多晶硅栅182为多段式结构,最靠近漏极140的一段多晶硅栅182延伸至场氧区170上,作为多晶场板;最靠近源极150的一段多晶硅栅182一端延伸至源极150上。
上述具有RESURF结构的横向扩散金属氧化物半导体场效应管,在开态时,电子由源极150注入进栅极下方的沟道中(图1中最左边的一段多晶硅栅182下方的子沟道),由于栅极和源极150之间的电位差,形成高电场加速沟道电子,使之进入图1中最左边的一个栅极掺杂区184。之后电子继续向漏极140运动,进入第二个子沟道(图1中左起第二段多晶硅栅182下方的沟道),同样被该沟道右侧的栅极掺杂区184加速。以此类推,电子在从源极150向漏极130运动的过程中,在相邻的两个栅极掺杂区184间被连续加速。
相比于传统结构,上述LDMOSFET沟道电子的数量增加,且电子在从源极流向漏极的过程中被多次加速,相当于提高了沟道电场和沟道电流,因此沟道电阻得到降低,从而降低了导通电阻。同时,沟道电阻的降低有助于提高漂移区的优化空间,漂移区的浓度可以进一步降低,从而改善了器件的耐压(击穿电压),或者可以在保持耐压不变的前提下进一步缩短漂移区长度,从而降低器件成本。
本发明的LDMOSFET还包括金属连线层。在图1所示实施例中,各个栅极掺杂区184上方、各段多晶硅栅182之间的空隙中设有金属电极以形成金属连线层,每个栅极掺杂区184是通过金属连线层(图1中未示)连接其左边的一段多晶硅栅182,确保每段多晶硅栅182形成的子沟道均工作在饱和区,以提供高电场下的高载流子迁移率。
设置较多数量的栅极掺杂区184有助于进一步降低导通电阻。但可以理解的,在器件宽度一定的条件下,在宽度方向上设置越多的栅极掺杂区184,意味着各栅极掺杂区184的宽度和间距就越小,那么在制造精度不够高的情况下,就可能导致在设计上相互分离的掺杂区184在制造时成片地连通在一起,这样会失去RESURF的作用,对器件的击穿电压BV有不利影响。因此,在其中一个实施例中,LDMOSFET在源极和漏极连线方向上设置有3~5组栅极掺杂区184。在图1所示实施例中,设置有4组栅极掺杂区184。
在其中一个实施例中,每组栅极掺杂区184包括多个,每组中各栅极掺杂区184的排列方向为垂直于源极150和漏极140之间的沟道电流方向,参见图2。图2为俯视图,以源极150和漏极140之间的沟道电流方向(即源极150和漏极140的连线方向)为X轴,器件的高度方向Z轴建立空间直角坐标系,则栅极掺杂区184不仅在X轴上设置多个,在Y轴方向上(或者XY平面上与Y轴呈一定角度的方向上)也设置多个。这种设计较成片的(即单个)栅极掺杂区结构,更有助于实现P阱124和栅极掺杂区184的电荷平衡,同时可以提高注入工艺的冗余,使得小范围的注入剂量偏差不会引起较大的耐压波动。该结构还可以保证最大限度的电流路径,降低P阱124的导通电阻,同时这些栅极掺杂区184可以辅助耗尽P阱124,提高器件耐压。
在其中一个实施例中,在源极150和漏极140连线方向上相邻的栅极掺杂区184的间距不大于0.8微米。这样既使得栅极掺杂区184在制造时不会连通在一起,也能获得较好的降低导通电阻效果。相应地,每个栅极掺杂区184的宽度(即源极150和漏极140的连线方向上尺寸)为1~2.5微米。
在其中一个实施例中,栅极掺杂区184的注入剂量为0.8~1.5E13/cm2,结深为0.8微米左右,峰值浓度为1.0~2.0E17/cm3。在上述条件下,器件能达到的最小击穿电压大约为600V。
以上所述实施例仅表达了本发明的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对本发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些都属于本发明的保护范围。因此,本发明专利的保护范围应以所附权利要求为准。

Claims (10)

1.一种具有RESURF结构的横向扩散金属氧化物半导体场效应管,包括衬底,栅极,源极,漏极,体区,源极和漏极之间的场氧区,以及衬底上的第一、第二阱区,其中第一阱区为第一导电类型,第二阱区为第二导电类型,第一导电类型和第二导电类型为相反的导电类型,所述源极和体区设于所述第二阱区内,所述漏极设于所述第一阱区内;其特征在于,所述栅极下方的第二阱区内设有多个第一导电类型的栅极掺杂区,所述栅极的多晶硅栅为多段式结构,各段之间相互分离,各个所述栅极掺杂区设于各段多晶硅栅之间的空隙下方,每个所述栅极掺杂区均与其两侧的两段多晶硅栅中靠源极方向的一段多晶硅栅电性连接。
2.根据权利要求1所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,所述栅极中的一段多晶硅栅延伸至所述场氧区上。
3.根据权利要求1所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,还包括金属连线层,每个所述栅极掺杂区是通过所述金属连线层与多晶硅栅电性连接。
4.根据权利要求1所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,各相邻的两段多晶硅栅在垂直于源极和漏极之间的沟道电流的方向上也设置有多个栅极掺杂区。
5.根据权利要求1所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,在源极和漏极之间的沟道电流的方向上相邻的栅极掺杂区的间距不大于0.8微米。
6.根据权利要求1所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,在源极和漏极之间的沟道电流的方向上设置有3~5组所述栅极掺杂区,每组包括至少一个栅极掺杂区。
7.根据权利要求6所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,每组栅极掺杂区包括多个,每组中的各栅极掺杂区的排列方向为垂直于源极和漏极之间的沟道电流的方向。
8.根据权利要求6所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,每个栅极掺杂区的宽度为1~2.5微米。
9.根据权利要求1所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,各栅极掺杂区峰值浓度为1.0~2.0E17/cm3。
10.根据权利要求1所述的具有RESURF结构的横向扩散金属氧化物半导体场效应管,其特征在于,所述第一导电类型为N型,所述第二导电类型为P型。
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CN110534514A (zh) * 2019-09-05 2019-12-03 电子科技大学 一种横向高压功率半导体器件的槽型终端结构
CN110534514B (zh) * 2019-09-05 2022-01-25 电子科技大学 一种横向高压功率半导体器件的槽型终端结构
CN113130647A (zh) * 2019-12-30 2021-07-16 比亚迪半导体股份有限公司 碳化硅器件及其制备方法和半导体器件
CN113130647B (zh) * 2019-12-30 2023-01-13 比亚迪半导体股份有限公司 碳化硅器件及其制备方法和半导体器件

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US20180342609A1 (en) 2018-11-29
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