CN106797082A - 各向异性导电膜及连接结构体 - Google Patents
各向异性导电膜及连接结构体 Download PDFInfo
- Publication number
- CN106797082A CN106797082A CN201580055635.4A CN201580055635A CN106797082A CN 106797082 A CN106797082 A CN 106797082A CN 201580055635 A CN201580055635 A CN 201580055635A CN 106797082 A CN106797082 A CN 106797082A
- Authority
- CN
- China
- Prior art keywords
- conducting particles
- anisotropic conductive
- unit
- conductive film
- conducting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B5/00—Non-insulated conductors or conductive bodies characterised by their form
- H01B5/16—Non-insulated conductors or conductive bodies characterised by their form comprising conductive material in insulating or poorly conductive material, e.g. conductive rubber
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J7/00—Adhesives in the form of films or foils
- C09J7/10—Adhesives in the form of films or foils without carriers
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J9/00—Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
- C09J9/02—Electrically-conducting adhesives
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/02—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R11/00—Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts
- H01R11/01—Individual connecting elements providing two or more spaced connecting locations for conductive members which are, or may be, thereby interconnected, e.g. end pieces for wires or cables supported by the wire or cable and having means for facilitating electrical connection to some other wire, terminal, or conductive member, blocks of binding posts characterised by the form or arrangement of the conductive interconnection between the connecting locations
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08K—Use of inorganic or non-macromolecular organic substances as compounding ingredients
- C08K2201/00—Specific properties of additives
- C08K2201/001—Conductive additives
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08K—Use of inorganic or non-macromolecular organic substances as compounding ingredients
- C08K3/00—Use of inorganic substances as compounding ingredients
- C08K3/02—Elements
- C08K3/08—Metals
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08K—Use of inorganic or non-macromolecular organic substances as compounding ingredients
- C08K9/00—Use of pretreated ingredients
- C08K9/02—Ingredients treated with inorganic substances
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
- C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2301/00—Additional features of adhesives in the form of films or foils
- C09J2301/30—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
- C09J2301/314—Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier the adhesive layer and/or the carrier being conductive
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2301/00—Additional features of adhesives in the form of films or foils
- C09J2301/40—Additional features of adhesives in the form of films or foils characterized by the presence of essential components
- C09J2301/408—Additional features of adhesives in the form of films or foils characterized by the presence of essential components additives as essential feature of the adhesive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/20—Conductive material dispersed in non-conductive organic material
- H01B1/22—Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/13599—Material
- H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/27003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/271—Manufacture and pre-treatment of the layer connector preform
- H01L2224/2711—Shaping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2746—Plating
- H01L2224/27462—Electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2746—Plating
- H01L2224/27464—Electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29344—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29347—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29355—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29357—Cobalt [Co] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29363—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/29364—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/2939—Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29399—Coating material
- H01L2224/294—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29399—Coating material
- H01L2224/294—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29438—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29444—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29399—Coating material
- H01L2224/294—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29438—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29455—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29499—Shape or distribution of the fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83874—Ultraviolet [UV] curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R4/00—Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation
- H01R4/04—Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation using electrically conductive adhesives
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Organic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Non-Insulated Conductors (AREA)
Abstract
本发明提供一种各向异性导电膜,即使连接微间距的连接端子的情况下,也能够抑制短路的发生,并且使导电粒子被各连接端子充分捕捉,提高导通可靠性。该各向异性导电膜具有导电粒子(2)排列成一列的导电粒子单元(3)、或导电粒子(2)排列成一列的导电粒子单元(3)和单独的导电粒子(2a)在绝缘粘接剂层(4)中被配置成格子状的结构。选自相邻的导电粒子单元(3)和单独的导电粒子(2a)中的导电粒子彼此的最接近距离(La)为导电粒子(2,2a)的粒径的0.5倍以上。
Description
技术领域
本发明涉及各向异性导电膜及使用各向异性导电膜连接的连接结构体。
背景技术
IC芯片等电子部件的安装中各向异性导电膜被广泛使用,近年来,从应用于高密度安装的观点考虑,为了使导电粒子捕捉效率、连接可靠性提高、使短路发生率降低,提案了在绝缘性粘接剂层中,以格子状配置使导电粒子接触或接近而排列的粒子部位(即,导电粒子单元)并且根据电极图案来改变该导电粒子单元彼此的间隔(专利文献1)。
现有技术文献
专利文献
专利文献1:日本特表2002-519473号公报
发明内容
发明所要解决的课题
然而,对于专利文献1中记载的各向异性导电膜而言,由于通过形成该单元的转印模具的凹部彼此的距离来约束导电粒子单元彼此的间隔,因此如果由各向异性导电膜连接的电子部件的连接端子间距离为10μm程度的微间距,则会产生无法充分捕捉导电粒子的连接端子,或发生短路,从而使导通可靠性出现问题。
对此,本发明的课题是,即使使用各向异性导电膜来连接微间距的连接端子的情况下,也抑制短路的发生,并且使导电粒子被各连接端子充分捕捉,提高导通可靠性。
用于解决课题的方法
本发明人发现,专利文献1中记载的各向异性导电膜中,导电粒子单元彼此的间隔以转印模具的凹部的间隔为约束,并没有约束相邻的导电粒子的最接近距离,进而该转印模具的凹部的间隔没有适应微间距的连接端子,对此,通过约束相邻的导电粒子单元的导电粒子彼此的最接近距离,能够解决上述课题,从而想到了本发明。
即,本发明提供一种各向异性导电膜,其是导电粒子排列成一列的导电粒子单元、或导电粒子排列成一列的导电粒子单元和单独的导电粒子被以格子状配置于绝缘粘接剂层中而成的各向异性导电膜,选自相邻的导电粒子单元和单独的导电粒子中的导电粒子彼此的最接近距离为导电粒子的粒径的0.5倍以上。
此外,本发明提供使用上述各向异性导电膜将第一电子部件的连接端子和第二电子部件的连接端子各向异性导电连接而成的连接结构体。
发明效果
根据本发明的各向异性导电膜,由于导电粒子排列成一列的导电粒子单元、或导电粒子排列成一列的导电粒子单元和单独的导电粒子被以格子状配置,因而与将单独的导电粒子以格子状排列的各向异性导电膜相比,能够以高密度配置导电粒子,特别是,通过将选自相邻的导电粒子单元和单独的导电粒子中的导电粒子彼此的最接近距离设在特定的范围,从而能够抑制短路的发生,并且最大限地提高各向异性导电膜中的导电粒子的配置密度。由此,即使由各向异性导电膜连接的连接端子为微间距,导电粒子也可被各连接端子充分捕捉,因而能够提高导通可靠性。
附图说明
图1A是实施例的各向异性导电膜1A中的导电粒子的配置图。
图1B是实施例的各向异性导电膜1A的A-A截面图。
图2A是实施例的各向异性导电膜1A的制造中所使用的模具的俯视图。
图2B是实施例的各向异性导电膜1A的制造中所使用的模具的B-B截面图。
图3是实施例的各向异性导电膜1B中的导电粒子的配置图。
图4是实施例的各向异性导电膜1C中的导电粒子的配置图。
图5是实施例的各向异性导电膜1D中的导电粒子的配置图。
图6是实施例的各向异性导电膜1E中的导电粒子的配置图。
图7是实施例的各向异性导电膜1F中的导电粒子的配置图。
图8是实施例的各向异性导电膜1G中的导电粒子的配置图。
图9是实施例的各向异性导电膜1H中的导电粒子的配置图。
图10是实施例的各向异性导电膜1I中的导电粒子的配置图。
图11是实施例的各向异性导电膜1J中的导电粒子的配置图。
图12是实施例的各向异性导电膜1K中的导电粒子的配置图。
图13A是实施例的各向异性导电膜1L中的导电粒子的配置图。
图13B是实施例的各向异性导电膜1L的C-C截面图。
图14A是实施例的各向异性导电膜1L的制造方法的说明图。
图14B是实施例的各向异性导电膜1L的制造方法的说明图。
图14C是实施例的各向异性导电膜1L的制造方法的说明图。
图15A是导电粒子单元相对于连接端子的优选配置的说明图。
图15B是导电粒子单元相对于连接端子的优选配置的说明图。
图15C是导电粒子单元相对于连接端子的优选配置的说明图。
具体实施方式
以下,一边参照附图一边详细说明本发明。另外,各图中,相同符号表示相同或等同的构成要素。
图1A是本发明的一个实施例的各向异性导电膜1A中的导电粒子2的配置图。该各向异性导电膜1A中,排列了2个导电粒子2的导电粒子单元3被以格子状配置于绝缘粘接剂层4中。更具体而言,导电粒子单元3的中心被配置于以虚线表示的正方形格子的格点。
各导电粒子单元3内,导电粒子2可以接触,也可以带间隙地接近,但为了更加提高导电粒子单元被排列成格子状的本发明的效果,各导电粒子单元3内的间隙的大小的合计(由n个导电粒子的排列构成一个导电粒子单元的情况下,n-1个间隙的大小的合计)小于导电粒子2的粒径Le,优选为小于粒径Le的1/4。另外,关于导电粒子单元3内的间隙的大小的合计,导电粒子单元的长边方向与各向异性导电膜的长边方向的角度θ大的情况下,与角度θ小的情况相比,可以使上述合计变大,如后述的图3所示,该角度θ为90°的情况下,即使为导电粒子2的粒径Le的1/2,也能够获得本发明的效果。
此外,本发明中,导电粒子2的粒径Le优选一致。因此,除非另有特别说明,本发明中导电粒子2的粒径Le意味着构成各向异性导电膜的导电粒子2的平均粒径。
各导电粒子单元3的长边方向的朝向一致,相对于各向异性导电膜1A的长边方向D1倾斜。更具体而言,导电粒子单元3的长边方向相对于各向异性导电膜1A的长边方向的角度θ成45°。此外,各导电粒子单元3的长边方向与形成导电粒子单元3的格子状排列的直线(图中由虚线表示的直线)重合。如果像这样使导电粒子单元3的长边方向相对于各向异性导电膜1A的长边方向倾斜,则使用各向异性导电膜1A将电子部件的连接端子进行连接的情况下,能够提高连接端子20上的导电粒子2的捕捉数。
图1B是将各向异性导电膜1A沿导电粒子单元3的长边方向切断的A-A截面图。如同一附图所示,导电粒子2被以一定的深度埋入绝缘粘接剂层4中。
本发明的各向异性导电膜1A中,从尽可能提高各向异性导电膜1A中的导电粒子2的配置密度,并且防止利用各向异性导电膜1A将第一电子部件、第二电子部件各向异性导电连接时的端子间的短路的观点考虑,相邻的导电粒子单元3的导电粒子彼此的最接近距离La(如后述那样,格点上也存在单独的导电粒子的情况下,选自相邻的导电粒子单元和单独的导电粒子中的导电粒子彼此的最接近距离La)为导电粒子2的粒径的0.5倍以上。这里,将最接近距离La设为导电粒子2的粒径的0.5倍以上源于以下理由。即,如果使用各向异性导电膜1A将第一电子部件、第二电子部件进行各向异性导电连接,则导电粒子2会在相对的第一电子部件、第二电子部件的连接端子间被压扁,如图1A中由虚线圆表示的那样,导电粒子2的粒径变为连接前的粒径的1.2~1.3倍。因此,即使作为相邻的导电粒子单元3的导电粒子彼此且处于最接近距离的导电粒子双方在各向异性导电连接时均被最大限度地压扁,也会确保它们之间空出至少粒径的约1/4的间隙而防止短路的发生,因而将相邻的导电粒子单元彼此的最接近距离La设为粒径的0.5倍以上。
此外,本发明中,优选将最接近距离La的各向异性导电膜长边方向D1上的长度La1设为导电粒子2的粒径Le的10倍以下。这是因为,将导电粒子的个数密度设为一定值以上会关系到稳定进行导电粒子被连接端子20的捕捉,有助于微间距连接的稳定性。
进一步,根据导电粒子单元3的格子状的排列方式,导电粒子单元3的各向异性导电膜长边方向D1上的外切线与同方向D1上相邻的导电粒子单元3部分重叠(外切线穿过相邻的单元的导电粒子),这会提高导电粒子的个数密度而有助于微间距中的连接的稳定性,因此优选。
另外,图1A所示的各向异性导电膜1A中,该最接近距离La的方向为导电粒子单元3的长边方向,但在本发明中,最接近距离La的方向不限于导电粒子单元3的长边方向。
将各向异性导电膜1A用于连接端子间的各向异性导电连接的情况下,从容易进行连接前后的导电粒子的比较的方面考虑,优选将各向异性导电膜1A的长边方向D1与图1A中以双点划线表示的连接端子20的排列方向(连接端子20的短边方向)配合。换言之,将各向异性导电膜1A的短边方向D2与连接端子20的长边方向配合。该情况下,优选使各导电粒子单元3的各向异性导电膜1A的长边方向D1上的长度Lb、由各向异性导电膜1A连接的连接端子20间的距离Lx和导电粒子的粒径Le满足下式的关系。
Lx>(Lb+Le)
此外,优选使作为相邻的导电粒子单元3的导电粒子2且在各向异性导电膜1A的长边方向D1上重合的最接近导电粒子(即,将导电粒子2投影到各向异性导电膜1A的长边方向时的投影像重合的导电粒子且最接近的导电粒子)彼此在该长边方向D1上的距离Lc为导电粒子的粒径的0.5倍以上。即,即使导电粒子单元3的格子状的排列本身相同,该距离Lc也会根据导电粒子单元3的长边方向相对于各向异性导电膜1A的长边方向D1的角度θ而变化。因此,不管角度θ的大小,为了防止相邻的连接端子20间的短路,作为距离Lc,优选确保导电粒子的粒径的0.5倍以上。
本发明中,从短路防止和连接端子间的连接稳定性的方面考虑,导电粒子2的粒径优选为1~10μm,更优选为2~4μm。此外,导电粒子2的配置密度优选为2000~250000个/mm2,更优选为4000~100000个/mm2。导电粒子的配置密度可根据构成导电粒子单元3的导电粒子2的个数和导电粒子单元3的配置来适宜调整。
本发明中,关于导电粒子2本身的构成、绝缘粘接剂层4的层构成或构成树脂没有特别限制。即,作为导电粒子2,可适当选择公知的各向异性导电膜中所使用的导电粒子来使用。例如,可举出镍、钴、银、铜、金、钯等金属粒子,金属被覆树脂粒子等。也可并用两种以上。
作为绝缘粘接剂层4,可适宜采用公知的各向异性导电膜中所使用的绝缘性树脂层。例如,可使用包含丙烯酸酯化合物和光自由基聚合引发剂的光自由基重合型树脂层、包含丙烯酸酯化合物和热自由基聚合引发剂的热自由基重合型树脂层、包含环氧化合物和热阳离子聚合引发剂的热阳离子重合型树脂层、包含环氧化合物和热阴离子聚合引发剂的热阴离子重合型树脂层等。此外,这些树脂层视需要可设为各自聚合而成的层。此外,绝缘粘接剂层4可由多个树脂层形成。
进一步,绝缘粘接剂层4中,视需要可添加二氧化硅微粒子、氧化铝、氢氧化铝等绝缘性填料。绝缘性填料的配合量相对于形成绝缘粘接剂层的树脂100质量份,优选设为3~40质量份。由此,即使在各向异性导电连接时绝缘粘接剂层4熔融,也能够抑制导电粒子2因熔融的树脂而发生不必要的移动。
作为绝缘粘接剂层4中导电粒子2被以上述配置固定的各向异性导电膜的制造方法,只要利用机械加工、激光加工、光刻等公知的方法制作具有与导电粒子单元3的配置对应的凹部的模具,将导电粒子放入该模具中,在其上填充绝缘粘接剂层形成用组合物并使其固化,从模具中取出,视需要进一步层叠绝缘性粘接剂层即可。另外,作为放入导电粒子2的模具,也可使用先制作刚性强的模具、并利用该模具用刚性低的材质形成的模具。
图2A是各向异性导电膜1A的制造中为了将导电粒子2以上述配置进行固定而使用的模具10的俯视图,图2B是模具10中填充了导电粒子2的状态的B-B截面图。该模具10具有可填充2个导电粒子2的矩形的凹部11。本实施例的各向异性导电膜1A中,凹部11的长边方向上相邻的凹部11彼此的距离Lh由于与相邻的导电粒子单元3彼此的最接近距离La对应,因此该距离Lh设为导电粒子2的粒径的0.5倍以上。此外,凹部11的长边方向上的长度Li根据凹部11中所填充的导电粒子2的个数的不同而不同,但优选使凹部11中填充了导电粒子2后的间隙s1、s2、s3在凹部11的长边方向上的长度合计Lj为小于导电粒子2的粒径的1/4的长度。这是因为,为了更加提高导电粒子单元被排列成格子状的本发明的效果,使得能够将导电粒子作为导电粒子单元被排列成格子状的状态与导电粒子未形成单元地被排列成格子状的状态明确区别。
另一方面,为了将导电粒子2以上述配置置于绝缘粘接剂层4中,也可以为如下方法:在绝缘粘接剂层形成用组合物层上,设置以预定的配置形成有贯通孔的构件,从其上提供导电粒子2并使其通过贯通孔等。
本发明的各向异性导电膜可设为各种各样的方式。例如,图3所示的各向异性导电膜1B及图4所示的各向异性导电膜1C,各自导电粒子2本身的排列与图1A所示的各向异性导电膜1A同样,导电粒子单元3由2个导电粒子2形成,各导电粒子单元3的长边方向的朝向一致,导电粒子单元3被配置成正方形格子状,但图3所示的各向异性导电膜1B中,导电粒子单元3的长边方向相对于各向异性导电膜1B的长边方向的角度θ为90°,图4所示的各向异性导电膜1C中,导电粒子单元3的长边方向相对于各向异性导电膜1C的长边方向的角度θ为0°。
从防止短路的观点出发,角度θ优选接近90°。此外,从各向异性导电连接时的导电粒子的捕捉的观点出发,优选接近0°。因此,形成各导电粒子单元3的导电粒子数和各导电粒子单元3的长边方向的角度θ一致的情况下,从兼顾防止短路和导电粒子的捕捉的观点出发,角度θ优选为6~84°,更优选为16~74°。
图5所示的各向异性导电膜1D如下:在图1A所示的各向异性导电膜1A中,以导电粒子单元3的中心点形成六边形格子的方式配置导电粒子单元3,并使导电粒子单元3的长边方向相对于各向异性导电膜1D的长边方向的角度θ为30°。
除此之外,本发明中,导电粒子单元3的格子状的排列可设为各种各样的方式。例如,可将导电粒子单元3配置成菱形格子状、长方形格子状等。
图6所示的各向异性导电膜1E如下:由排列成一列的3个导电粒子2形成各导电粒子单元3,将各导电粒子单元3配置成斜向排列,并使各导电粒子单元3的长边方向相对于各向异性导电膜1E的长边方向的角度θ为45°。
构成像这样的导电粒子单元3的导电粒子2的个数不限于2个,由于可根据导电粒子的粒径、所连接的端子间距离、端子的尺寸以及布局等来决定,因此没有特别的上限。这是因为,即使进行微间距化、小面积化,只要为基于导电粒子粒径的充分的端子间距离,则短路发生的风险也会减小。从更加降低短路发生风险而使连接结构体的制造时的品质稳定的方面考虑,在以格子状配置的导电粒子单元之间,也可以存在未形成导电粒子单元的单独的导电粒子2a,此外,可将构成一个导电粒子单元3的导电粒子2设为2~8个,更优选设为2~5个。
例如,也可以如图7所示的各向异性导电膜1F那样,使未形成导电粒子单元的单独的导电粒子2a存在于以正方形格子状配置的导电粒子单元3的单位格子的中心。由此,在微间距的连接端子中使用各向异性导电膜的情况下,能够提高连接端子上的导电粒子的捕捉性,并且能够避免短路。
此外,也可以如图8所示的各向异性导电膜1G那样,将形成导电粒子单元的导电粒子数不同的多组导电粒子单元3i、3k配置成格子状,在格点以外配置单独的导电粒子2a。另外,将形成导电粒子单元的导电粒子数不同的多组导电粒子单元3i、3k配置成格子状的情况下,可以将各导电粒子单元3i、3k的中心配置于格点。
将形成导电粒子单元的导电粒子数不同的多组导电粒子单元配置成格子状的情况下,可以如图9所示的各向异性导电膜1H那样,将各导电粒子单元3i、3j、3k的长边方向对齐,并且在其短边方向上所配置的导电粒子单元的导电粒子数反复逐渐增加或减少。另外,图9中,虽然将3组导电粒子单元3i、3j、3k的长边方向设为了各向异性导电膜1H的长边方向,但只要各导电粒子单元3i、3j、3k的长边方向一致,则其长边方向可以设为任意的方向。
通过这样设置形成导电粒子单元的导电粒子数不同的多组导电粒子单元,从而能够提高小面积凸块上的导电粒子捕捉效率,并且抑制短路的发生,因而能够更进一步与微间距的连接对应。
本发明中,导电粒子单元和单独的导电粒子可以被配置成格子状。换言之,单独的导电粒子可以存在于格点。例如,可以如图10所示的各向异性导电膜1I那样,将形成导电粒子单元的导电粒子数不同的3组导电粒子单元3i、3j、3k和单独的导电粒子2a配置成格子状。该情况下,将选自导电粒子单元3i、3j、3k和单独的导电粒子2a中的导电粒子彼此的最接近距离La设为导电粒子2、2a的导电粒子粒径的0.5倍以上。
当将导电粒子数不同的多组导电粒子单元和单独的导电粒子配置成格子状时,可以如图10所示的各向异性导电膜1I那样,使在各向异性导电膜的短边方向上排列的形成各导电粒子单元3i、3j、3k及单独的导电粒子2a的导电粒子数反复逐渐增加和减少,也可以如图11所示的各向异性导电膜1J那样,反复逐渐增加或减少。如图11所示那样导电粒子反复逐渐增加或减少的情况下,各向异性导电膜内的小区域中的导电粒子的个数密度偏差变小。由此,例如在贴附各向异性导电膜时即使膜的贴附位置在连接端子的长边方向上出现微小(即使为膜宽度的数%也为数十μm以上)偏离,被连接端子捕捉的导电粒子的个数偏差也变小,有位置偏离时和无位置偏离时的导电粒子所受的挤压力的偏差变小,因此优选。
这里,作为微间距的连接端子,可举出:其连接面的大小为宽度4~60μm、长度400μm以下(下限与宽度等倍)的连接端子,或者连接面的宽度小于导电粒子粒径的4倍或小于导电粒子单元3的长边方向的长度的2倍的连接端子,或者连接端子间的最小距离例如为8~30μm的连接端子。此外,连接端子的面积小的情况下,存在连接端子间距离相对变大的情况,因此不限定于上述端子间距离。另外,就使端子面积减小而言,除了高集成化等技术上的理由以外,由于减少了作为端子而使用的金属(Au等)而从成本方面考虑也具有优势,因此能够应对小端子面积的各向异性导电膜的意义是重大的。
将构成导电粒子单元3的导电粒子设为3个以上的情况下,从提高微间距中的导电粒子的捕捉性的观点出发,各导电粒子单元3中使导电粒子排列成一列。
图12所示的各向异性导电膜1K中,使导电粒子单元3的长边方向以千鸟格子状改变。更具体而言,与图3所示的各向异性导电膜1B同样,导电粒子单元3(3a、3b)的中心点被配置为正方形格子状,但将导电粒子单元3内的导电粒子2的排列方向相对于各向异性导电膜1G的长边方向为0°的导电粒子单元3a和为90°的导电粒子单元3b配置成千鸟格子状。
通过这样使导电粒子单元3中的导电粒子2的排列方向形成相互不同的第一方向和第二方向,也能够兼顾提高微间距的连接端子20上的导电粒子的捕捉性和避免短路。
关于图13A所示的各向异性导电膜1L,虽然在俯视时导电粒子2的配置与图1所示的各向异性导电膜1A同样,但如图13B所示的C-C截面图那样,各向异性导电膜1L的厚度方向上以第一深度配置导电粒子2的第一导电粒子单元3p与以第二深度配置导电粒子2的第二导电粒子单元3q在导电粒子单元3p、3q的短边方向上交替配置。
作为这样的各向异性导电膜1L的制造方法,例如如图14A所示那样,使用用于将导电粒子配置成第一导电粒子单元3p的第一模具10p和用于将导电粒子配置成第二导电粒子单元3q的第二模具10q,并将导电粒子2填充于各个模具10p、10q的凹部11中,如图14B所示那样,在各个模具10p、10q上,配置形成于剥离片6上的绝缘粘接剂层形成用组合物层5并将该绝缘粘接剂层形成用组合物层5挤入模具10p、10q的凹部11,通过干燥、加热等使绝缘粘接剂层形成用组合物层5半固化。接着,将半固化了的绝缘粘接剂层形成用组合物层5从模具10p、10q上分离,如图14C所示那样使它们相对,加压,利用加热或紫外线照射等使其完全固化。这样可获得图13B所示的截面的各向异性导电膜1L。
根据这样使用第一模具10p和第二模具10q的制造方法,与使用单一模具的情况相比,能够扩大各模具中的凹部11的配置间距,因而能够提高各向异性导电膜1L的生产率。
本发明的各向异性导电膜可以在将IC芯片、IC模块、FPC等第一电子部件的连接端子和FPC、玻璃基板、塑料基板、刚性基板、陶瓷基板等第二电子部件的连接端子进行各向异性导电连接时优选使用。如此获得的连接结构体也是本发明的一部分。此外,也可以将IC芯片、IC模块堆叠而将第一电子部件彼此进行各向异性导电连接。如此获得的连接结构体也是本发明的一部分。
使用本发明的各向异性导电膜来连接电子部件的连接端子的情况下,如图15A的(a)所示,构成导电粒子单元3的导电粒子2优选以不置于连接端子20的边缘的位置进行连接,如同图(b)所示,为了使连接端子20的端子间距离Lx、该端子间距离的方向上的导电粒子单元3的长度Ld和导电粒子2的粒径Le的关系满足
Lx>(Ld+Le)
只要相对于连接端子20的端子间距离Lx,调整该端子间距离Lx的方向上的导电粒子单元3的长度Ld和导电粒子2的粒径Le即可。
与此相对,如图15B的(a)所示,如果不满足
Lx>(Ld+Le)
则在连接端子20间容易发生短路。然而,即使构成导电粒子单元3的导电粒子2的粒径Le、导电粒子2的排列数相等,如同图(b)所示,只要使导电粒子单元3的长边方向相对于端子间距离Lx的方向倾斜,将端子间距离Lx的方向上的导电粒子单元3的长度Ld变短以便满足上述式即可。
此外,如图15C所示,也可以通过使导电粒子2的粒径Le变小来满足上述式。
实施例
以下,通过实施例具体说明本发明。
实施例1~11及比较例1、2
<各向异性导电膜的制造概要>
制造导电粒子单元的中心的排列形成长方形格子,并且每一个导电粒子单元的导电粒子的个数(以下,称为连结个数)、导电粒子的粒径(μm)、导电粒子单元的最大长度(μm)、导电粒子单元的长边方向与各向异性导电膜的长边方向的角度θ、相邻的导电粒子单元的导电粒子彼此的最接近距离La(μm)、导电粒子的配置密度(个/mm2)为表1所示的数值的各向异性导电膜。
该情况下,作为导电粒子,使用如下制作的导电粒子(粒径2μm、3μm或6μm)。
<导电粒子(粒径2μm、3μm或6μm)的制作>
在调整了二乙烯基苯、苯乙烯、甲基丙烯酸丁酯的混合比的溶液中,投入作为聚合引发剂的过氧化苯甲酰,一边以高速均匀搅拌一边进行加热,进行聚合反应,从而获得微粒子分散液。将上述微粒子分散液过滤、减压干燥,从而获得作为微粒子凝聚体的块体。进一步,将上述块体粉碎、分级,从而获得平均粒径2μm、3μm以及6μm的二乙烯基苯系树脂粒子。
利用浸渍法使钯催化剂担载于如上获得的二乙烯基苯系树脂粒子(5g)上。接着,对于该树脂粒子,使用由六水合硫酸镍、次磷酸钠、柠檬酸钠、三乙醇胺和硝酸铊调制而成的无电解镍镀敷液(pH12,镀液温50℃)进行无电解镍镀敷,获得表面形成有镍镀敷层(金属层)的镍被覆树脂粒子作为导电粒子。所得的导电粒子的平均粒径为2μm、3μm以及6μm。
在使氯金酸钠10g溶解于离子交换水1000mL而成的溶液中,将上述镍被覆树脂粒子12g混合而调制水性悬浊液。在所得的水性悬浊液中,投入硫代硫酸铵15g、亚硫酸铵80g及磷酸氢铵40g,从而调制金镀敷浴。在所得的金镀敷浴中投入羟胺4g后,使用氨水将金镀敷浴的pH调整为9,然后将浴温在60℃维持15~20分钟左右,从而获得平均粒径2μm、3μm以及6μm的金/镍被覆树脂粒子,将其作为导电粒子。
<各向异性导电膜的制造>
如下制造绝缘粘接剂层中以表1的排列包含有该导电粒子的各向异性导电膜。首先,调制含有苯氧树脂(新日铁住金化学(株),YP-50)60质量份、环氧树脂(三菱化学(株),jER828)40质量份、阳离子聚合引发剂(潜在性固化剂)(三新化学工业(株),SI-60L)2质量份的热聚合性绝缘性树脂组合物,将其涂布于膜厚度50μm的PET膜上,利用80℃的烘箱干燥5分钟,在PET膜上形成厚度20μm的粘着层。
接着,制作凸部的配置为表1的导电粒子单元的配置的金属模具,使透明性树脂颗粒熔融并流入该金属模具,进行冷却、凝固,从而制作凹部为表1的导电粒子单元的配置的树脂模具,将导电粒子填充于该树脂模具,在其上被覆上述粘着层,利用紫外线照射使该粘着层固化,从模具剥下,制造各向异性导电膜。
评价
如下评价(a)导通电阻、(b)短路数、(c)每1个凸块上的粒子最小捕捉数、(d)凸块间的粒子状态。将结果示于表1A及表1B中。
(a)导通电阻
将有效连接面积(凸块与基板相对的面积)不同的3组评价用连接物的导通电阻连接。
(a-1)导通电阻(有效连接面积400μm2)
将各实施例及比较例的各向异性导电膜夹持在导通电阻评价用IC和玻璃基板之间,加热加压(180℃、80MPa、5秒)而获得各评价用连接物,使用数字万用表且利用4端子法以通过2mA的电流时的值测定该评价用连接物的导通电阻。如果小于1Ω,则实用上没有问题。
这里,关于该各评价用IC和玻璃基板,它们的端子图案相对应,尺寸如下。
此外,使用各向异性导电膜来连接评价用IC和玻璃基板时,使各向异性导电膜的长边方向与凸块的短边方向(端子间距离的方向)配合。将结果示于表1A中。
导通电阻评价用IC
外径0.7×20mm
厚度0.2mm
凸块状态金镀敷、高度12μm、尺寸10×40μm、凸块间距离10μm
玻璃基板
玻璃材质康宁公司制
外径30×50mm
厚度0.5mm
电极ITO配线
(a-2)导通电阻(有效连接面积300μm2)及(a-3)导通电阻(有效连接面积200μm2)
将导通电阻评价用IC的凸块状态进行以下变更,将评价用IC的定位有意地向凸块的短边(宽度)方向挪动6μm以及8μm,将有效连接面积设为300μm2或200μm2,除此以外,与(a-1)同样地进行连接而获得评价用连接物,与(a-1)同样地测定其导通电阻。将结果示于表1B中。另外,表1B中示出了实质的凸块大小和IC凸块-凸块间的间隙(即,同一IC的凸块间的水平方向的导体距离)的数值。
凸块状态金镀敷、高度12μm、尺寸12×50μm、凸块间距离10μm
(b)短路数
在实施例1~11及比较例1~2的导通电阻评价用连接物的100个凸块间测量短路的通道数,设为短路数。
另外,使用以下的短路发生率评价用IC,测定实施例1~11的各向异性导电膜的短路发生率,结果全部小于200ppm,显示了实用上没有问题的结果。
短路发生率评价用IC
梳齿TEG(测试元件组,test element group)
外径1.5×13mm
厚度0.5mm
凸块状态金镀敷、高度15μm、尺寸25×140μm、凸块间距离7.5μm
(c)每1个凸块上的粒子最小捕捉数
使用各实施例及比较例的各向异性导电膜,与(a-1)同样地操作获得评价用连接物(凸块100个),测量各凸块上的粒子捕捉数,求出其最小数。另外,该连接中,使各向异性导电膜的长边方向与凸块的短边方向(端子间距离的方向)配合。将结果示于表1A中。
此外,与(a-2)、(a-3)同样地操作而获得评价用连接物(凸块各100个),与上述同样地求出各凸块上的粒子捕捉数的最小数,基于以下基准进行评价。如果为C评价以上,则实用上没有问题。将结果示于表1B中。
(评价基准)
A(非常良好):10个以上
B(良好):5个以上且小于10个
C(普通):3个以上且小于5个
D(不良):小于3个
(d)凸块间的粒子状态
在(c)的评价用连接物(即,与(a-1)、(a-2)、(a-3)同样地操作而获得的评价用连接物)中,计数凸块-凸块间未与凸块连接的导电粒子相互连结而形成的导电粒子组的发生数。表1A中,对于与(a-1)同样地操作而获得的评价用连接物,表示凸块-凸块间的每100个的相对于连接前的状态、导电粒子单元或导电粒子连结而成的导电粒子组的计数值。通过该计数值,能够评价各向异性导电连接时的导电粒子的移动容易度(即,导电粒子的接触所导致的短路的发生风险)。
与(a-2)、(a-3)同样地操作而获得的评价用连接物中,由于有意地挪动了定位,因此不能以相同尺度比较与(a-1)同样地操作而获得的评价用连接物的评价,但观察凸块-凸块间的100个,结果可以确认出没有显著恶化。此外,关于这些评价用连接物,随机抽出能看到发生短路的部位,确认连接物的截面状态,结果未能够确认到相比于与(a-1)同样地操作而获得的评价用连接物,与(a-2)、(a-3)同样地操作而获得的评价用连接物的截面形状发生显著恶化。
[表1A]
[表1B]
从表1A可知,实施例1~11中,在导电粒子单元的最接近距离La为导电粒子的粒径的0.5~3倍的范围内,导通电阻为0.4~0.6Ω,但未形成导电粒子单元的比较例1中,即使导电粒子的最接近距离为导电粒子的粒径的0.5倍,导通电阻也高,为0.8Ω,短路也以较高的频率发生。
此外,从比较例2可知,如果导电粒子单元的最接近距离La小于导电粒子的粒径的0.5倍,则短路数显著增多。
进一步,比较例1、比较例2中,从凸块间的粒子状态可知,相对于凸块间距离,导电粒子的粒径过大,因此与凸块布局不合适。尤其在比较例2中可知,每1个凸块上的粒子最小捕捉数为0,出现导电粒子未被凸块捕捉的状态,各向异性连接不稳定。由此可知,仅通过使导电粒子的粒径变大而增大导电粒子的占有面积率,无法应对微间距中的各向异性连接。
进一步,从实施例1~11可知,导电粒子单元的最接近距离La相互相等的情况下,如果导电粒子单元的长边方向相对于各向异性导电膜的长边方向倾斜,则每1个凸块上的粒子最小捕捉数增加,导通可靠性高。
另一方面,从表1B可知,(a-2)及(a-3)中,可获得与(a-1)等同以上的导通性能,每1个凸块上的粒子最小捕捉数也良好。
此外,与(a-1)同样地,测定将(a-1)、(a-2)及(a-3)中所得的评价用连接物置于温度85℃、湿度85%RH的恒温槽500小时后的导通电阻。其结果,确认到实施例的评价用连接物的导通电阻全都小于5Ω,确认到实用上没有问题。
参考例1~5
设为表2所示的导电粒子的连结个数和配置,与实施例1同样地操作制造各向异性导电膜,并进行评价。将结果示于表2中。
从表2可知,导电粒子单元中的导电粒子的连结个数在各向异性导电膜的短边方向(凸块的长边方向)上没有特别限制(参考例1、2),但在凸块间距离的方向上,如果导电粒子单元的最大长度与导电粒子粒径之和大于凸块间距离的大小,则短路数增多(参考例3~5)。因此,使用实施例的各向异性导电膜的情况下,优选根据导电粒子单元的最大长度和连接端子的端子间距离调整各向异性导电膜的朝向。
如参考例4、5那样,如果相对于凸块间距离,单元长度为90%以上,则发生短路,此外,从凸块间的粒子状态的评价结果可知,在凸块间,单元彼此接触的粒子增加,因而可知与凸块间距离平行的单元长度应当设定为预定的个数和大小。
[表2]
实施例1、12~14
设为表3所示的导电粒子的连结个数的配置,与实施例1同样地操作制造各向异性导电膜,并进行评价。将结果示于表3中。
从表3可知,导电粒子单元的长边方向和各向异性导电膜的短边方向(连接端子的长边方向)一致的情况下,即使将各个导电粒子单元内的导电粒子的间隙从零至导电粒子的粒径的1/2大小任意地变更,也能够形成导电粒子单元排列成格子状的状态,减少短路数,提高导通可靠性。
[表3]
符号说明
1A、1B、1C、1D、1E、1F、1G、1H、1I、1J、1K、1L 各向异性导电膜
2、2a 导电粒子
3、3a、3b、3p、3q、3i、3j、3k 导电粒子单元
4 绝缘粘接剂层
5 绝缘粘接剂层形成用组合物层
6 剥离片
10、10p、10q 模具
11 凹部
20 连接端子
D1 各向异性导电膜的长边方向
D2 各向异性导电膜的短边方向
La 选自相邻的导电粒子单元和单独的导电粒子中的导电粒子彼此的最接近距离
La1 相邻的导电粒子单元的最接近距离在各向异性导电膜的长边方向上的长度
Lb 导电粒子单元在各向异性导电膜的长边方向上的长度
Lc 作为相邻的导电粒子单元的导电粒子且在各向异性导电膜的长边方向上重合的最接近导电粒子彼此在该长边方向上的距离
Ld 连接端子间距离的方向上的导电粒子单元的长度
Le 导电粒子的粒径
Lh 模具的凹部的长边方向上相邻的凹部彼此的距离
Li 模具的凹部在该凹部的长边方向上的长度
Lj 模具的凹部中填充了导电粒子后的间隙在该凹部的长边方向上的长度的合计
Lx 连接端子间距离
s1、s2、s3 间隙
θ 导电粒子单元的长边方向相对于各向异性导电膜的长边方向的角度
Claims (7)
1.一种各向异性导电膜,其是导电粒子排列成一列的导电粒子单元、或导电粒子排列成一列的导电粒子单元和单独的导电粒子在绝缘粘接剂层中被配置成格子状而成的各向异性导电膜,选自相邻的导电粒子单元和单独的导电粒子中的导电粒子彼此的最接近距离为导电粒子的粒径的0.5倍以上。
2.根据权利要求1所述的各向异性导电膜,作为相邻的导电粒子单元的导电粒子且在各向异性导电膜的长边方向上重合的最接近导电粒子彼此在该长边方向上的距离为导电粒子的粒径的0.5倍以上。
3.根据权利要求1或2所述的各向异性导电膜,各导电粒子单元的长边方向相对于各向异性导电膜的长边方向倾斜。
4.根据权利要求1~3中任一项所述的各向异性导电膜,配置有形成导电粒子单元的导电粒子数不同的多组导电粒子单元。
5.根据权利要求1~4中任一项所述的各向异性导电膜,作为导电粒子单元,具有该单元中的导电粒子的排列方向为第一方向的导电粒子单元和该单元中的导电粒子的排列方向为第二方向的导电粒子单元。
6.一种连接结构体,其使用权利要求1~5中任一项所述的各向异性导电膜将第一电子部件的连接端子和第二电子部件的连接端子各向异性导电连接而成。
7.根据权利要求6所述的连接结构体,连接端子间的距离大于该连接端子间的距离方向上的导电粒子单元的长度与导电粒子的粒径之和。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014219788 | 2014-10-28 | ||
JP2014-219788 | 2014-10-28 | ||
PCT/JP2015/080338 WO2016068169A1 (ja) | 2014-10-28 | 2015-10-28 | 異方性導電フィルム及び接続構造体 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106797082A true CN106797082A (zh) | 2017-05-31 |
CN106797082B CN106797082B (zh) | 2019-07-30 |
Family
ID=55857504
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201580055635.4A Active CN106797082B (zh) | 2014-10-28 | 2015-10-28 | 各向异性导电膜及连接结构体 |
Country Status (6)
Country | Link |
---|---|
US (1) | US9953947B2 (zh) |
JP (1) | JP6661969B2 (zh) |
KR (1) | KR101937601B1 (zh) |
CN (1) | CN106797082B (zh) |
TW (1) | TWI648913B (zh) |
WO (1) | WO2016068169A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111205788A (zh) * | 2018-11-21 | 2020-05-29 | 信越化学工业株式会社 | 各向异性膜、及各向异性膜的制造方法 |
CN114651312A (zh) * | 2019-10-15 | 2022-06-21 | 国立大学法人京都大学 | 导电膜、分散体、它们的制造方法以及包含导电膜的器件 |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6169914B2 (ja) * | 2012-08-01 | 2017-07-26 | デクセリアルズ株式会社 | 異方性導電フィルムの製造方法、異方性導電フィルム、及び接続構造体 |
JP6024623B2 (ja) * | 2012-08-29 | 2016-11-16 | デクセリアルズ株式会社 | 異方性導電フィルム及びその製造方法 |
CN107078420B (zh) | 2014-11-17 | 2022-04-08 | 迪睿合株式会社 | 各向异性导电膜 |
KR102682993B1 (ko) * | 2016-05-05 | 2024-07-08 | 데쿠세리아루즈 가부시키가이샤 | 이방성 도전 필름 |
JP7274811B2 (ja) | 2016-05-05 | 2023-05-17 | デクセリアルズ株式会社 | 異方性導電フィルム |
CN118325319A (zh) * | 2016-05-05 | 2024-07-12 | 迪睿合株式会社 | 填充剂配置膜 |
US20170338204A1 (en) * | 2016-05-17 | 2017-11-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device and Method for UBM/RDL Routing |
CN113053562B (zh) * | 2017-01-27 | 2023-03-31 | 昭和电工材料株式会社 | 绝缘被覆导电粒子、各向异性导电膜及其制造方法、连接结构体及其制造方法 |
JP2019029135A (ja) * | 2017-07-27 | 2019-02-21 | 日立化成株式会社 | 異方性導電フィルム及びその製造方法、並びに接続構造体及びその製造方法 |
KR102519126B1 (ko) * | 2018-03-30 | 2023-04-06 | 삼성디스플레이 주식회사 | 표시 장치 |
JP7452418B2 (ja) * | 2018-06-26 | 2024-03-19 | 株式会社レゾナック | 異方性導電フィルム及びその製造方法並びに接続構造体の製造方法 |
EP4130062A4 (en) * | 2020-03-26 | 2024-04-24 | Sekisui Chemical Co., Ltd. | RESIN PARTICLES, ELECTRICALLY CONDUCTIVE PARTICLES, ELECTRICALLY CONDUCTIVE MATERIAL AND INTERCONNECTION STRUCTURE |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0582199A (ja) * | 1991-05-28 | 1993-04-02 | Minato Electron Kk | 異方導電性コネクタを有するコネクタ配置構造および異方導電性コネクタ |
JPH09320345A (ja) * | 1996-05-31 | 1997-12-12 | Whitaker Corp:The | 異方導電性フィルム |
CN1307625A (zh) * | 1998-06-30 | 2001-08-08 | 美国3M公司 | 细距各向异性导电粘合剂 |
JP2006049783A (ja) * | 2004-06-29 | 2006-02-16 | Yuji Suda | 異方性導電接着フィルムの製造方法と電極接続方法 |
CN101897083A (zh) * | 2007-12-10 | 2010-11-24 | 富士胶片株式会社 | 各向异性导电接合组件 |
JP5049176B2 (ja) * | 2008-03-27 | 2012-10-17 | ソニーケミカル&インフォメーションデバイス株式会社 | 接合体及びその製造方法、並びに、異方性導電材料及びその製造方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5502889A (en) * | 1988-06-10 | 1996-04-02 | Sheldahl, Inc. | Method for electrically and mechanically connecting at least two conductive layers |
KR20070010015A (ko) * | 2004-03-30 | 2007-01-19 | 도카이 고무 고교 가부시키가이샤 | 이방성 도전막 및 그 제조방법 |
JP4887700B2 (ja) * | 2005-09-09 | 2012-02-29 | 住友ベークライト株式会社 | 異方導電性フィルムおよび電子・電機機器 |
JP4735229B2 (ja) * | 2005-12-12 | 2011-07-27 | 住友ベークライト株式会社 | 異方導電性フィルム |
JP5226562B2 (ja) * | 2008-03-27 | 2013-07-03 | デクセリアルズ株式会社 | 異方性導電フィルム、並びに、接合体及びその製造方法 |
CN103155050B (zh) * | 2010-10-08 | 2017-05-03 | 第一毛织株式会社 | 各向异性导电膜 |
JP6245792B2 (ja) | 2012-03-29 | 2017-12-13 | デクセリアルズ株式会社 | 導電性粒子、回路接続材料、実装体、及び実装体の製造方法 |
JP6056700B2 (ja) * | 2012-08-03 | 2017-01-11 | デクセリアルズ株式会社 | 異方性導電フィルム及びその製造方法 |
WO2016068083A1 (ja) * | 2014-10-31 | 2016-05-06 | デクセリアルズ株式会社 | 異方性導電フィルム |
-
2015
- 2015-10-27 JP JP2015211174A patent/JP6661969B2/ja active Active
- 2015-10-28 CN CN201580055635.4A patent/CN106797082B/zh active Active
- 2015-10-28 TW TW104135558A patent/TWI648913B/zh active
- 2015-10-28 WO PCT/JP2015/080338 patent/WO2016068169A1/ja active Application Filing
- 2015-10-28 US US15/517,781 patent/US9953947B2/en active Active
- 2015-10-28 KR KR1020177006076A patent/KR101937601B1/ko active IP Right Grant
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0582199A (ja) * | 1991-05-28 | 1993-04-02 | Minato Electron Kk | 異方導電性コネクタを有するコネクタ配置構造および異方導電性コネクタ |
JPH09320345A (ja) * | 1996-05-31 | 1997-12-12 | Whitaker Corp:The | 異方導電性フィルム |
CN1307625A (zh) * | 1998-06-30 | 2001-08-08 | 美国3M公司 | 细距各向异性导电粘合剂 |
JP2006049783A (ja) * | 2004-06-29 | 2006-02-16 | Yuji Suda | 異方性導電接着フィルムの製造方法と電極接続方法 |
CN101897083A (zh) * | 2007-12-10 | 2010-11-24 | 富士胶片株式会社 | 各向异性导电接合组件 |
JP5049176B2 (ja) * | 2008-03-27 | 2012-10-17 | ソニーケミカル&インフォメーションデバイス株式会社 | 接合体及びその製造方法、並びに、異方性導電材料及びその製造方法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111205788A (zh) * | 2018-11-21 | 2020-05-29 | 信越化学工业株式会社 | 各向异性膜、及各向异性膜的制造方法 |
CN111205788B (zh) * | 2018-11-21 | 2024-06-07 | 信越化学工业株式会社 | 各向异性膜、及各向异性膜的制造方法 |
CN114651312A (zh) * | 2019-10-15 | 2022-06-21 | 国立大学法人京都大学 | 导电膜、分散体、它们的制造方法以及包含导电膜的器件 |
Also Published As
Publication number | Publication date |
---|---|
KR101937601B1 (ko) | 2019-01-10 |
US20170309590A1 (en) | 2017-10-26 |
WO2016068169A1 (ja) | 2016-05-06 |
TW201637290A (zh) | 2016-10-16 |
KR20170039284A (ko) | 2017-04-10 |
TWI648913B (zh) | 2019-01-21 |
JP2016085983A (ja) | 2016-05-19 |
JP6661969B2 (ja) | 2020-03-11 |
CN106797082B (zh) | 2019-07-30 |
US9953947B2 (en) | 2018-04-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106797082B (zh) | 各向异性导电膜及连接结构体 | |
CN107112067B (zh) | 各向异性导电性膜 | |
CN107960139B (zh) | 各向异性导电膜和连接结构体 | |
CN107534231B (zh) | 各向异性导电性膜及连接构造体 | |
CN106663885B (zh) | 各向异性导电膜和连接结构体 | |
CN106104930A (zh) | 各向异性导电膜及其制备方法 | |
CN106797080B (zh) | 各向异性导电膜及连接结构体 | |
CN107112314B (zh) | 多层基板 | |
CN109074894A (zh) | 各向异性导电膜 | |
CN107431294A (zh) | 各向异性导电性膜及连接构造体 | |
CN109417233B (zh) | 各向异性导电膜 | |
TWI776778B (zh) | 異向性導電膜、連接結構體、及連接結構體之製造方法 | |
CN105140255B (zh) | 一种覆晶摄像头封装片及其制作方法 | |
CN109843992B (zh) | 含填料膜 | |
KR102652055B1 (ko) | 필러 함유 필름 | |
CN107210287A (zh) | 多层基板 | |
CN109964371A (zh) | 各向异性导电膜 | |
CN112534650B (zh) | 各向异性导电薄膜 | |
TWI519794B (zh) | 互連結構、其製造方法及其應用 | |
TWI747898B (zh) | 異向性導電膜 | |
CN204885504U (zh) | 闪存盘模块中所用的标准模组 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: DE Ref document number: 1238414 Country of ref document: HK |
|
GR01 | Patent grant | ||
GR01 | Patent grant |