CN106784011A - 具有浪涌电压自抑和自过压保护的碳化硅umosfet器件元胞结构 - Google Patents

具有浪涌电压自抑和自过压保护的碳化硅umosfet器件元胞结构 Download PDF

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CN106784011A
CN106784011A CN201710177593.2A CN201710177593A CN106784011A CN 106784011 A CN106784011 A CN 106784011A CN 201710177593 A CN201710177593 A CN 201710177593A CN 106784011 A CN106784011 A CN 106784011A
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parts
structure cell
surge voltage
overvoltage protection
vertical
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袁俊
倪炜江
张敬伟
李明山
牛喜平
徐妙玲
孙安信
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Century Goldray Semiconductor Co Ltd
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Priority to US16/494,563 priority patent/US20200176561A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device

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Abstract

本发明公开了具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞结构，该元胞结构的p‑well区分为三层，最上层位于U型槽的左右两侧，且与U型槽接触；中间层和最下层均由分别设置在元胞结构左右两侧的两部分构成，且二者的左右两部分均不接触；中间层的左右两部分与元胞结构竖向中轴向之间的距离大于最下层的左右两部分与元胞结构竖向中轴向之间的距离；即在元胞结构的漏极电流通路上引入一JFET结构。本申请通过在漏极电流通路上特意引入的JFET结构，自动调节器件导通电阻和自锁保护效应的同时还能够保持较小器件元胞尺寸。

Description

具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞 结构
技术领域
本发明属于H01L 27/00类半导体器件技术领域，具体涉及一种具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞结构。
背景技术
SiC材料因其优良特性在高功率方面具有强大的吸引力，成为高性能功率MOSFET的理想材料之一。SiC垂直功率MOSFET器件主要有横向型的双扩散DMOSFET以及垂直栅槽结构的UMOSFET，如图1所示。DMOSFET结构采用了平面扩散技术，采用难熔材料，如多晶硅栅作掩膜，用多晶硅栅的边缘定义P基区和N+源区。DMOS的名称就源于这种双扩散工艺。利用P型基区和n+源区的侧面扩散差异来形成表面沟道区域。而垂直栅槽结构的UMOSFET，其命名源于U型沟槽结构。该U型沟槽结构利用反应离子刻蚀在栅区形成。U型沟槽结构具有较高的沟道密度(沟道密度定义为有源区沟道宽度)，这使得器件的开态特征电阻显著减小。
平面型SiC MOSFET经过行业内多年的研究，已经有一些厂商率先推出了商业化产品。对于普通横向型DMOSFET结构而言，现代技术进步已经达到了缩小MOS元胞尺寸而无法降低导通电阻的程度，主要原因是由于JFET颈区电阻的限制，即使采用更小的光刻尺寸，单位面积导通电阻也难以降到2mΩ·cm2，而沟槽结构可以有效解决这个问题。U型沟槽结构如图1(右)所示，其采用了在存储器存储电容制各工艺中发明的沟槽刻蚀技术，使导电沟道从横向变为纵向，相比普通结构消除了JFET颈电阻，大大增加了原胞密度，提高了功率半导体的电流处理能力。
然而，SiC UMOSFET在实际制作和应用中仍然存在几个问题：1)SiC漂移区的高电场导致栅氧化层上的电场很高，这个问题在槽角处加剧，从而在高漏极电压下造成栅氧化层迅速击穿；对于恶劣环境的静电效应以及电路中的高压尖峰耐受能力差；2)由于SiC功率MOSFET主要应用在高压高频大电流领域，电路中的寄生参数会使得在高频开关过程中产生overshoot等尖峰毛刺，如图2所示，造成器件电流通路上的瞬时过压同时增加了开关过程的损耗；或由于功率负载等变化形成大的浪涌电压，因此MOSFET抗浪涌电压能力和过压保护也非常重要。因为现有MOSFET器件本身并不具备抗浪涌电压自抑制能力和过压保护能力，往往需要在实际应用中设计复杂的缓冲电路，浪涌电压抑制电路和过压保护电路，如图3所示。而这种外部匹配的抑制和过压保护电路往往有时间上的延迟，实际开关过程中的高频尖峰电压浪涌仍然由器件本身承受，有时会导致器件沟道区的击穿失效，以及栅结构和电极欧姆接触区域的逐渐失效，引起器件可靠性问题。
发明内容
针对现有技术中存在的问题，本发明的目的在于提供具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞结构，其通过在漏极电流通路上特意引入的JFET结构，自动调节器件导通电阻和自锁保护效应的同时还能够保持较小器件元胞尺寸。
为实现上述目的，本发明采用以下技术方案：
具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞结构，所述元胞结构的p-well区分为三层，其中，最上层位于U型槽的左右两侧，且与U型槽接触；中间层和最下层均由分别设置在元胞结构左右两侧的两部分构成，且二者的左右两部分均不接触；中间层的左右两部分与元胞结构竖向中轴向之间的距离大于最下层的左右两部分与元胞结构竖向中轴向之间的距离；即在元胞结构的漏极电流通路上引入一JFET结构。
本发明具有以下有益技术效果：
本申请通过在漏极电流通路上特意引入的JFET结构，自动调节器件导通电阻和自锁保护效应的同时还能够保持较小器件元胞尺寸。
本申请利用掩埋P层故意构造的JFET区域，在大的浪涌电压下可以自动扩展两侧的耗尽区从而增大JFET区的导通电阻，相当于一个snubber电路结构自行抑制浪涌尖峰；同时在浪涌电压过大时，两侧耗尽区域继续扩展而相互重叠，起到封锁效应，保护内部的U型槽栅极区域的栅氧化层，起到一定的尖峰电压过压保护作用。
虽然在引入JFET后会增加一定的导通电阻，却具有了开关缓冲和浪涌电压自抑制效果：
能增加器件对于浪涌电压和过电压的自抑制抗性，避免过压保护电路和过流保护电路由于实际作用上的时延造成的器件损坏和可靠性的减损；
同时也对电路开关过程中的尖峰jitter起到缓冲作用，减小开关损耗；可以减少电路设计中的缓冲电路及snubber电路结构，减少离散性的元器件，从而降低成本，也减少了实际模块体积，增强可靠性。
附图说明
图1为现有技术中横向DMOSFET(左)和U沟槽UTMOSFET(右)的原胞结构示意图；
图2为MOSFET开关瞬间的电压过冲及振荡现象的波形图；
图3为本发明的具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞的结构示意图；
图4为本发明的具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞在开通瞬间的主要电流通路示意图(右侧对称为画出)；
图5为本发明的具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞在JFET构造区的等效寄生参数示意图。
具体实施方式
下面，参考附图，对本发明进行更全面的说明，附图中示出了本发明的示例性实施例。然而，本发明可以体现为多种不同形式，并不应理解为局限于这里叙述的示例性实施例。而是，提供这些实施例，从而使本发明全面和完整，并将本发明的范围完全地传达给本领域的普通技术人员。
如图3所示，本发明提供了具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞结构，该元胞结构的p-well区分为三层，其中，最上层1位于U型槽的左右两侧，且与U型槽接触；中间层2和最下层3均由分别设置在元胞结构左右两侧的两部分构成，且二者的左右两部分均不接触；中间层2的左右两部分与元胞结构竖向中轴向之间的距离大于最下层3的左右两部分与元胞结构竖向中轴向之间的距离；即在元胞结构的漏极电流通路上引入一JFET结构。
如图4所示，当MOSFET应用于实际电路中，MOS开启瞬间，电流会流过JFET区域。由于电流的迅速变化，在电路中产生高频尖峰电压，而与此同时由于电流通路上的电压迅速变化，JFET区域耗尽区域迅速扩展(或收缩，对应于不同的电压变化情况)，JFET此时等效于一个可变电阻和一个结电容的并联结构，类似于一个缓冲吸收电路，如图5所示。通过具体的电路应用及器件电学模型模拟，选取合适的掩埋P区域厚度d以及掺杂浓度，就可以得到合适的寄生参数值，对实际应用于不同开关频率电路模块中时，起到有效的电压尖峰抑制作用，同时减小开通损耗。
上面所述只是为了说明本发明，应该理解为本发明并不局限于以上实施例，符合本发明思想的各种变通形式均在本发明的保护范围之内。

Claims (1)

1.具有浪涌电压自抑和自过压保护的碳化硅UMOSFET器件元胞结构，其特征在于，所述元胞结构的p-well区分为三层，其中，最上层位于U型槽的左右两侧，且与U型槽接触；中间层和最下层均由分别设置在元胞结构左右两侧的两部分构成，且二者的左右两部分均不接触；中间层的左右两部分与元胞结构竖向中轴向之间的距离大于最下层的左右两部分与元胞结构竖向中轴向之间的距离；即在元胞结构的漏极电流通路上引入一JFET结构。
CN201710177593.2A 2017-03-23 2017-03-23 具有浪涌电压自抑和自过压保护的碳化硅umosfet器件元胞结构 Pending CN106784011A (zh)

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US16/494,563 US20200176561A1 (en) 2017-03-23 2017-11-30 Cellular structure of silicon carbide umosfet device having surge voltage self-suppression and self-overvoltage protection capabilities
PCT/CN2017/113964 WO2018171253A1 (zh) 2017-03-23 2017-11-30 具有浪涌电压自抑和自过压保护的碳化硅umosfet器件元胞结构

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CN116344593A (zh) * 2023-05-29 2023-06-27 深圳市威兆半导体股份有限公司 半导体器件及其制造方法
CN116344593B (zh) * 2023-05-29 2023-08-22 深圳市威兆半导体股份有限公司 半导体器件及其制造方法
CN117790578A (zh) * 2024-01-05 2024-03-29 南京第三代半导体技术创新中心有限公司 一种SiC MOSFET器件及制造方法

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